Commit Graph

379408 Commits

Author SHA1 Message Date
Sam McCall fed995ef90 [clangd] Trace queue state for each TUScheduler action.
The new trace event includes what's already in the queue when adding.
For tracers that follow contexts, the trace event will span the time that the action
spends in the queue.
For tracers that follow threads, the trace will be a tiny span on the enqueuing thread.

Differential Revision: https://reviews.llvm.org/D96027
2021-02-05 17:56:51 +01:00
Jonas Devlieghere e5228ef556 [lldb] Emit type annotation in SWIG generated Python code.
The Python code generated by SWIG is compatible with both Python 2 and
Python 3. The -py3 option enables Python 2 incompatible features such as
function annotations and abstract base classes.

Differential revision: https://reviews.llvm.org/D96096
2021-02-05 08:51:22 -08:00
Denys Shabalin 1d0b02368e Drop LLVM_i1, LLVM_i8, LLVM_i32, LLVM_IntBase types
Those types are not needed any longer since LLVM dialect
has migrated to using MLIR's I1, I8, I32 types directly.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D96127
2021-02-05 17:33:16 +01:00
Michael Liao 01bf529db2 Recommit of a2fdf9d4d7.
- The failures are all cc1-based tests due to the missing `-aux-triple` options,
which is always prepared by the driver in CUDA/HIP compilation.
- Add extra check on the missing aux-targetinfo to prevent crashing.

[hip][cuda] Enable extended lambda support on Windows.

- On Windows, extended lambda has extra issues due to the numbering
schemes are different between the host compilation (Microsoft C++ ABI)
and the device compilation (Itanium C++ ABI. Additional device side
lambda number is required per lambda for the host compilation to
correctly mangle the device-side lambda name.
- A hybrid numbering context `MSHIPNumberingContext` is introduced to
number a lambda for both host- and device-compilations.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D69322

This reverts commit 4874ff0241.
2021-02-05 11:27:30 -05:00
Sidharth Baveja 22ebbc4765 LoopUnrollAndJam] Only allow loops with single exit(ing) blocks
Summary:
This resolves an issue posted on Bugzilla. https://bugs.llvm.org/show_bug.cgi?id=48764
In this issue, the loop had  multiple exit blocks, which resulted in the
function getExitBlock to return a nullptr, which resulted in hitting the assert.
This patch ensures that loops which only have one exit block as allowed to be
unrolled and jammed.

Reviewed By: Whitney, Meinersbur, dmgreen

Differential Revision: https://reviews.llvm.org/D95806
2021-02-05 16:10:53 +00:00
Anton Zabaznov d88c55ab95 [OpenCL] Add macro definitions of OpenCL C 3.0 features
This patch adds possibility to define OpenCL C 3.0 feature macros
via command line option or target setting.

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D95776
2021-02-05 18:42:25 +03:00
Stephen Kelly 4cbea09431 [ASTMatchers] Fix segfault when Action is nullptr
It can be nullptr in unit tests.
2021-02-05 15:17:13 +00:00
Yvan Roux 38f28f4621 [Test] Fix test case demonstrating oddities in behavior of LSR.
Add x86 targets requirement to fix bots which are not building these
targets.
2021-02-05 16:03:24 +01:00
Paul Robinson a0749f9bcc [RGT][ProfileData] Correct a test assertion
Found by the Rotten Green Tests project.

Differential Revision: https://reviews.llvm.org/D95258
2021-02-05 06:55:08 -08:00
Sven van Haastregt 42e018997b [OpenCL] Add cl_khr_subgroup_shuffle* to TableGen BIFs
Add the builtin functions brought by the cl_khr_subgroup_shuffle and
cl_khr_subgroup_shuffle_relative extensions to
`-fdeclare-opencl-builtins`.
2021-02-05 14:16:13 +00:00
Lei Zhang 8dae90997a [mlir][vector] Add constant folding for fp16 to fp32 bitcast
Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D96041
2021-02-05 09:12:50 -05:00
Lei Zhang 9f622b3d5d [mlir][spirv] Add more vector conversion patterns
This patch introduces a few more straightforward patterns
to convert vector ops operating on 1-4 element vectors
to their corresponding SPIR-V counterparts.

This patch also enables converting vector<1xT> to T.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D96042
2021-02-05 09:11:16 -05:00
Akira Hatanaka 4a64d8fe39 [ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly
emitting retainRV or claimRV calls in the IR

This reapplies 3fe3946d9a without the
changes made to lib/IR/AutoUpgrade.cpp, which was violating layering.

Original commit message:

Background:

This patch makes changes to the front-end and middle-end that are
needed to fix a longstanding problem where llvm breaks ARC's autorelease
optimization (see the link below) by separating calls from the marker
instructions or retainRV/claimRV calls. The backend changes are in
https://reviews.llvm.org/D92569.

https://clang.llvm.org/docs/AutomaticReferenceCounting.html#arc-runtime-objc-autoreleasereturnvalue

What this patch does to fix the problem:

- The front-end adds operand bundle "clang.arc.rv" to calls, which
  indicates the call is implicitly followed by a marker instruction and
  an implicit retainRV/claimRV call that consumes the call result. In
  addition, it emits a call to @llvm.objc.clang.arc.noop.use, which
  consumes the call result, to prevent the middle-end passes from changing
  the return type of the called function. This is currently done only when
  the target is arm64 and the optimization level is higher than -O0.

- ARC optimizer temporarily emits retainRV/claimRV calls after the calls
  with the operand bundle in the IR and removes the inserted calls after
  processing the function.

- ARC contract pass emits retainRV/claimRV calls after the call with the
  operand bundle. It doesn't remove the operand bundle on the call since
  the backend needs it to emit the marker instruction. The retainRV and
  claimRV calls are emitted late in the pipeline to prevent optimization
  passes from transforming the IR in a way that makes it harder for the
  ARC middle-end passes to figure out the def-use relationship between
  the call and the retainRV/claimRV calls (which is the cause of
  PR31925).

- The function inliner removes an autoreleaseRV call in the callee if
  nothing in the callee prevents it from being paired up with the
  retainRV/claimRV call in the caller. It then inserts a release call if
  the call is annotated with claimRV since autoreleaseRV+claimRV is
  equivalent to a release. If it cannot find an autoreleaseRV call, it
  tries to transfer the operand bundle to a function call in the callee.
  This is important since ARC optimizer can remove the autoreleaseRV
  returning the callee result, which makes it impossible to pair it up
  with the retainRV/claimRV call in the caller. If that fails, it simply
  emits a retain call in the IR if the implicit call is a call to
  retainRV and does nothing if it's a call to claimRV.

Future work:

- Use the operand bundle on x86-64.

- Fix the auto upgrader to convert call+retainRV/claimRV pairs into
  calls annotated with the operand bundles.

rdar://71443534

Differential Revision: https://reviews.llvm.org/D92808
2021-02-05 06:09:42 -08:00
Arnold Schwaighofer 8a7f5ad0fd We can only move static allocas into the resume entry points
Dynamic allocas that still exist have been verified to be only used
'locally' not accross a suspend point.

rdar://73903220

Differential Revision: https://reviews.llvm.org/D96071
2021-02-05 06:06:10 -08:00
Stephen Kelly 2cba22c23a [clang-tidy] Simplify implementation of container-size-empty
Use IgnoreUnlessSpelledInSource to make the matcher code smaller and
more visibly-related to the code.

Differential Revision: https://reviews.llvm.org/D91303
2021-02-05 14:03:41 +00:00
Stephen Kelly 538677abbd Add an API to simplify setting TraversalKind in clang-tidy matchers
Reviewers: sammccall

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80623
2021-02-05 14:03:40 +00:00
Lei Zhang 874ce9b80f [mlir][vector] Add patterns to cast away leading 1-dim
This patch adds patterns to use vector.shape_cast to cast
away leading 1-dimensions from a few vector operations.
It allows exposing more canonical forms of vector.transfer_read,
vector.transfer_write, vector_extract_strided_slice, and
vector.insert_strided_slice. With this, we can have more
opportunity to cancelling extract/insert ops or forwarding
write/read ops.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D95873
2021-02-05 09:02:15 -05:00
Akira Hatanaka 2fbbb18c1d Revert "[ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly"
This reverts commit 3fe3946d9a.

The commit violates layering by including a header from Analysis in
lib/IR/AutoUpgrade.cpp.
2021-02-05 06:00:05 -08:00
Akira Hatanaka 3fe3946d9a [ObjC][ARC] Use operand bundle 'clang.arc.rv' instead of explicitly
emitting retainRV or claimRV calls in the IR

Background:

This patch makes changes to the front-end and middle-end that are
needed to fix a longstanding problem where llvm breaks ARC's autorelease
optimization (see the link below) by separating calls from the marker
instructions or retainRV/claimRV calls. The backend changes are in
https://reviews.llvm.org/D92569.

https://clang.llvm.org/docs/AutomaticReferenceCounting.html#arc-runtime-objc-autoreleasereturnvalue

What this patch does to fix the problem:

- The front-end adds operand bundle "clang.arc.rv" to calls, which
  indicates the call is implicitly followed by a marker instruction and
  an implicit retainRV/claimRV call that consumes the call result. In
  addition, it emits a call to @llvm.objc.clang.arc.noop.use, which
  consumes the call result, to prevent the middle-end passes from changing
  the return type of the called function. This is currently done only when
  the target is arm64 and the optimization level is higher than -O0.

- ARC optimizer temporarily emits retainRV/claimRV calls after the calls
  with the operand bundle in the IR and removes the inserted calls after
  processing the function.

- ARC contract pass emits retainRV/claimRV calls after the call with the
  operand bundle. It doesn't remove the operand bundle on the call since
  the backend needs it to emit the marker instruction. The retainRV and
  claimRV calls are emitted late in the pipeline to prevent optimization
  passes from transforming the IR in a way that makes it harder for the
  ARC middle-end passes to figure out the def-use relationship between
  the call and the retainRV/claimRV calls (which is the cause of
  PR31925).

- The function inliner removes an autoreleaseRV call in the callee if
  nothing in the callee prevents it from being paired up with the
  retainRV/claimRV call in the caller. It then inserts a release call if
  the call is annotated with claimRV since autoreleaseRV+claimRV is
  equivalent to a release. If it cannot find an autoreleaseRV call, it
  tries to transfer the operand bundle to a function call in the callee.
  This is important since ARC optimizer can remove the autoreleaseRV
  returning the callee result, which makes it impossible to pair it up
  with the retainRV/claimRV call in the caller. If that fails, it simply
  emits a retain call in the IR if the implicit call is a call to
  retainRV and does nothing if it's a call to claimRV.

Future work:

- Use the operand bundle on x86-64.

- Fix the auto upgrader to convert call+retainRV/claimRV pairs into
  calls annotated with the operand bundles.

rdar://71443534

Differential Revision: https://reviews.llvm.org/D92808
2021-02-05 05:55:18 -08:00
Nicolas Vasilache 6da8d6c68f [mlir][Linalg] NFC - Improve usage of mlir::linalg::isaContractionOpInterface 2021-02-05 13:37:00 +00:00
Alex Zinenko 1b101038dc [mlir] Turn Linalg to LLVM into a partial conversion
Historically, Linalg To LLVM conversion subsumed numerous other conversions,
including (affine) loop lowerings to CFG and conversions from the Standard and
Vector dialects to the LLVM dialect. This was due to the insufficient support
for partial conversions in the infrastructure that essentially required
conversions that involve type change (in this case, !linalg.range to
!llvm.struct) to be performed in a single conversion sweep. This is no longer
the case so remove the subsumed conversions and run them as separate passes
when necessary.

Depends On D95317

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96008
2021-02-05 14:31:19 +01:00
Kadir Cetinkaya d1978fa4bf
[clangd] Deduplicate scopes in IncludeFixer queries
Differential Revision: https://reviews.llvm.org/D95942
2021-02-05 14:02:50 +01:00
Qiu Chaofan 447dc856b2 Revert "[PowerPC] [Clang] Enable float128 feature on P9 by default"
Commit 6bf29dbb enables float128 feature by default for Power9 targets.
But float128 may cause build failure in libcxx testing. Revert this
commit first to unblock LLVM 12 release.
2021-02-05 20:33:56 +08:00
Simon Pilgrim 22302b2be0 [LoopVectorize][ARM] Regenerate mve-gather-scatter-tailpred.ll test
Fix codegen after rG7fe41ac3dff2d44c3d2c31b28554fbe4a86eaa6c
2021-02-05 12:32:45 +00:00
Vladislav Vinogradov f349abc265 [mlir] Add `const` qualifiers to `AffineMap` methods
The `AffineMap` class follows the same semantic as Type and Attribute.
It is immutable object, so it make sence to mark its methods as const.
Also part of its API is already marked as const, this change just make the API consistent.

Reviewed By: ftynse, bondhugula

Differential Revision: https://reviews.llvm.org/D96026
2021-02-05 15:22:16 +03:00
Aaron Ballman 45ccfd9c9d Treat opencl_unroll_hint subject errors as semantic rather than parse errors
The attribute definition claimed the attribute was inheritable (which
only applies to declaration attributes) and not a statement attribute.
Further, it treats subject appertainment errors as being parse errors
rather than semantic errors, which leads to us accepting invalid code.
For instance, we currently fail to reject:

void foo() {
  int i = 1000;
  __attribute__((nomerge, opencl_unroll_hint(8)))
  if (i) { foo(); }
}

This addresses the issues by clarifying that opencl_unroll_hint is a
statement attribute and handles its appertainment checks in the
semantic layer instead of the parsing layer. This changes the output of
the diagnostic text to be more consistent with other appertainment
errors.
2021-02-05 07:20:41 -05:00
Nicolas Vasilache b40f9fb61d [mlir][Linalg] Fix spurious test change 2021-02-05 12:18:35 +00:00
Nicolas Vasilache 0fcbbde2c7 [mlir][Linalg] NFC - Refactor vectorization to be more composable
Differential Revision: https://reviews.llvm.org/D96116
2021-02-05 12:03:14 +00:00
Adrian Kuegel 7fe41ac3df Revert "[LV] Unconditionally branch from middle to scalar preheader if the scalar loop must execute"
This reverts commit 3e5ce49e53.

Tests started failing on PPC, for example:
http://lab.llvm.org:8011/#/builders/105/builds/5569
2021-02-05 12:51:03 +01:00
Max Kazantsev 78935ea1e7 [Test] Add tests demonstrating missing case of usub with overflow usage
The test shows how "usub with overflow" opt gets or does not get applied
to increment of IV depending on its code placement, while two cases are
semantically equivalent.
2021-02-05 18:46:08 +07:00
Nicolas Vasilache ef9e1e5a59 [mlir][Linalg] Add option to anchor on func name in TestLinalgCodegenStrategy 2021-02-05 11:39:48 +00:00
Simon Pilgrim f7d07dbb29 IROutliner.cpp - fix Wdocumentation warning. NFCI.
Remove duplicate param
2021-02-05 11:38:09 +00:00
Simon Pilgrim ba99ac37dc AArch64LowerHomogeneousPrologEpilog.cpp - fix Wdocumentation warning. NFCI. 2021-02-05 11:34:43 +00:00
Simon Pilgrim 476b912e7c SampleProfile.cpp - fix Wdocumentation warning. NFCI.
Remove duplicate param
2021-02-05 11:31:17 +00:00
Simon Pilgrim 89edda7084 IROutliner.cpp - fix Wdocumentation warnings. NFCI. 2021-02-05 11:21:00 +00:00
Simon Pilgrim 0712c2a2b8 CodeGenPassBuilder.h - fix Wdocumentation warning. NFCI.
void functions shouldn't have a \returns
2021-02-05 11:11:37 +00:00
Simon Pilgrim edc8f0b407 TypeMismatchCheck.cpp - fix Wdocumentation warning. NFCI. 2021-02-05 10:57:39 +00:00
Simon Pilgrim 2a957e3e87 DWARFDebugFrame.h - fix Wdocumentation warning. NFCI. 2021-02-05 10:57:38 +00:00
Joe Ellis 3d257fde75 [AArch64][SVE] Coalesce ptrue instrinsic calls where possible
It is possible to eliminate redundant calls to the SVE ptrue intrinsic.
For example: suppose that we have two SVE ptrue intrinsic calls P1 and
P2. If P1 is at least as wide as P2, then P2 can be written as a
reinterpret P1 using the SVE reinterpret intrinsics.

Coalescing ptrue intrinsics can result in fewer ptrue instructions in
the codegen, and is conducive to better analysis further down the line.

This commit extends the aarch64-sve-intrinsic-opts pass to support
coalescing ptrue intrisic calls.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D94230
2021-02-05 10:43:28 +00:00
Aleksandr Platonov 91698fe45f [clangd] Take into account what is in the index (symbols, references, etc.) at indexes merge
Current indexes merge logic skip data from the static index if the file is in the dynamic index, but sometimes the dynamic index does not contain references (e.g. preamble (dynamic) index vs background (static) index).
This problem is masked with the fact, that the preamble index file list consists of file URI's and other indexes file lists consist of file paths.
This patch introduces the index contents (symbols, references, etc.), which makes indexes merge more flexible and makes it able to use URI's for the index file list.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D94952
2021-02-05 13:35:07 +03:00
Guillaume Chatelet 79b3ab725d [NFC] Simplify expression 2021-02-05 10:17:02 +00:00
Guillaume Chatelet 4b15156dca [NFC] inline variable 2021-02-05 10:17:02 +00:00
Fraser Cormack e046c0c28b [RISCV] Support scalable-vector integer reduction intrinsics
This patch adds support for the integer reduction intrinsics supported
by RVV. This excludes "mul" which has no corresponding instruction.

The reduction instructions in RVV have slightly complicated type
constraints given they always produce a single "M1" vector register.

They are lowered to custom nodes including the second "scalar" reduction
operand to simplify the patterns and in the hope that they can be useful
for future DAG combines.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D95620
2021-02-05 10:10:08 +00:00
Fraser Cormack c3eb2da6c4 [RISCV] Optimize sign-extended EXTRACT_VECTOR_ELT nodes
This patch custom-legalizes all integer EXTRACT_VECTOR_ELT nodes where
SEW < XLEN to VMV_S_X nodes to help the compiler infer sign bits from
the result. This allows us to eliminate redundant sign extensions.

For parity, all integer EXTRACT_VECTOR_ELT nodes are legalized this way
so that we don't need TableGen patterns for some and not others.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D95741
2021-02-05 10:05:22 +00:00
Fraser Cormack af48d2bfc2 [RISCV] Add patterns for scalable-vector fsqrt
This patch adds support for lowering the sqrt intrinsic to the RVV
vfsqrt instruction.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D96012
2021-02-05 09:39:19 +00:00
David Green 502a67dd7f [CostModel] Remove VF from IntrinsicCostAttributes
getIntrinsicInstrCost takes a IntrinsicCostAttributes holding various
parameters of the intrinsic being costed. It can either be called with a
scalar intrinsic (RetTy==Scalar, VF==1), with a vector instruction
(RetTy==Vector, VF==1) or from the vectorizer with a scalar type and
vector width (RetTy==Scalar, VF>1). A RetTy==Vector, VF>1 is considered
an error. Both of the vector modes are expected to be treated the same,
but because this is confusing many backends end up getting it wrong.

Instead of trying work with those two values separately this removes the
VF parameter, widening the RetTy/ArgTys by VF used called from the
vectorizer. This keeps things simpler, but does require some other
modifications to keep things consistent.

Most backends look like this will be an improvement (or were not using
getIntrinsicInstrCost). AMDGPU needed the most changes to keep the code
from c230965ccf working. ARM removed the fix in
dfac521da1, webassembly happens to get a fixup for an SLP cost
issue and both X86 and AArch64 seem to now be using better costs from
the vectorizer.

Differential Revision: https://reviews.llvm.org/D95291
2021-02-05 09:34:24 +00:00
Raphael Isemann 6e1afd8587 [lldb][NFC] Minor comment and inlining fixes for Args
The element count getter can just be in the header. Also doxygenify some of the
comments and document m_argv's terminating nullptr element that the other
comments keep mentioning.
2021-02-05 10:17:16 +01:00
James Henderson b0f4ffbfaa [llvm-objdump] Fix missing first line of license in header file 2021-02-05 08:45:50 +00:00
Nicolas Vasilache 7f58196ec7 [mlir][linalg] Linalg.fill on tensor should not have side-effects
Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96094
2021-02-05 08:22:14 +00:00
Anton Zabaznov a5b627aa4f [OpenCL] Introduce new language options for OpenCL keywords.
OpenCL keywords 'pipe' and 'generic' are unconditionally
supported for OpenCL C 2.0 or in OpenCL C++ mode. In OpenCL C 3.0
these keywords are available if corresponding optional core
feature is supported.

Reviewed By: Anastasia, svenvh

Differential Revision: https://reviews.llvm.org/D95778
2021-02-05 11:18:48 +03:00