bf572c7cea
Add some codegen patterns for x86_64-linux-gnu tls codegen matching.
...
Based on a patch by Patrick Marlier!
llvm-svn: 106433
2010-06-21 18:21:27 +00:00
97c8a6a928
early exit for dbg_value instructions
...
llvm-svn: 106430
2010-06-21 17:49:23 +00:00
74b5e3e0ae
remove some dead variables reported by clang++
...
llvm-svn: 106428
2010-06-21 17:20:18 +00:00
93c4a7b33b
make the Value constructor protected.
...
llvm-svn: 106427
2010-06-21 16:46:37 +00:00
bbc29ea821
Revert r106422, which is breaking the non-fast-isel path.
...
llvm-svn: 106423
2010-06-21 16:02:28 +00:00
f64fdd69d0
More changes for non-top-down fast-isel.
...
Split the code for materializing a value out of
SelectionDAGBuilder::getValue into a helper function, so that it can
be used in other ways. Add a new getNonRegisterValue function which
uses it, for use in code which doesn't want a CopyFromReg even
when FuncMap.ValueMap already has an entry for it.
llvm-svn: 106422
2010-06-21 15:13:54 +00:00
df071b7e42
Add the check to the testcase of r106419.
...
llvm-svn: 106421
2010-06-21 15:11:51 +00:00
0ab5a02579
Mark the SPU 'lr' instruction to never have side effects.
...
This allows the fast regiser allocator to remove redundant
register moves.
Update a set of tests that depend on the register allocator
to be linear scan.
llvm-svn: 106420
2010-06-21 15:08:16 +00:00
d7f50c118a
Fix the lowering of VECTOR_SHUFFLE on SPU to handle splats.
...
llvm-svn: 106419
2010-06-21 14:42:19 +00:00
f91aff5f13
Do one lookup instead of two.
...
llvm-svn: 106415
2010-06-21 14:21:47 +00:00
7c58cf75fa
Generalize this to look in the regular ValueMap in addition to
...
the LocalValueMap, to make it more flexible when fast-isel isn't
proceding straight top-down.
llvm-svn: 106414
2010-06-21 14:17:46 +00:00
1cae86f704
Fix an unintentional commit. I think I typed "git svn dcommit" in the wrong branch.
...
I was trying to do some refactoring on the copyRegToReg, but this is realyl a work in progress and not generally useful yet.
llvm-svn: 106413
2010-06-21 13:31:32 +00:00
6f58190f6f
Fix lowering of VECTOR_SHUFFLE on SPU. Old algorithm
...
used to choke llc with the attached test.
llvm-svn: 106411
2010-06-21 10:17:36 +00:00
9d94ebf1b6
add_input_file and add_input_library now take const arguments, remove the
...
const_cast.
llvm-svn: 106410
2010-06-21 02:23:12 +00:00
720f49ed86
Save more temps with -save-temps.
...
llvm-svn: 106409
2010-06-21 02:17:36 +00:00
c596baa56d
wip
...
llvm-svn: 106408
2010-06-21 02:17:34 +00:00
4713628816
Add support for returning multiple vectors via sret, which is how the ARM target expects the intrinsics to work.
...
llvm-svn: 106406
2010-06-20 21:09:52 +00:00
dcc7b6dcb6
Fix warning in no-asserts build.
...
llvm-svn: 106405
2010-06-20 20:27:42 +00:00
884a8fe5fa
Fix a crash caused by dereference of MBB.end(). rdar://8110842
...
llvm-svn: 106399
2010-06-20 00:54:38 +00:00
c515ab1eb2
Restore a call to rememberInstruction which was accidentally dropped
...
in refactoring.
llvm-svn: 106398
2010-06-19 22:50:35 +00:00
32655906e4
Add a TODO comment.
...
llvm-svn: 106397
2010-06-19 21:30:18 +00:00
51d00092b6
Include the use kind along with the expression in the key of the
...
use sharing map. The reconcileNewOffset logic already forces a
separate use if the kinds differ, so incorporating the kind in the
key means we can track more sharing opportunities.
More sharing means fewer total uses to track, which means smaller
problem sizes, which means the conservative throttles don't kick
in as often.
llvm-svn: 106396
2010-06-19 21:29:59 +00:00
297fb8b9fc
Don't include things in anonymous namespaces that don't need it.
...
llvm-svn: 106395
2010-06-19 21:21:39 +00:00
bf5c3d42ba
Use calloc instead of new/memset, it is more efficient when the set is very large.
...
llvm-svn: 106390
2010-06-19 17:00:31 +00:00
866971ed3d
Fix ScalarEvolution's "exhaustive" trip count evaluation code to avoid
...
assuming that loops are in canonical form, as ScalarEvolution doesn't
depend on LoopSimplify itself. Also, with indirectbr not all loops can
be simplified. This fixes PR7416.
llvm-svn: 106389
2010-06-19 14:17:24 +00:00
d277246137
Factor out duplicated code for reusing and inserting casts into
...
a helper function.
llvm-svn: 106388
2010-06-19 13:25:23 +00:00
4581434c27
Tidy.
...
llvm-svn: 106383
2010-06-19 05:33:57 +00:00
6d12973143
Remove a fixme comment that is no longer relevant.
...
llvm-svn: 106382
2010-06-19 05:32:41 +00:00
0ae08935f6
Fix error message to match function name.
...
llvm-svn: 106381
2010-06-19 05:32:09 +00:00
b86a3abcc7
Refactoring of regular logical packed instructions to prepare for AVX ones.
...
llvm-svn: 106375
2010-06-19 04:09:22 +00:00
8737b7d73d
Refactor aliased packed logical instructions, also add
...
AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.
llvm-svn: 106374
2010-06-19 02:44:01 +00:00
7079bf815d
Ignore dbg_value's.
...
llvm-svn: 106373
2010-06-19 02:36:21 +00:00
a588049ce9
Move new sse 1 & 2 generic classes to a more appropriate place
...
llvm-svn: 106372
2010-06-19 01:32:46 +00:00
2787efd961
Remove unnecessary arguments
...
llvm-svn: 106371
2010-06-19 01:22:34 +00:00
00ada89f95
Add AVX packed intrinsics for MIN, MAX
...
llvm-svn: 106370
2010-06-19 01:17:05 +00:00
f3c01f3ef6
Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emitEpilogue is not expecting them.
...
llvm-svn: 106368
2010-06-19 01:01:32 +00:00
42105b2976
Finish ripping isTwoAddress out of X86. Some mindless formatting
...
and operand renaming to help.
The giant turn the constraints on and selectively turn it off
should probably be inverted at some point since it's just largely
50/50.
llvm-svn: 106367
2010-06-19 00:37:40 +00:00
1e205f6b1c
Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions
...
llvm-svn: 106366
2010-06-19 00:37:31 +00:00
c60cecd88b
rip out dead code.
...
llvm-svn: 106365
2010-06-19 00:34:14 +00:00
e808a78ac1
fix rdar://7873482 by teaching the instruction encoder to emit
...
segment prefixes. Daniel wrote most of this patch.
llvm-svn: 106364
2010-06-19 00:34:00 +00:00
e5fcd333da
Indentation and remove dead code.
...
llvm-svn: 106362
2010-06-19 00:11:54 +00:00
1888f11887
Clean up: remove now unnecessary Constraints
...
llvm-svn: 106361
2010-06-19 00:09:27 +00:00
5fc43eb186
Silence compiler warnings.
...
llvm-svn: 106360
2010-06-19 00:02:06 +00:00
502c4fe61c
more refactoring! yay! big win over the intrinsics
...
llvm-svn: 106359
2010-06-19 00:00:22 +00:00
6bdbdb5544
Remove isTwoAddress from here too.
...
llvm-svn: 106358
2010-06-18 23:56:07 +00:00
66d2d57d9b
Fix typo, SSE1 should be used by XS, not SSE2
...
llvm-svn: 106357
2010-06-18 23:53:27 +00:00
3577c1b811
Remove isTwoAddress from 64-bit files.
...
llvm-svn: 106356
2010-06-18 23:51:21 +00:00
119824ed4d
Move ARM if-conversion before post-ra scheduling.
...
llvm-svn: 106355
2010-06-18 23:32:07 +00:00
8693650422
Teach regular and fast isel to set dead flags on unused implicit defs
...
on calls and similar instructions.
llvm-svn: 106353
2010-06-18 23:28:01 +00:00
2bfad417a1
Apply some refactor to packed instructions
...
llvm-svn: 106349
2010-06-18 23:13:35 +00:00
4f0781c9b3
Update cmake list.
...
llvm-svn: 106348
2010-06-18 23:12:10 +00:00
285935939d
Thumb2 hazard recognizer.
...
llvm-svn: 106347
2010-06-18 23:11:35 +00:00
678927e0b1
Only run CoalesceExtSubRegs when we can expect LiveIntervalAnalysis to clean up
...
the inserted INSERT_SUBREGs after us.
llvm-svn: 106345
2010-06-18 23:10:20 +00:00
2d51c7c592
Allow ARM if-converter to be run after post allocation scheduling.
...
- This fixed a number of bugs in if-converter, tail merging, and post-allocation
scheduler. If-converter now runs branch folding / tail merging first to
maximize if-conversion opportunities.
- Also changed the t2IT instruction slightly. It now defines the ITSTATE
register which is read by instructions in the IT block.
- Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
change the instruction ordering in the IT block (since IT mask has been
finalized). It also ensures no other instructions can be scheduled between
instructions in the IT block.
This is not yet enabled.
llvm-svn: 106344
2010-06-18 23:09:54 +00:00
a57c2885cf
back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)
...
llvm-svn: 106342
2010-06-18 23:03:10 +00:00
a4f06da5f1
Another typo.
...
llvm-svn: 106340
2010-06-18 22:51:25 +00:00
6860bb7796
Enable Expand handling of atomics for subtargets that can't do them inline.
...
llvm-svn: 106336
2010-06-18 22:35:32 +00:00
64ae6577ba
Fix typo.
...
llvm-svn: 106335
2010-06-18 22:33:17 +00:00
07f4fa8198
TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREG
...
instructions, but it doesn't really understand live ranges, so the first
INSERT_SUBREG uses an implicitly defined register.
Fix it in LiveVariableAnalysis by adding the <undef> flag.
llvm-svn: 106333
2010-06-18 22:29:44 +00:00
cf9e8a987f
Fix an inverted condition.
...
llvm-svn: 106330
2010-06-18 22:17:13 +00:00
871439abd2
Use the new 'defm' class inheritance in SSE
...
llvm-svn: 106327
2010-06-18 22:10:11 +00:00
f5d62535a5
Fix cross initialization compilation error.
...
llvm-svn: 106324
2010-06-18 22:01:37 +00:00
c0e0d85b18
Teach iff-converter to properly count # of dups. It was not skipping over dbg_value's which resulted in non-duplicated instructions being deleted. rdar://8104384.
...
llvm-svn: 106323
2010-06-18 21:52:57 +00:00
d64dfc1568
Add Expand-to-libcall support for additional atomics. This covers the usual
...
entries used by llvm-gcc. *_[U]MIN and such can be added later if needed.
This enables the front ends to simplify handling of the atomic intrinsics by
removing the target-specific decision about which targets can handle the
intrinsics.
llvm-svn: 106321
2010-06-18 21:43:38 +00:00
a92e41a50a
Rewrite chained if's as switches and replace assertions with llvm_unreachable
...
(as suggested in radar 8104405).
llvm-svn: 106318
2010-06-18 21:32:42 +00:00
589ffb4902
Fix ARM/Thumb reversal in previous attempt.
...
llvm-svn: 106314
2010-06-18 21:07:47 +00:00
22a212f97c
When using ADDri to get the address of a stack object, 255 is a conservative
...
limit on the offset that can be materialized without using the register
scavenger.
llvm-svn: 106312
2010-06-18 20:59:25 +00:00
a46d607545
Make this comment less specific.
...
llvm-svn: 106311
2010-06-18 20:45:41 +00:00
af4903d6ee
Fix X86FastISel's address-mode folding to stay within the
...
original basic block. This avoids trouble with examining
instructions in other basic blocks which haven't been
assigned registers yet.
llvm-svn: 106310
2010-06-18 20:44:47 +00:00
a06c2f79fc
An attempt to fix the problem Anton reported with
...
ARM tail calls. Don't know if it works, but it
doesn't break Darwin.
llvm-svn: 106309
2010-06-18 20:44:28 +00:00
24ceda8eb0
Revert r106304 (105548 and friends), which are the SCEVComplexityCompare
...
optimizations. There is still some nondeterminism remaining.
llvm-svn: 106306
2010-06-18 19:54:20 +00:00
23f8321cbc
Teach tablegen how to inherit from classes in 'defm' definitions.
...
The rule is simple: only inherit from a class list if they come
in the end, after the last multiclass.
llvm-svn: 106305
2010-06-18 19:53:41 +00:00
4c807fca97
Reapply 105540, 105542, and 105548, and revert r105732.
...
llvm-svn: 106304
2010-06-18 19:26:04 +00:00
8297640062
Add a pass-through option to the plugin. The use case for this option is to
...
ask the linker to take another look into some library or object. The case when
one might want to do this is when codegen introduces a new undefined reference.
The canonical example is libgcc.
llvm-svn: 106303
2010-06-18 19:18:58 +00:00
45073042eb
Reapply 105546.
...
llvm-svn: 106302
2010-06-18 19:12:32 +00:00
9136d9fbf8
Reapply 105544.
...
llvm-svn: 106301
2010-06-18 19:09:27 +00:00
d055f6582e
Add explicit keywords.
...
llvm-svn: 106300
2010-06-18 19:04:37 +00:00
c1570dda5c
Enable tail calls on ARM by default, with some
...
basic tests.
This has been well tested on Darwin but not elsewhere.
It should work provided the linker correctly resolves
B.W <label in other function>
which it has not seen before, at least from llvm-based
compilers. I'm leaving the arm-tail-calls switch in
until I see if there's any problems because of that;
it might need to be disabled for some environments.
llvm-svn: 106299
2010-06-18 19:00:18 +00:00
e5457c275d
Don't leak RegClass2VRegMap, which is now a new[] array instead of a
...
std::vector.
llvm-svn: 106298
2010-06-18 18:54:05 +00:00
882bb2984e
Start TargetRegisterClass indices at 0 instead of 1, so that
...
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.
llvm-svn: 106296
2010-06-18 18:13:55 +00:00
3ac52b3e43
Last round of changes for ARM tail calls.
...
Not turning them on yet.
llvm-svn: 106295
2010-06-18 18:13:11 +00:00
819f27e760
Grammar.
...
llvm-svn: 106292
2010-06-18 17:40:42 +00:00
f82c8fcc58
Fix PR7372: Conditional branches (at least on ARM) are treated as predicated,
...
so when IfConverter::CopyAndPredicateBlock checks to see if it should ignore
an instruction because it is a branch, it should not check if the branch is
predicated.
This case (when IgnoreBr is true) is only relevant from IfConvertTriangle,
where new branches are inserted after the block has been copied and predicated.
If the original branch is not removed, we end up with multiple conditional
branches (possibly conflicting) at the end of the block. Aside from any
immediate errors resulting from that, this confuses the AnalyzeBranch functions
so that the branches are not analyzable. That in turn causes the IfConverter to
think that the "Simple" pattern can be applied, and things go downhill fast
because the "Simple" pattern does _not_ apply if the block can fall through.
This is pretty fragile. If there are other degenerate cases where AnalyzeBranch
fails, but where the block may still fall through, the IfConverter should not
perform its "Simple" if-conversion. But, I don't know how to do that with the
current AnalyzeBranch interface, so for now, the best thing seems to be to
avoid creating branches that AnalyzeBranch cannot handle.
Evan, please review!
llvm-svn: 106291
2010-06-18 17:07:23 +00:00
b9f91667e1
Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86
...
does for {flags}. If we create virtual registers of the CCR class, RegAllocFast
may try to spill them, and we can't do that.
llvm-svn: 106289
2010-06-18 16:49:33 +00:00
9f58b3e106
Don't bother calling releaseMemory before destroying the DominatorTreeBase.
...
llvm-svn: 106287
2010-06-18 16:09:11 +00:00
7edb39cc6b
Minor code simplifications.
...
llvm-svn: 106286
2010-06-18 16:00:29 +00:00
6e681a5fbe
Give NamedRegionTimer an Enabled flag, allowing all its clients to
...
switch from this:
if (TimePassesIsEnabled) {
NamedRegionTimer T(Name, GroupName);
do_something();
} else {
do_something(); // duplicate the code, this time without a timer!
}
to this:
{
NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled);
do_something();
}
llvm-svn: 106285
2010-06-18 15:56:31 +00:00
96ca25eba5
Don't replace the old Ordering object with a new one; just clear()
...
the old one.
llvm-svn: 106284
2010-06-18 15:40:58 +00:00
a4f46b3ef8
Don't call clear() on DbgInfo when it's going to be deleted anyway.
...
Don't replace the old DbgInfo with a new one when clear() on the
old one is sufficient.
llvm-svn: 106283
2010-06-18 15:36:18 +00:00
92c11acdb8
Change UpdateNodeOperands' operand and return value from SDValue to
...
SDNode *, since it doesn't care about the ResNo value.
llvm-svn: 106282
2010-06-18 15:30:29 +00:00
3d8a9d7490
Remove getIntegerSCEV; it's redundant with getConstant, and getConstant
...
is more consistent with the ConstantInt API.
llvm-svn: 106281
2010-06-18 14:33:50 +00:00
c3479f5342
Delete unused variables.
...
llvm-svn: 106280
2010-06-18 14:32:32 +00:00
f1d8304fe3
Eliminate unnecessary uses of getZExtValue().
...
llvm-svn: 106279
2010-06-18 14:22:04 +00:00
35b6f9a929
isValueValidForType can be a static member function.
...
llvm-svn: 106278
2010-06-18 14:01:07 +00:00
67d25f91c5
Some assorted isTwoAddress -> Constraints cleanup.
...
llvm-svn: 106273
2010-06-18 02:41:19 +00:00
c61056a421
Handle execution entrypoints with non-integer return types.
...
Fix from Russel Power in PR7284.
llvm-svn: 106271
2010-06-18 02:01:10 +00:00
559020df1d
Don't write a file named "&1".
...
llvm-svn: 106269
2010-06-18 01:49:17 +00:00
f3aea7aecf
Disable indvars on loops when LoopSimplify form is not available.
...
This fixes PR7333.
llvm-svn: 106267
2010-06-18 01:35:11 +00:00
99ba4dac59
Don't maintain a set of deleted nodes; instead, use a HandleSDNode
...
to track a node over CSE events. This fixes PR7368.
llvm-svn: 106266
2010-06-18 01:24:29 +00:00
2323168705
Add {mix,max}{ss,sd}{rr,rm} AVX forms.
...
llvm-svn: 106264
2010-06-18 01:12:56 +00:00
b92156d5e4
Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
...
which is faster, simpler, and less surprising.
llvm-svn: 106263
2010-06-18 01:05:21 +00:00
8ba26b48bb
Fix a typo in a comment.
...
llvm-svn: 106260
2010-06-18 00:53:08 +00:00
c8cbcddcf0
improve portability to solaris 10, PR7380, patch by Simon Billingsley!
...
llvm-svn: 106259
2010-06-18 00:35:32 +00:00
0883789ec4
Handle ext(ext(x)) -> ext(x) immediately, since it's simple.
...
llvm-svn: 106256
2010-06-18 00:08:30 +00:00
30d7a51d6c
Make this test less fragile.
...
llvm-svn: 106255
2010-06-18 00:06:03 +00:00
8f5954f42c
Simplify this code.
...
llvm-svn: 106254
2010-06-17 23:34:09 +00:00
6b98f7129f
Use new tablegen resources in SSE tablegen code. This will
...
be done incrementally and intermixed with the adding of more
AVX instructions. This is a first step in that direction
llvm-svn: 106251
2010-06-17 23:05:30 +00:00
deb2002cee
In case Rec is a definition and not a class, do the proper comparison!
...
llvm-svn: 106246
2010-06-17 23:00:16 +00:00
0125b6410a
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
...
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
llvm-svn: 106243
2010-06-17 22:43:56 +00:00
4eb4719432
Minor clarification.
...
llvm-svn: 106234
2010-06-17 19:23:50 +00:00
0ed5b460dc
add missing break. inconsequential as the code shouldn't be reached, but
...
for correctness' sake, it should be there.
llvm-svn: 106229
2010-06-17 17:58:54 +00:00
3aeae8aeeb
Add entries for Expanding atomic intrinsics to libcalls. Just a placeholder
...
for the moment. The implementation of the libcall will follow.
Currently, the llvm-gcc knows when the intrinsics can be correctly handled by
the back end and only generates them in those cases, issuing libcalls directly
otherwise. That's too much coupling. The intrinsics should always be
generated and the back end decide how to handle them, be it with a libcall,
inline code, or whatever. This patch is a step in that direction.
rdar://8097623
llvm-svn: 106227
2010-06-17 17:50:54 +00:00
1f8e5fbc7a
Testcase for llvm-gcc 106225.
...
llvm-svn: 106226
2010-06-17 17:43:14 +00:00
29dda21e96
Remove arm_apcscc from the test files. It is the default and doing this
...
matches what llvm-gcc and clang now produce.
llvm-svn: 106221
2010-06-17 15:18:27 +00:00
934ced7749
Allow absolute paths in LLVM_TARGET_DEFINITIONS for CMake's TableGen rule
...
llvm-svn: 106219
2010-06-17 15:17:07 +00:00
256b5a2bff
Modify tablegen to support generating all NEON code used by clang at once.
...
llvm-svn: 106207
2010-06-17 04:15:13 +00:00
5712c77c89
Thumb1 and any pre-v6 ARM target should use the libcall expansion of
...
ISD::MEMBARRIER. v7 and v7 ARM mode continue to use the custom lowering.
llvm-svn: 106204
2010-06-17 02:02:03 +00:00
ba451e80dc
ISD::MEMBARRIER should lower to a libcall (__sync_synchronize) if the target
...
sets the legalize action to Expand.
llvm-svn: 106203
2010-06-17 02:00:53 +00:00
7f4235d1ba
Fix the handling of !if result, avoiding null results for non 'int'.
...
llvm-svn: 106201
2010-06-17 01:50:39 +00:00
6e758c97fd
simplify code a bit and add a more explanatory assert for cases that
...
previously would result in 'cannot yet select' errors.
llvm-svn: 106199
2010-06-17 01:37:00 +00:00
dd6a4cabf6
Add the entire range of DW_OP_lit[0..31], DW_OP_reg[0..31], and
...
DW_OP_breg[0..31] to Dwarf.h.
Add "DW_" prefix to the llvm::dwarf::*String methods which did not
already have them in Dwarf.cpp.
llvm-svn: 106197
2010-06-17 01:23:24 +00:00
29b58afdf1
Hack to let the move lowering handle dynamic-no-pic absolute moves of
...
TLVP:
movl _a@TLVP, %eax
Daniel: Please review if you get a chance.
llvm-svn: 106194
2010-06-17 00:51:48 +00:00
93f16372f9
Update comment.
...
llvm-svn: 106191
2010-06-17 00:49:46 +00:00
4d1d798736
For a tablegen expression such as !if(a,b,c), let 'a'
...
be evaluated for 'bit' operators
llvm-svn: 106185
2010-06-17 00:31:36 +00:00
0f184c0328
Fix the typo in my previous one-line commit.
...
llvm-svn: 106179
2010-06-17 00:10:16 +00:00
873f7aff62
Make sure CMake can build the files added by my previous commit.
...
llvm-svn: 106178
2010-06-16 23:52:37 +00:00
842eb0905e
Add preliminary clang attribute generation support.
...
The attribute class generation support is still somewhat limited.
See the accompanying clang commit for more details.
llvm-svn: 106174
2010-06-16 23:45:50 +00:00
e3864cc15e
format and 80-column cleanup
...
llvm-svn: 106173
2010-06-16 23:45:49 +00:00
77a4a56251
let the '!eq' expression support 'int' and 'bit' types
...
llvm-svn: 106171
2010-06-16 23:24:12 +00:00
e94f1ded24
remove trailing whitespace
...
llvm-svn: 106164
2010-06-16 22:41:09 +00:00
1e69f3c7be
Revert r106117, which was the result of me misreading the C++98/03
...
specification.
llvm-svn: 106162
2010-06-16 22:32:18 +00:00
2334144e6e
Don't attempt preserving conservative kill flags. We were doing it wrong.
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This is before LiveVariables anyway, where these kill flags are recalculated.
llvm-svn: 106157
2010-06-16 22:11:08 +00:00
01ac8f9fc0
Remove the hidden "neon-reg-sequence" option. The reg sequences are working
...
now, so there's no need to disable them.
llvm-svn: 106155
2010-06-16 21:34:01 +00:00
74892d4f1f
In progress on 32-bit addends.
...
llvm-svn: 106154
2010-06-16 21:32:38 +00:00
207cd4bbd7
Allow a register to be redefined multiple times in a basic block.
...
LiveVariableAnalysis was a bit picky about a register only being redefined once,
but that really isn't necessary.
Here is an example of chained INSERT_SUBREGs that we can handle now:
68 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1028<kill>, 14
register: %reg1040 +[70,134:0)
76 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1029<kill>, 13
register: %reg1040 replace range with [70,78:1) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,134:0) 0@78-(134) 1@70-(78)
84 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1030<kill>, 12
register: %reg1040 replace range with [78,86:2) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,134:0) 0@86-(134) 1@70-(78) 2@78-(86)
92 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1031<kill>, 11
register: %reg1040 replace range with [86,94:3) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,94:3)[94,134:0) 0@94-(134) 1@70-(78) 2@78-(86) 3@86-(94)
rdar://problem/8096390
llvm-svn: 106152
2010-06-16 21:29:40 +00:00
fd3b4e7390
A few more places where SCEVExpander bits need to skip over debug intrinsics
...
when iterating through instructions. Yet more work for rdar://7797940
llvm-svn: 106149
2010-06-16 21:13:38 +00:00
2c8b829238
modify so the test doesn't drop an output file in the test source directory.
...
The test should also likely have some FileCheck bits to validate the
output(?).
llvm-svn: 106146
2010-06-16 21:07:06 +00:00
ede8e6d2f0
MC/Mach-O: Rewrite atom association to be a final pass we do in Finish(), instead of tracking as part of emission.
...
- This allows sharing more code with the MCObjectStreamer.
llvm-svn: 106143
2010-06-16 20:04:32 +00:00
aa627c39e4
MC: Simplify MCAssembler::isSymbolLinkerVisible to only take an MCSymbol.
...
llvm-svn: 106142
2010-06-16 20:04:29 +00:00
b2347fe504
MC: Lift SwitchSection() and Finish() into MCObjectStreamer.
...
llvm-svn: 106141
2010-06-16 20:04:25 +00:00
8a3c9d9bc4
MC: Factor out an MCObjectStreamer class, which will be shared by the concrete
...
object file format writers.
llvm-svn: 106140
2010-06-16 20:04:22 +00:00
79b0da30fb
Be specific. Use FileCheck.
...
llvm-svn: 106135
2010-06-16 19:39:45 +00:00
a20e2dfe86
Make sure that simplify libcalls does not replace a call with one calling
...
convention with a new call with a different calling convention.
llvm-svn: 106134
2010-06-16 19:34:01 +00:00
6c0da25129
add FIXME
...
llvm-svn: 106126
2010-06-16 18:45:08 +00:00
e3721dd27c
This requires more investigation. Unblock buildbots for now.
...
llvm-svn: 106122
2010-06-16 18:19:49 +00:00
37e4f98cb6
Update test to explicitly capture llc output.
...
llvm-svn: 106121
2010-06-16 18:04:12 +00:00
d71bd63600
Improve comment to include that the use of a preg is also verboten in this situation.
...
llvm-svn: 106119
2010-06-16 18:01:31 +00:00
21bc129db3
Eliminate a redundant "typename" keyword
...
llvm-svn: 106117
2010-06-16 17:42:01 +00:00
41476410c9
TODO--
...
llvm-svn: 106102
2010-06-16 15:47:00 +00:00
a13bd20396
simplify-libcalls: fold strncmp(x, y, 1) -> memcmp(x, y, 1)
...
The memcmp will be optimized further and even the pathological case
'strstr(x, "x") == x' generates optimal code now.
llvm-svn: 106097
2010-06-16 10:30:29 +00:00
f128bdcb55
Make post-ra scheduling, anti-dep breaking, and register scavenger (conservatively) aware of predicated instructions. This enables ARM to move if-conversion before post-ra scheduler.
...
llvm-svn: 106091
2010-06-16 07:35:02 +00:00
d119da54de
Check function pointer first, before comparing function names.
...
llvm-svn: 106088
2010-06-16 06:42:02 +00:00
a6d20f446f
Use separate named MDNode to hold each function's local variable info.
...
This speeds up local variable handling in DwarfDebug.
llvm-svn: 106075
2010-06-16 00:53:55 +00:00
b672ab9b53
Don't emit the linkage for initializer label for mach-o tls.
...
llvm-svn: 106073
2010-06-16 00:27:30 +00:00
2092dc2acd
Fix indentation.
...
llvm-svn: 106072
2010-06-16 00:26:36 +00:00
8c0cf0994d
Create a more targeted fix for not sinking instructions into a range where it
...
will conflict with another live range. The place which creates this scenerio is
the code in X86 that lowers a select instruction by splitting the MBBs. This
eliminates the need to check from the bottom up in an MBB for live pregs.
llvm-svn: 106066
2010-06-15 23:46:31 +00:00
6c4d63e1a5
For 32-bit non-pic tlv mach-o addressing we don't need a pic base or
...
a relative address.
llvm-svn: 106064
2010-06-15 23:08:42 +00:00
9b5005cd4b
Added a comment.
...
llvm-svn: 106063
2010-06-15 23:06:30 +00:00
a86c2bdd2c
Some more work on mach-o TLV relocations.
...
llvm-svn: 106062
2010-06-15 22:59:05 +00:00
438c35b5d1
Add file missing from previous commit.
...
llvm-svn: 106058
2010-06-15 22:24:08 +00:00
8105144fcd
Fix 80col violations, remove trailing whitespace, and clarify a comment.
...
llvm-svn: 106057
2010-06-15 22:18:54 +00:00
1115afb092
Update test to match recent llvm-gcc change.
...
llvm-svn: 106056
2010-06-15 22:16:40 +00:00
26cefa5e11
Make VC++ happy
...
llvm-svn: 106054
2010-06-15 22:10:31 +00:00
44f9dfc9cf
Next round of tail call changes. Register used in a tail
...
call must not be callee-saved; following x86, add a new
regclass to represent this. Also fixes a couple of bugs.
Still disabled by default; Thumb doesn't work yet.
llvm-svn: 106053
2010-06-15 22:08:33 +00:00
ec2e964fd6
Remove the local register allocator.
...
Please use the fast allocator instead.
llvm-svn: 106051
2010-06-15 21:58:33 +00:00
89456b2612
Reapply 105986 with fix for bug pointed out by Jakob:
...
flag argument to addReg is not the same format as flags attached
to MachineOperand, although both have the same info. I don't
think this actually mattered; the bootstrap failure did not
reproduce on the next run anyway.
llvm-svn: 106049
2010-06-15 21:36:43 +00:00
f9d8e17ec5
fix PR7380: use 'test' instead of shell builtins. This improves
...
portability to Solaris 10, which apparently doesn't support
[ foo -ot bar ]
llvm-svn: 106048
2010-06-15 21:35:22 +00:00
1118860e3a
simplify-libcalls: fold strstr(a, b) == a -> strncmp(a, b, strlen(b)) == 0
...
llvm-svn: 106047
2010-06-15 21:34:25 +00:00
ae591be4e9
Set the mtriple in some tests so that they use AAPCS.
...
llvm-svn: 106041
2010-06-15 20:42:00 +00:00
7a84689cc5
Fixed vector widening of binary instructions that can trap. Patch by Visa Putkinen!
...
llvm-svn: 106038
2010-06-15 20:29:05 +00:00
e22295e8a6
fpcmp: Fix bug where fpcmp wouldn't early exit when files obviously differ and
...
no tolerance is set.
llvm-svn: 106033
2010-06-15 19:20:30 +00:00
b645fa13a9
fpcmp: Fix a possible infinite loop when comparing something like:
...
1..19 ok
to
1..20 o k
(yes, the odd space is necessary).
llvm-svn: 106032
2010-06-15 19:20:28 +00:00
874c92bd47
fix fastisel to handle GS and FS relative pointers. Patch by
...
Nelson Elhage!
llvm-svn: 106031
2010-06-15 19:08:40 +00:00
f3f7a770b7
Add basic support for NEON modified immediates besides VMOV.
...
llvm-svn: 106030
2010-06-15 19:05:35 +00:00
5a24a56e1e
Remove the arm_aapcscc marker from the tests. It is the default
...
for the linux targets.
llvm-svn: 106029
2010-06-15 19:04:29 +00:00
146f130d1f
disable SmallVectorImpl's copy constructor. This prevents a class
...
of base class slicing bugs reported on irc
llvm-svn: 106028
2010-06-15 18:59:43 +00:00
fc7d739422
IfConversion's AnalyzeBlocks method always returns false; clean it up.
...
llvm-svn: 106027
2010-06-15 18:57:15 +00:00
c964585ff8
fix naming
...
llvm-svn: 106024
2010-06-15 18:53:34 +00:00
6e54c908e0
Fix an exotic bug that only showed up in an internal test case.
...
SimpleRegisterCoalescing::JoinIntervals() uses CoalescerPair to determine if a
copy is coalescable, and in very rare cases it can return true where LHS is not
live - the coalescable copy can come from an alias of the physreg in LHS.
llvm-svn: 106021
2010-06-15 18:49:14 +00:00
5947573f39
Fix a comment typo.
...
llvm-svn: 106015
2010-06-15 18:19:27 +00:00
a8b941c21b
Remove stray semi-colon.
...
llvm-svn: 106009
2010-06-15 17:47:24 +00:00
de94e66234
Add some missing checks for the case where the extract_subregs are
...
combined to an insert_subreg, i.e., where the destination register is larger
than the source. We need to check that the subregs can be composed for that
case in a symmetrical way to the case when the destination is smaller.
llvm-svn: 106004
2010-06-15 17:27:54 +00:00
246e9a07a2
Avoid processing early clobbers twice in RegAllocFast.
...
Early clobbers defining a virtual register were first alocated to a physreg and
then processed as a physreg EC, spilling the virtreg.
This fixes PR7382.
llvm-svn: 105998
2010-06-15 16:20:57 +00:00
82eca35b3e
Add CoalescerPair helper class.
...
Given a copy instruction, CoalescerPair can determine which registers to
coalesce in order to eliminate the copy. It deals with all the subreg fun to
determine a tuple (DstReg, SrcReg, SubIdx) such that:
- SrcReg is a virtual register that will disappear after coalescing.
- DstReg is a virtual or physical register whose live range will be extended.
- SubIdx is 0 when DstReg is a physical register.
- SrcReg can be joined with DstReg:SubIdx.
CoalescerPair::isCoalescable() determines if another copy instruction is
compatible with the same tuple. This fixes some NEON miscompilations where
shuffles are getting coalesced as if they were copies.
The CoalescerPair class will replace a lot of the spaghetti logic in JoinCopy
later.
llvm-svn: 105997
2010-06-15 16:04:21 +00:00
0904134252
Add <cstddef> include to get ptrdiff_t, for gcc-4.6; patch by Dimitry Andric.
...
llvm-svn: 105994
2010-06-15 14:50:42 +00:00
a55b8877e6
Generalize the pre-coalescing of extract_subregs feeding reg_sequences,
...
replacing the overly conservative checks that I had introduced recently to
deal with correctness issues. This makes a pretty noticable difference
in our testcases where reg_sequences are used. I've updated one test to
check that we no longer emit the unnecessary subreg moves.
llvm-svn: 105991
2010-06-15 05:56:31 +00:00
1478142485
VMOVQQ and VMOVQQQQ are pseudo instructions and not predicable.
...
llvm-svn: 105990
2010-06-15 05:51:27 +00:00
3f253d2353
Revert 105986; looks like I'd better try bootstrapping.
...
llvm-svn: 105988
2010-06-15 04:55:06 +00:00
d52caa5244
Update CMake build.
...
llvm-svn: 105987
2010-06-15 04:08:14 +00:00
c338ef2b65
The form of BuildMI used for TAILJMPr was changing the register
...
containing the target address, an input, into an output. I don't
think this actually broke anything on x86 (it does on ARM), but
it's wrong.
llvm-svn: 105986
2010-06-15 03:13:49 +00:00
f14e08b01b
Make sure to skip dbg_value instructions when finding an insertion point for
...
the combined load/store instruction. rdar://7797940
llvm-svn: 105982
2010-06-15 00:41:09 +00:00
c8c2efa7f7
Add missing include to unbreak the build.
...
llvm-svn: 105971
2010-06-14 22:44:26 +00:00
24fdd22766
generate better code in CheckComplexPattern
...
llvm-svn: 105970
2010-06-14 22:33:34 +00:00
5b2b504038
Rename functions referring to VMOV immediates to refer to NEON "modified
...
immediate" operands. These functions have so far only been used for VMOV
but they also apply to other NEON instructions with modified immediate
operands. No functional changes.
llvm-svn: 105969
2010-06-14 22:19:57 +00:00
412800d346
More dbg_value cleanup so the presence of debug info doesn't affect code-gen.
...
Make sure to skip the dbg_value instructions when moving dups out of the
diamond. rdar://7797940
llvm-svn: 105965
2010-06-14 21:30:32 +00:00
77b6d01906
Don't produce output only if *all* files are unused.
...
llvm-svn: 105962
2010-06-14 21:20:52 +00:00
078f4cec21
- Do away with SimpleHazardRecognizer.h. It's not used and offers little value.
...
- Rename ExactHazardRecognizer to PostRAHazardRecognizer and move its header to include to allow targets to extend it.
llvm-svn: 105959
2010-06-14 21:06:53 +00:00
00ab615406
apparently lots of dupes.
...
llvm-svn: 105956
2010-06-14 20:19:03 +00:00
a397ada078
Avoid uncessary array copying.
...
llvm-svn: 105955
2010-06-14 20:18:40 +00:00
faa7bdccbf
fix a nasty bug where we were not treating available_externally
...
symbols as declarations in the X86 backend. This would manifest
on darwin x86-32 as errors like this with -fvisibility=hidden:
symbol '__ZNSbIcED1Ev' can not be undefined in a subtraction expression
This fixes PR7353.
llvm-svn: 105954
2010-06-14 20:11:56 +00:00
bbb798c7d1
remove old test.
...
llvm-svn: 105953
2010-06-14 20:07:43 +00:00
b30f87b74e
rename test
...
llvm-svn: 105952
2010-06-14 20:07:34 +00:00
329ea064ed
jump threading can't split a critical edge from an indirectbr. This
...
fixes PR7356.
llvm-svn: 105950
2010-06-14 19:45:43 +00:00
37b827fd11
Test case for Radar 8004649.
...
llvm-svn: 105949
2010-06-14 18:37:04 +00:00
62d6f947d5
Fix a comment typo.
...
llvm-svn: 105944
2010-06-14 18:29:23 +00:00
58c09b2859
fix a -Wbool-conversions warning from clang.
...
llvm-svn: 105943
2010-06-14 18:28:57 +00:00
0fc88efda3
fix a -Wbool-conversions warning from clang.
...
llvm-svn: 105942
2010-06-14 18:28:34 +00:00
e42d72309b
Honor the SDKROOT setting when building llvm.
...
Radar 7894069.
llvm-svn: 105938
2010-06-14 17:56:25 +00:00
ba1f1fcae5
Add back some possible optimizations for va_arg, with wording that makes it
...
more clear what exactly is missing.
llvm-svn: 105934
2010-06-14 07:03:30 +00:00
4f475d07ba
Update html tutorial docs to match api changes.
...
llvm-svn: 105933
2010-06-14 06:09:39 +00:00
95f5652e2d
Make kaleidoscope use fp add/sub/mul.
...
Patch by Patrick Flannery!
llvm-svn: 105932
2010-06-14 06:03:16 +00:00
ac2aac1860
Add the last of the SemaChecking-gen code.
...
llvm-svn: 105929
2010-06-14 05:17:23 +00:00
6e42d53cb3
Test case for r105914.
...
llvm-svn: 105915
2010-06-13 16:16:54 +00:00
b82de426de
SimplifyCFG: don't turn volatile stores to null/undef into unreachable. Fixes PR7369.
...
llvm-svn: 105914
2010-06-13 14:35:54 +00:00
c49ea3c50e
Let SmallVector take advantage of LiveRange's podness.
...
llvm-svn: 105913
2010-06-13 12:52:38 +00:00
444e9f0a35
Add a helping of comments
...
Add code for generating bits of semachecking
llvm-svn: 105907
2010-06-13 04:47:03 +00:00
e302f833e1
Merge getStoreRegOpcode and getLoadRegOpcode.
...
llvm-svn: 105900
2010-06-12 20:13:29 +00:00
250a21b79b
tests: Run macho-dump with binary unbuffered streams on Windows, I can't find a Python 2.6 way to change stdin to binary.
...
llvm-svn: 105894
2010-06-12 17:05:28 +00:00
edcc628289
tests: Make macho-dump.bat actually work.
...
llvm-svn: 105891
2010-06-12 16:21:54 +00:00
12225eb687
tests: Propogate LLVM_SRC_ROOT and PYTHON_EXECUTABLE environment variables to tests.
...
llvm-svn: 105890
2010-06-12 16:21:19 +00:00
0892ee503a
lit: Replace /dev/null in scripts with temporary files on Windows.
...
llvm-svn: 105888
2010-06-12 16:00:10 +00:00
2ed39551a7
improve verifier error about unterminated block to include
...
function name, patch by Yuri
llvm-svn: 105887
2010-06-12 15:50:24 +00:00
05466ef7eb
declare a class with 'class' instead of struct to avoid tag mismatch
...
warnings, and don't shift by a bool. Patch by Rizky Herucakra!
llvm-svn: 105886
2010-06-12 15:46:56 +00:00
e17e4aea2a
Add README entry; based on testcase from Bill Hart.
...
llvm-svn: 105878
2010-06-12 05:54:27 +00:00
ada854f8b6
make the avx intrinsics 3 address
...
llvm-svn: 105876
2010-06-12 03:12:14 +00:00
b90b010a2d
Add generic vector support for bitselect & element byteswap
...
llvm-svn: 105874
2010-06-12 03:09:49 +00:00
f203703467
Add some basic fp intrinsics for AVX
...
llvm-svn: 105873
2010-06-12 02:38:32 +00:00
5d6103318a
When performing the Horrible Hack(tm-Duncan) on the EH code to convert a
...
clean-up to a catch-all after inlining, take into account that there could be
filter IDs as well. The presence of filters don't mean that the selector catches
anything. It's just metadata information.
llvm-svn: 105872
2010-06-12 02:34:29 +00:00
a714ea0f7d
More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm
...
llvm-svn: 105870
2010-06-12 01:53:48 +00:00
b06f54b852
More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr
...
Handle OpSize TSFlag for AVX
llvm-svn: 105869
2010-06-12 01:23:26 +00:00
e60273fd70
Allow target to provide its own hazard recognizer to post-ra scheduler.
...
llvm-svn: 105862
2010-06-12 00:12:18 +00:00
cb1fe56fd9
Code formatting.
...
llvm-svn: 105861
2010-06-12 00:11:53 +00:00
8947c32493
Add some comments about REX fields
...
llvm-svn: 105860
2010-06-12 00:03:52 +00:00
fd5458d4bd
More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)
...
Introduce the VEX_X field
llvm-svn: 105859
2010-06-11 23:50:47 +00:00
c85504540e
lit: Add a forgotten default argument.
...
llvm-svn: 105858
2010-06-11 23:47:36 +00:00
56b093f572
tests: Add wrapper script for calling macho-dump on Win32.
...
llvm-svn: 105856
2010-06-11 23:29:48 +00:00
43c2cb63ae
lit: When running Tcl style tests on Windows, substitute slashes to avoid Tcl
...
quoting problems. Not particularly ideal, but should work ok. Based on a patch by
Michael Spencer!
llvm-svn: 105855
2010-06-11 23:27:45 +00:00
f07d33d8f1
Add a missing bitcast. This code used to only handle conversions between
...
i64 and f64 types, but now it also handle Neon vector types, so the f64 result
of VMOVDRR may need to be converted to a Neon type. Radar 8084742.
llvm-svn: 105845
2010-06-11 22:45:25 +00:00
70883c32ec
llvm-mc: Don't set NO_INSTALL on llvm-mc.
...
llvm-svn: 105837
2010-06-11 22:00:08 +00:00
6eae520de9
Add instruction encoding for the Neon VMOV immediate instruction. This changes
...
the machine instruction representation of the immediate value to be encoded
into an integer with similar fields as the actual VMOV instruction. This makes
things easier for the disassembler, since it can just stuff the bits into the
immediate operand, but harder for the asm printer since it has to decode the
value to be printed. Testcase for the encoding will follow later when MC has
more support for ARM.
llvm-svn: 105836
2010-06-11 21:34:50 +00:00
afe54f1625
Support for nested functions/classes in debug output. (Again.) Radar 7424645.
...
llvm-svn: 105828
2010-06-11 20:08:44 +00:00
6111abf8ad
Delete duplicate function.
...
llvm-svn: 105827
2010-06-11 20:05:01 +00:00
b9639aaed4
Define ContextualFoldingSet, which stores a context parameter to pass down to
...
the Profile method. Currently this only works with the default FoldingSetTraits
implementation.
The point of this is to allow nodes to not store context values which are only
used during profiling. A better solution would thread this value through the
folding algorithms, but then those would need to be (1) templated and
(2) non-opaque.
llvm-svn: 105819
2010-06-11 11:06:44 +00:00
0e915300e3
Add support for polynomial type, for polynomial multiply
...
llvm-svn: 105792
2010-06-10 18:06:07 +00:00
a349d522f7
Avoid "variable 'bits' set but not used [-Wunused-but-set-variable]"
...
warnings with gcc-4.6, by not setting bits when the result is not
used.
llvm-svn: 105790
2010-06-10 16:23:15 +00:00
9943850884
Avoid many "variable 'Sub' set but not used [-Wunused-but-set-variable]" warnings
...
with gcc-4.6. The warning is wrong, since Sub *is* used (perhaps gcc is confused
because the use of Sub is constant folded away?), but since it is trivial to avoid,
and massively reduces the amount of warning spew, just workaround the wrong warning.
llvm-svn: 105788
2010-06-10 15:06:05 +00:00
b3b9053708
Add includes to get ptrdiff_t. This is needed by gcc-4.6 which has
...
done some more header trimming, resulting in cstdef being included
by less header files.
llvm-svn: 105786
2010-06-10 10:13:58 +00:00
5f2adccc1b
Teach tablegen to allow "let" expressions inside multiclasses,
...
providing more ways to factor out commonality from the records.
llvm-svn: 105776
2010-06-10 02:42:59 +00:00
38f6560461
Code refactoring, no functionality changes.
...
llvm-svn: 105775
2010-06-10 02:09:31 +00:00
2901371c32
Delete code that's not safe.
...
llvm-svn: 105774
2010-06-10 02:08:20 +00:00
Eric Christopher