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1464 Commits

Author SHA1 Message Date
Chris Lattner d7495ae7e9 Lower vector compares to VCMP nodes, just like we lower vector comparison 
predicates to VCMPo nodes.

llvm-svn: 27285
 2006-03-31 05:13:27 +00:00
Chris Lattner e5a6c4f8b7 These are done 
llvm-svn: 27284
 2006-03-31 04:53:21 +00:00
Chris Lattner bca5fbe914 Mark INSERT_VECTOR_ELT as expand 
llvm-svn: 27276
 2006-03-31 01:48:55 +00:00
Chris Lattner c4e3eadf21 Add the rest of the vmul instructions and the vmulsum* instructions. 
llvm-svn: 27268
 2006-03-30 23:39:06 +00:00
Chris Lattner a23158f1ca Use a new tblgen feature to significantly shrinkify instruction definitions that 
directly correspond to intrinsics.

llvm-svn: 27266
 2006-03-30 23:21:27 +00:00
Chris Lattner 551d3a11d3 Add a bunch of new instructions for intrinsics. 
llvm-svn: 27265
 2006-03-30 23:07:36 +00:00
Chris Lattner 7d6f4f14b4 add a note 
llvm-svn: 27243
 2006-03-29 00:24:13 +00:00
Chris Lattner 66e1410858 add a note 
llvm-svn: 27227
 2006-03-28 18:56:23 +00:00
Jim Laskey d1aa1638c6 Expose base register for DwarfWriter. Refactor code accordingly. 
llvm-svn: 27225
 2006-03-28 13:48:33 +00:00
Nate Begeman af8c373e77 Fix a couple typos 
llvm-svn: 27216
 2006-03-28 04:18:18 +00:00
Nate Begeman 1b3928765d Add a few more altivec intrinsics 
llvm-svn: 27215
 2006-03-28 04:15:58 +00:00
Chris Lattner 3710fca2b8 implement a bunch more intrinsics. 
llvm-svn: 27209
 2006-03-28 02:29:37 +00:00
Chris Lattner cb5ec07cc3 Use normal lvx for scalar_to_vector instead of lve*x. They do the exact 
same thing and we have a dag node for the former.

llvm-svn: 27205
 2006-03-28 01:43:22 +00:00
Chris Lattner e55d171ccd Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. 
llvm-svn: 27201
 2006-03-28 00:40:33 +00:00
Jim Laskey fa53b276d0 Translate llvm target registers to dwarf register numbers properly. 
llvm-svn: 27180
 2006-03-27 20:18:45 +00:00
Chris Lattner 939c9ab88f Add a bunch of notes from my journey thus far. 
llvm-svn: 27170
 2006-03-27 07:41:00 +00:00
Chris Lattner 22ec3e7b7e Split out altivec notes into their own README 
llvm-svn: 27168
 2006-03-27 07:04:16 +00:00
Chris Lattner 1738c293b5 Fix the JIT encoding of VSEL 
llvm-svn: 27160
 2006-03-27 03:34:17 +00:00
Chris Lattner df59d5314c Fix the JIT encoding of VSPLTI* 
llvm-svn: 27159
 2006-03-27 03:28:57 +00:00
Nate Begeman ed728c1291 SelectionDAGISel can now natively handle Switch instructions, in the same 
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156
 2006-03-27 01:32:24 +00:00
Chris Lattner 65473e20d8 add vsel 
llvm-svn: 27153
 2006-03-26 22:38:43 +00:00
Chris Lattner 6961fc76bb Codegen vector predicate compares. 
llvm-svn: 27151
 2006-03-26 10:06:40 +00:00
Evan Cheng b1ddc988af Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead 
llvm-svn: 27149
 2006-03-26 09:52:32 +00:00
Chris Lattner 793cbcb4fd Add all of the altivec comparison instructions. Add patterns for the 
non-predicate altivec compare intrinsics.

llvm-svn: 27143
 2006-03-26 04:57:17 +00:00
Chris Lattner c6c88b2ea1 Add and 8/16-bit adds, add all integer subtracts, add saturating subtract 
intrinsics.

llvm-svn: 27142
 2006-03-26 02:39:02 +00:00
Chris Lattner 53e07decd7 implement the vsldoi intrinsic. 
llvm-svn: 27139
 2006-03-26 00:41:48 +00:00
Chris Lattner 5c0c762443 fix the pattern for vandc, it's NOT vnand 
llvm-svn: 27136
 2006-03-25 23:10:40 +00:00
Chris Lattner e8c1d04051 add patterns for VANDC/VNOR, implementing 
CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC

llvm-svn: 27135
 2006-03-25 23:05:29 +00:00
Chris Lattner b3617beb52 Add some logical operations 
llvm-svn: 27127
 2006-03-25 22:16:05 +00:00
Chris Lattner 1b4bb22f8a implement a bunch of intrinsics 
llvm-svn: 27118
 2006-03-25 08:01:02 +00:00
Chris Lattner 2a85fa1f79 Move all Altivec stuff out into a new PPCInstrAltivec.td file. 
Add a bunch of patterns for different datatypes, e.g. bit_convert, undef and
zero vector support.

llvm-svn: 27117
 2006-03-25 07:51:43 +00:00
Chris Lattner 1cb91b3cd9 Add some basic patterns for other datatypes 
llvm-svn: 27116
 2006-03-25 07:39:07 +00:00
Chris Lattner 3a66a75108 add all supported formats to the vector register file 
llvm-svn: 27115
 2006-03-25 07:36:56 +00:00
Chris Lattner f653cdd3f9 Add support for __builtin_altivec_vnmsubfp /vmaddfp 
llvm-svn: 27112
 2006-03-25 07:05:55 +00:00
Chris Lattner 5d70a7c4a5 #include Intrinsics.h into all dag isels 
llvm-svn: 27109
 2006-03-25 06:47:10 +00:00
Chris Lattner 2771e2c960 Codegen things like: 
<int -1, int -1, int -1, int -1>
and
 <int 65537, int 65537, int 65537, int 65537>

Using things like:
  vspltisb v0, -1
and:
  vspltish v0, 1

instead of using constant pool loads.

This implements CodeGen/PowerPC/vec_splat.ll:splat_imm_i{32|16}.

llvm-svn: 27106
 2006-03-25 06:12:06 +00:00
Jim Laskey f0729b4067 Add dwarf register numbering to register data. 
llvm-svn: 27081
 2006-03-24 21:15:58 +00:00
Chris Lattner 9f9b6116e1 add another note 
llvm-svn: 27077
 2006-03-24 20:04:27 +00:00
Chris Lattner d589dd1352 Fix a bad JIT encoding of VPERM. Why is VPERM D,A,B,C but vfmadd is D,A,C,B ?? 
llvm-svn: 27069
 2006-03-24 18:24:43 +00:00
Chris Lattner f2286d5917 Like the comment says, prefer to use the implicit add done by [r+r] addressing 
modes than emitting an explicit add and using a base of r0.  This implements
Regression/CodeGen/PowerPC/mem-rr-addr-mode.ll

llvm-svn: 27068
 2006-03-24 17:58:06 +00:00
Chris Lattner a90b7141ed Disable the i32->float G5 optimization. It is unsafe, as documented in the 
comment.

This fixes 177.mesa, and McCat/09-vor with the td scheduler.

llvm-svn: 27060
 2006-03-24 07:53:47 +00:00
Chris Lattner ab882abce8 add support for using vxor to build zero vectors. This implements 
Regression/CodeGen/PowerPC/vec_zero.ll

llvm-svn: 27059
 2006-03-24 07:48:08 +00:00
Chris Lattner f5efddf80b Gabor points out that we can't spell. :) 
llvm-svn: 27049
 2006-03-24 07:12:19 +00:00
Chris Lattner cbcfe46556 add a note 
llvm-svn: 27000
 2006-03-23 21:28:44 +00:00
Chris Lattner 81137629e0 Add PPC vector bit-convert support 
llvm-svn: 26995
 2006-03-23 19:54:27 +00:00
Jim Laskey 3c43609f1f Add support to locate local variables in frames (early version.) 
llvm-svn: 26994
 2006-03-23 18:12:57 +00:00
Jim Laskey cf0166fbeb Change interface to DwarfWriter. 
llvm-svn: 26991
 2006-03-23 18:09:44 +00:00
Chris Lattner 6f95ab7abb Eliminate IntrinsicLowering from TargetMachine. 
Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974
 2006-03-23 05:43:16 +00:00
Chris Lattner eccf46950c This has been implemented. Tweak it into another note 
llvm-svn: 26944
 2006-03-22 05:33:23 +00:00
Chris Lattner 4a66d69433 When possible, custom lower 32-bit SINT_TO_FP to this: 
_foo2:
        extsw r2, r3
        std r2, -8(r1)
        lfd f0, -8(r1)
        fcfid f0, f0
        frsp f1, f0
        blr

instead of this:

_foo2:
        lis r2, ha16(LCPI2_0)
        lis r4, 17200
        xoris r3, r3, 32768
        stw r3, -4(r1)
        stw r4, -8(r1)
        lfs f0, lo16(LCPI2_0)(r2)
        lfd f1, -8(r1)
        fsub f0, f1, f0
        frsp f1, f0
        blr

This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s
with llcbeta (16.7% and 38.1% respectively).

llvm-svn: 26943
 2006-03-22 05:30:33 +00:00
Chris Lattner 77373d1bea Add support for "ri" addressing modes where the immediate is a 14-bit field 
which is shifted left two bits before use.  Instructions like STD use this
addressing mode.

llvm-svn: 26942
 2006-03-22 05:26:03 +00:00
Chris Lattner 4e7371758f Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp 
llvm-svn: 26935
 2006-03-22 01:44:36 +00:00
Chris Lattner 00f4683bf6 These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will. 
llvm-svn: 26930
 2006-03-21 20:51:05 +00:00
Chris Lattner 3a2ae6ad3c Don't emit pseudo instructions! 
llvm-svn: 26926
 2006-03-21 20:19:37 +00:00
Nate Begeman 013127981a Update readme 
llvm-svn: 26924
 2006-03-21 18:58:20 +00:00
Chris Lattner 139eac5b71 Print absolute memory references like this: 
lwz r2, 8(0)
instead of this:
       lwz r2, 8(r0)

This fixes the llc/llc-beta failures on PPC last night.

llvm-svn: 26922
 2006-03-21 17:21:13 +00:00
Chris Lattner bda7310ef7 With Evan's latest tblgen patch, this code is obsolete, thanks Evan! 
llvm-svn: 26917
 2006-03-21 06:37:40 +00:00
Chris Lattner d2132f87d7 When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0. 
llvm-svn: 26913
 2006-03-21 00:51:38 +00:00
Chris Lattner f194834161 minor note 
llvm-svn: 26912
 2006-03-21 00:47:09 +00:00
Chris Lattner c8b16d00b9 Handle constant addresses more efficiently, folding the low bits into the 
disp field of the load/store if possible.  This compiles
CodeGen/PowerPC/load-constant-addr.ll to:

_test:
        lis r2, 2838
        lfs f1, 26848(r2)
        blr

instead of:

_test:
        lis r2, 2838
        ori r2, r2, 26848
        lfs f1, 0(r2)
        blr

llvm-svn: 26908
 2006-03-20 22:38:22 +00:00
Chris Lattner 6d74b09da7 remove dead variable 
llvm-svn: 26907
 2006-03-20 22:37:23 +00:00
Chris Lattner a1bc294f0c Fix a couple of bugs in permute/splat generate, thanks to Nate for actually 
figuring these out! :)

llvm-svn: 26904
 2006-03-20 18:26:51 +00:00
Chris Lattner eda030da04 reenable this hack, the tblgen version isn't quite ready 
llvm-svn: 26902
 2006-03-20 17:54:43 +00:00
Chris Lattner f96d523b8f Fix the pattern for VADDUWM, add i32 splat 
llvm-svn: 26901
 2006-03-20 17:51:58 +00:00
Evan Cheng 89f3cff0f5 Use tblgen'd VECTOR_SHUFFLE selection code. 
llvm-svn: 26900
 2006-03-20 08:14:16 +00:00
Chris Lattner a9a1313386 Add support for generating vspltw, instead of a vperm instruction with a 
constant pool load.  This generates significantly nicer code for splats.

When tblgen gets bugfixed, we can remove the custom selection code.

llvm-svn: 26898
 2006-03-20 06:51:10 +00:00
Chris Lattner a8fbb6dd3d Implement PPC::isSplatShuffleMask and PPC::getVSPLTImmediate. 
llvm-svn: 26897
 2006-03-20 06:37:44 +00:00
Chris Lattner ffc475689b fix duplicate definition errors 
llvm-svn: 26896
 2006-03-20 06:33:01 +00:00
Chris Lattner 382f356bd9 Check in some intermediate code that adds a skeleton for matching vsplt* 
instructions

llvm-svn: 26894
 2006-03-20 06:15:45 +00:00
Chris Lattner 93d99f9928 fix typo 
llvm-svn: 26889
 2006-03-20 05:05:55 +00:00
Chris Lattner 366b2514fa add vsplat instructions, fix sched description for vperm 
llvm-svn: 26888
 2006-03-20 04:47:33 +00:00
Chris Lattner a8713b1ee6 Custom lower arbitrary VECTOR_SHUFFLE's to VPERM. 
TODO: leave specific ones as VECTOR_SHUFFLE's and turn them into specialized
operations like vsplt*

llvm-svn: 26887
 2006-03-20 01:53:53 +00:00
Chris Lattner 0a8b4eaee9 Claim to have v16i8 for perm masks 
llvm-svn: 26886
 2006-03-20 01:53:02 +00:00
Chris Lattner e7a058de7d add the vperm instruction 
llvm-svn: 26883
 2006-03-20 01:00:56 +00:00
Chris Lattner 169e6238ad Add a note about the MUL -> FMADD vector bug. 
llvm-svn: 26874
 2006-03-19 22:08:08 +00:00
Chris Lattner 7e9440a4fc Custom lower SCALAR_TO_VECTOR into lve*x. 
llvm-svn: 26868
 2006-03-19 06:55:52 +00:00
Chris Lattner b1ee9c7e24 PPC doesn't have SCALAR_TO_VECTOR 
llvm-svn: 26865
 2006-03-19 06:17:19 +00:00
Chris Lattner 5b595af956 add support for vector undef 
llvm-svn: 26863
 2006-03-19 06:10:09 +00:00
Chris Lattner 0c9eb670bb minor fixes 
llvm-svn: 26857
 2006-03-19 05:43:01 +00:00
Chris Lattner ea6468758d notes 
llvm-svn: 26856
 2006-03-19 05:33:30 +00:00
Chris Lattner 431c90c9fa we don't use lmw/stmw. When we want them they are easy enough to add 
llvm-svn: 26853
 2006-03-19 04:33:37 +00:00
Chris Lattner f7b6e7212f rename these nodes 
llvm-svn: 26848
 2006-03-19 01:13:28 +00:00
Nate Begeman 21f87d0e4c Fix subfic to match subc by default instead of sub so that it is correctly 
cost-modeled as producing a flag.  This fixes the test I just added for neg

llvm-svn: 26835
 2006-03-17 22:41:37 +00:00
Nate Begeman bb01d4f272 Remove BRTWOWAY* 
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.

llvm-svn: 26814
 2006-03-17 01:40:33 +00:00
Chris Lattner 8bf1c59e7f remove dead variable 
llvm-svn: 26813
 2006-03-16 23:52:08 +00:00
Nate Begeman fb0e36fa56 Notes on how to kill the eeevil brtwoway, and make ppc branch selector 
more target independant, generate better code, and be less conservative.

llvm-svn: 26809
 2006-03-16 22:37:48 +00:00
Chris Lattner 1e6dfa4c1f Strangely, calls clobber call-clobbered vector regs. Whodathoughtit? 
llvm-svn: 26808
 2006-03-16 22:35:59 +00:00
Chris Lattner 325bb46315 add a note 
llvm-svn: 26807
 2006-03-16 22:25:55 +00:00
Chris Lattner 91400bd413 teach the ppc backend how to spill/reload vector regs 
llvm-svn: 26806
 2006-03-16 22:24:02 +00:00
Chris Lattner 6e90062416 add callee saved vector regs 
llvm-svn: 26805
 2006-03-16 22:07:06 +00:00
Evan Cheng 20931a798e Added a way for TargetLowering to specify what values can be used as the 
scale component of the target addressing mode.

llvm-svn: 26802
 2006-03-16 21:47:42 +00:00
Chris Lattner 0b27047a6c in functions that use a lot of callee saved regs, this can be more than 
5 instructions away.

llvm-svn: 26801
 2006-03-16 21:31:45 +00:00
Chris Lattner fd9f3e8ed3 Add support for copying registers. still needed: spilling and reloading them 
llvm-svn: 26800
 2006-03-16 20:03:58 +00:00
Nate Begeman 32e73f9881 Another case we could do better on. 
llvm-svn: 26795
 2006-03-16 18:50:44 +00:00
Chris Lattner 1678a6c477 Save/restore VRSAVE once per function, not once per block. 
llvm-svn: 26793
 2006-03-16 18:25:23 +00:00
Nate Begeman 2e1fde7c5c Update scheduling info for vrsave instruction 
llvm-svn: 26776
 2006-03-15 05:25:05 +00:00
Chris Lattner ab1ed2aa96 Fix an off by one error that caused PPC LLC failures last night. 
llvm-svn: 26758
 2006-03-14 17:56:49 +00:00
Evan Cheng 0f9d6534f5 PPC LSR pass should use target lowering hooks. 
llvm-svn: 26743
 2006-03-13 23:56:51 +00:00
Evan Cheng 2dd2c652b2 Added getTargetLowering() to TargetMachine. Refactored targets to support this. 
llvm-svn: 26742
 2006-03-13 23:20:37 +00:00
Chris Lattner 02e2c18c9c For functions that use vector registers, save VRSAVE, mark used 
registers, and update it on entry to each function, then restore it on exit.

This compiles:

void func(vfloat *a, vfloat *b, vfloat *c) {
        *a = *b * *c + *c;
}

to this:

_func:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r5
        lvx v1, 0, r4
        vmaddfp v0, v1, v0, v0
        stvx v0, 0, r3
        mtspr 256, r2
        blr

GCC produces this (which has additional stack accesses):

_func:
        mfspr r0,256
        stw r0,-4(r1)
        oris r0,r0,0xc000
        mtspr 256,r0
        lvx v0,0,r5
        lvx v1,0,r4
        lwz r12,-4(r1)
        vmaddfp v0,v0,v1,v0
        stvx v0,0,r3
        mtspr 256,r12
        blr

llvm-svn: 26733
 2006-03-13 21:52:10 +00:00
Chris Lattner ec9d0bc3ec Fix a couple of bugs that broke the alpha tester build 
llvm-svn: 26722
 2006-03-13 05:23:59 +00:00
Chris Lattner 4fbb612685 Handle cracked instructions in dispatch group formation. 
llvm-svn: 26721
 2006-03-13 05:20:04 +00:00
Chris Lattner 7579cfb1a0 Mark instructions that are cracked by the PPC970 decoder as such. 
llvm-svn: 26720
 2006-03-13 05:15:10 +00:00
Chris Lattner 51348c5f27 Several big changes: 
1. Use flags on the instructions in the .td file to indicate the PPC970 unit
   type instead of a table in the .cpp file.  Much cleaner.
2. Change the hazard recognizer to build d-groups according to the actual
   algorithm used, not my flawed understanding of it.
3. Model "must be in the first slot" and "must be the only instr in a group"
   accurately.

llvm-svn: 26719
 2006-03-12 09:13:49 +00:00
Chris Lattner d03132a409 blr is a branch too 
llvm-svn: 26710
 2006-03-11 21:49:49 +00:00
Chris Lattner c2447e8b59 teach the JIT to encode vector registers 
llvm-svn: 26697
 2006-03-10 20:19:50 +00:00
Chris Lattner 543832d39d Change the interface for getting a target HazardRecognizer to be more clean. 
llvm-svn: 26608
 2006-03-08 04:25:59 +00:00
Chris Lattner a8dd636192 add a note 
llvm-svn: 26605
 2006-03-08 00:25:47 +00:00
Jim Laskey 313570fb17 Use "llvm.metadata" section for debug globals. Filter out these globals in the 
asm printer.

llvm-svn: 26599
 2006-03-07 22:00:35 +00:00
Chris Lattner 907e13c742 add another missing store. 
llvm-svn: 26595
 2006-03-07 16:26:48 +00:00
Chris Lattner 8c73d80b08 add a couple more load/store instrs, add a newline to the end of file. 
llvm-svn: 26594
 2006-03-07 16:19:46 +00:00
Nate Begeman 3e3219cc0a This kinda sorta implements "things that have to lead a dispatch group". 
llvm-svn: 26591
 2006-03-07 08:30:27 +00:00
Chris Lattner 675567f77c add some new instructions to the classifier. With this, we correctly insert 
a nop into Freebench/neural, which speeds it up from 136->129s (~5.4%).

llvm-svn: 26590
 2006-03-07 07:14:55 +00:00
Chris Lattner 05ad128dca add some comments that describe what we model 
llvm-svn: 26588
 2006-03-07 06:44:19 +00:00
Chris Lattner 2cab13573c Implement a very very simple hazard recognizer for LSU rejects and ctr set/read 
flushes

llvm-svn: 26587
 2006-03-07 06:32:48 +00:00
Chris Lattner 883cefc656 add a note 
llvm-svn: 26585
 2006-03-07 04:42:59 +00:00
Chris Lattner ea79d9fd73 implement TII::insertNoop 
llvm-svn: 26562
 2006-03-05 23:49:55 +00:00
Chris Lattner 9c7f50376a Copysign needs to be expanded everywhere. Note that Alpha and IA64 should 
implement copysign as a native op if they have it.

llvm-svn: 26541
 2006-03-05 05:08:37 +00:00
Chris Lattner 60a60f4b1e Implement CodeGen/PowerPC/or-addressing-mode.ll, which is also PR668. 
llvm-svn: 26450
 2006-03-01 07:14:48 +00:00
Chris Lattner 3cb349a068 add a note 
llvm-svn: 26448
 2006-03-01 06:36:20 +00:00
Chris Lattner 27f5345b1f Compile this: 
void foo(float a, int *b) { *b = a; }

to this:

_foo:
        fctiwz f0, f1
        stfiwx f0, 0, r4
        blr

instead of this:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        stw r2, 0(r4)
        blr

This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.

llvm-svn: 26447
 2006-03-01 05:50:56 +00:00
Chris Lattner f418435819 Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll. 
llvm-svn: 26445
 2006-03-01 04:57:39 +00:00
Evan Cheng 1926427351 Vector op lowering. 
llvm-svn: 26438
 2006-03-01 01:11:20 +00:00
Chris Lattner b9f35f06bc Add a subtarget feature for the stfiwx instruction. I know the G5 has it, 
but I don't know what other PPC impls do.  If someone could update the proc
table, I would appreciate it :)

llvm-svn: 26421
 2006-02-28 07:08:22 +00:00
Chris Lattner 872810da6c remove implemented item 
llvm-svn: 26418
 2006-02-28 06:36:04 +00:00
Nate Begeman f918ed2e33 readme updates 
llvm-svn: 26405
 2006-02-27 22:08:36 +00:00
Chris Lattner 7674d90fa1 Add memory printing support for PPC. Input memory operands now work with 
inline asms! :)

llvm-svn: 26365
 2006-02-24 20:27:40 +00:00
Chris Lattner a1ec1ddd59 Implement selection of inline asm memory operands 
llvm-svn: 26348
 2006-02-24 02:13:12 +00:00
Evan Cheng 0ed48fe601 PPC JIT relocation model should be DynamicNoPIC. 
llvm-svn: 26338
 2006-02-23 22:18:07 +00:00
Chris Lattner 1bad2546d0 Implement the PPC inline asm "L" modifier. This allows us to compile: 
long long test(long long X) {
  __asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
  return X;
}

to:
        foo r2 r3 r2 r3

llvm-svn: 26333
 2006-02-23 19:31:10 +00:00
Evan Cheng 73136dfecc - Added option -relocation-model to set relocation model. Valid values include static, pic, 
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
 2006-02-22 20:19:42 +00:00
Jim Laskey 2fa33a989d Coordinate activities with llvm-gcc4 and dwarf. 
llvm-svn: 26314
 2006-02-22 19:02:11 +00:00
Chris Lattner 7ad77dfc2a split register class handling from explicit physreg handling. 
llvm-svn: 26308
 2006-02-22 00:56:39 +00:00
Chris Lattner 7bb4696dc3 Updates to match change of getRegForInlineAsmConstraint prototype 
llvm-svn: 26305
 2006-02-21 23:11:00 +00:00
Evan Cheng 5f99760ae7 Moved PICEnabled to include/llvm/Target/TargetOptions.h 
llvm-svn: 26272
 2006-02-18 00:08:58 +00:00
Nate Begeman 5965bd19f8 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Evan Cheng 42c01c8d39 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
 2006-02-16 08:27:56 +00:00
Chris Lattner b134520b86 If we have zero initialized data with external linkage, use .zerofill to 
emit it (instead of .space), saving a bit of space in the .o file.

For example:
int foo[100];
int bar[100] = {};

when compiled with C++ or -fno-common results in shrinkage from 1160 to 360
bytes of space.  The X86 backend can also do this on darwin.

llvm-svn: 26185
 2006-02-14 22:18:23 +00:00
Chris Lattner 84fb09eba4 Make sure that weak functions are aligned properly 
llvm-svn: 26181
 2006-02-14 20:42:33 +00:00
Chris Lattner 3a0ad47b39 Switch to using getCALLSEQ_START instead of using our own creation calls 
llvm-svn: 26142
 2006-02-13 08:55:29 +00:00
Nate Begeman bc3ec1d37b Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/ 
PowerPC/and-imm.ll

llvm-svn: 26136
 2006-02-12 09:09:52 +00:00
Evan Cheng d1b82d8db0 Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
llvm-svn: 26085
 2006-02-09 07:17:49 +00:00
Evan Cheng 6dc90ca172 Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
 2006-02-09 00:37:58 +00:00
Chris Lattner 2e07d6370a Darwin doesn't support #APP/#NO_APP 
llvm-svn: 26066
 2006-02-08 23:42:22 +00:00
Chris Lattner 26e385a623 Rename BSel -> PPCBSel for the benefit of doxygen users. 
Move the methods out of line.
Remove unused Debug.h stuff.
Teach getNumBytesForInstruction to know the size of an inline asm.

llvm-svn: 26064
 2006-02-08 19:33:26 +00:00
Chris Lattner f7b962d7d7 Emit the 'mr' pseudoop for easier reading. 
llvm-svn: 26053
 2006-02-08 06:56:40 +00:00
Chris Lattner b97142eec0 Move emails from nate into public places 
llvm-svn: 26051
 2006-02-08 06:43:51 +00:00
Chris Lattner 203b2f1288 Implement getConstraintType for PPC. 
llvm-svn: 26042
 2006-02-07 20:16:30 +00:00
Chris Lattner 15a6c4c444 Add the simple PPC integer constraints 
llvm-svn: 26027
 2006-02-07 00:47:13 +00:00
Chris Lattner 2bf2c8d7e7 Change prototype 
llvm-svn: 26022
 2006-02-06 22:18:19 +00:00
Jim Laskey 58d48c8118 We seem to have settled to __DWARF for section name. 
llvm-svn: 26015
 2006-02-06 14:16:15 +00:00
Evan Cheng bfa4b7cc75 Complex pattern isel code shouldn't select nodes. 
llvm-svn: 26010
 2006-02-05 08:45:01 +00:00
Evan Cheng 54cb1833a4 Use SelectRoot() as entry of any tblgen based isel. 
llvm-svn: 25997
 2006-02-05 06:46:41 +00:00
Chris Lattner c0e48c6c58 add a note 
llvm-svn: 25984
 2006-02-05 05:27:35 +00:00
Chris Lattner 1b1a8731c0 Use the asmprinter to find out what the preferred alignment of a global is. 
This patch speeds up 172.mgrid from 31.81s to 11.39s on darwin/ppc.
Many many thanks to Nate for tracking down the root cause of the issue.

llvm-svn: 25979
 2006-02-05 01:30:45 +00:00
Nate Begeman a1e895cf97 Remove some stuff that now works 
llvm-svn: 25963
 2006-02-04 07:29:35 +00:00
Chris Lattner 81e66abd1e add a note 
llvm-svn: 25944
 2006-02-03 22:06:45 +00:00
Chris Lattner a23b04acdb remove some target-indep and implemented notes 
llvm-svn: 25930
 2006-02-03 06:22:11 +00:00
Nate Begeman fc567d85d5 Flesh out a couple of the items in the README 
llvm-svn: 25928
 2006-02-03 05:17:06 +00:00
Chris Lattner f0a2d66d1c Add a note 
llvm-svn: 25921
 2006-02-03 01:49:49 +00:00
Chris Lattner 9b178ce225 update a note 
llvm-svn: 25918
 2006-02-02 23:50:22 +00:00
Nate Begeman 4efb328926 add 64b gpr store to the possible list of isStoreToStackSlot opcodes. 
llvm-svn: 25916
 2006-02-02 21:07:50 +00:00
Chris Lattner c327d71e06 implement isStoreToStackSlot for PPC 
llvm-svn: 25914
 2006-02-02 20:16:12 +00:00
Chris Lattner bb53acd03c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
llvm-svn: 25913
 2006-02-02 20:12:32 +00:00
Chris Lattner 9dd7df7ee7 new example 
llvm-svn: 25903
 2006-02-02 07:37:11 +00:00
Nate Begeman cd018525f8 Update the README 
llvm-svn: 25902
 2006-02-02 07:27:56 +00:00
Chris Lattner f7f056751c add a method 
llvm-svn: 25884
 2006-02-01 22:38:46 +00:00
Chris Lattner a983beab37 add a note 
llvm-svn: 25876
 2006-02-01 17:54:23 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Chris Lattner a0527473ac another testcase. 
llvm-svn: 25862
 2006-02-01 00:28:12 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Chris Lattner 0151361d21 add info about the inline asm register constraints for PPC 
llvm-svn: 25853
 2006-01-31 19:20:21 +00:00
Nate Begeman a162f208ee Codegen 
bool %test(int %X) {
  %Y = seteq int %X, 13
  ret bool %Y
}

as

_test:
        addi r2, r3, -13
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

rather than

_test:
        cmpwi cr7, r3, 13
        mfcr r2
        rlwinm r3, r2, 31, 31, 31
        blr

This has very little effect on most code, but speeds up analyzer 23% and
mason 11%

llvm-svn: 25848
 2006-01-31 08:17:29 +00:00
Chris Lattner b0fe138b65 example nate pointed out 
llvm-svn: 25841
 2006-01-31 07:16:34 +00:00
Chris Lattner a9bfca8d1e add the 'lucas' optimization 
llvm-svn: 25830
 2006-01-31 02:55:28 +00:00
Chris Lattner 32058cfb7b Functions that are lazily streamed in from the .bc file are *not* external. 
This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704

llvm-svn: 25793
 2006-01-29 20:49:17 +00:00
Chris Lattner 3072af4d4f Now that OpActions is big enough, we can specify actions for vector types 
llvm-svn: 25784
 2006-01-29 08:41:37 +00:00
Chris Lattner d7738e6b32 disable this for now 
llvm-svn: 25778
 2006-01-29 07:31:33 +00:00
Chris Lattner d33c60b52b Request expansion of ConstantVec nodes. 
llvm-svn: 25773
 2006-01-29 06:32:58 +00:00
Chris Lattner 61c9a8e942 Targets all now request ConstantFP to be legalized into TargetConstantFP. 
'fpimm' in .td files is now TargetConstantFP.

llvm-svn: 25771
 2006-01-29 06:26:08 +00:00
Chris Lattner 30432e07f0 Fix a bug in my elimination of ISD::CALL this morning. PPC now has to 
provide the expansion for i64 calls itself

llvm-svn: 25735
 2006-01-28 07:33:03 +00:00
Chris Lattner 0c7b4666a3 add a note about how we should implement this FIXME from the legalizer: 
// FIXME: revisit this when we have some kind of mechanism by which targets
    // can decided legality of vector constants, of which there may be very
    // many.

llvm-svn: 25733
 2006-01-28 05:40:47 +00:00
Nate Begeman 6c82262289 Add a couple more things to the readme. 
llvm-svn: 25724
 2006-01-28 01:22:10 +00:00
Chris Lattner f424a66524 Use PPCISD::CALL instead of ISD::CALL 
llvm-svn: 25717
 2006-01-27 23:34:02 +00:00
Chris Lattner 4d967a4cbb Make llvm.frame/returnaddr not crash on ppc 
llvm-svn: 25710
 2006-01-27 22:25:06 +00:00
Nate Begeman 8c47c3a3b1 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Evan Cheng d98701c639 Subtarget feature can now set any variable to any value 
llvm-svn: 25678
 2006-01-27 08:09:42 +00:00
Chris Lattner 1240574609 PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Jim Laskey 0bbdc55333 Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. 
Global Variable information is now pulled from "llvm.dbg.globals"

llvm-svn: 25655
 2006-01-26 20:21:46 +00:00
Evan Cheng 030e002fb9 Set SchedulingForLatency to be the default scheduling preference for all. 
llvm-svn: 25607
 2006-01-25 18:52:42 +00:00
Nate Begeman e74795cd70 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Evan Cheng 1092a02619 Default scheduling preference is SchedulingForLatency. 
llvm-svn: 25603
 2006-01-25 09:15:54 +00:00
Jim Laskey 3e65f28ffe Crude Dwarf global variable debugging. 
llvm-svn: 25569
 2006-01-24 00:49:18 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Chris Lattner 469640e506 Add explicit #includes of <iostream> 
llvm-svn: 25509
 2006-01-22 22:53:01 +00:00
Chris Lattner 9436aa74a9 trivial formatting improvement: don't insert extra blank lines between .comm 
vars.

llvm-svn: 25492
 2006-01-21 01:35:26 +00:00
Chris Lattner c3c27032d0 add a note 
llvm-svn: 25439
 2006-01-19 02:09:38 +00:00
Chris Lattner ce5066c863 Don't assert on 'select_cc SETUO' 
llvm-svn: 25423
 2006-01-18 19:42:35 +00:00
Chris Lattner 36eba3a49b fix out of date comment 
llvm-svn: 25422
 2006-01-18 19:37:44 +00:00
Chris Lattner 15e7642ab1 Fix Regression/CodeGen/PowerPC/2006-01-18-InvalidBranchOpcodeAssert.ll 
llvm-svn: 25421
 2006-01-18 19:35:21 +00:00
Jim Laskey 194a5268cb Added minimum Dwarf aranges. Cleaned up some section headers. Line number 
support now works in gdb.

llvm-svn: 25417
 2006-01-18 16:54:26 +00:00
Jim Laskey cc9dfecf81 Add frame work for additional dwarf sections. Comments will improve as code 
is added.

llvm-svn: 25410
 2006-01-17 20:41:40 +00:00
Jim Laskey b9966029fe Adding basic support for Dwarf line number debug information. 
I promise to keep future commits smaller.

llvm-svn: 25396
 2006-01-17 17:31:53 +00:00
Chris Lattner 7c76290038 add notes from my *other* email acct. 
llvm-svn: 25362
 2006-01-16 17:58:54 +00:00
Chris Lattner b2eacf48aa transfer some notes from my email to somewhere useful. 
llvm-svn: 25361
 2006-01-16 17:53:00 +00:00
Chris Lattner 5bd514d7b0 Use the default impl of DYNAMIC_STACKALLOC, allowing us to delete some code. 
llvm-svn: 25334
 2006-01-15 09:02:48 +00:00
Nate Begeman 2fba8a3aaa bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Nate Begeman f2b38dbdc7 Remove some redundant stuff out of the readme. 
llvm-svn: 25308
 2006-01-14 01:24:22 +00:00
Chris Lattner 776c326c96 implement stacksave/stackrestore on PPC 
llvm-svn: 25277
 2006-01-13 17:52:03 +00:00
Chris Lattner 8e2f52e645 expand unsupported stacksave/stackrestore nodes 
llvm-svn: 25272
 2006-01-13 02:42:53 +00:00
Chris Lattner 268d3584fc ahem :) 
llvm-svn: 25239
 2006-01-12 02:05:36 +00:00
Chris Lattner 1014b38404 these cases are autogenerated 
llvm-svn: 25238
 2006-01-12 02:01:45 +00:00
Chris Lattner 44416f92f1 remove dead code 
llvm-svn: 25237
 2006-01-12 01:54:15 +00:00
Chris Lattner 33792a483a Goodbye PPC pattern isel. You have served us well, but it is now time for 
you to ride off into the sunset.

llvm-svn: 25236
 2006-01-12 01:46:07 +00:00
Chris Lattner 2812e79c23 Fix an off-by-one error that Nate's eagle eyes caught 
llvm-svn: 25231
 2006-01-11 23:16:29 +00:00
Chris Lattner dc43a3f237 Use the auto-insert BuildMI constructor to avoid an explicit insert. No 
functionality change, just code cleanup.

llvm-svn: 25230
 2006-01-11 23:07:57 +00:00
Chris Lattner 3280da3cda If a function has a non-zero sized frame, use an add to adjust the stack 
pointer in the epilog, not a load.

llvm-svn: 25229
 2006-01-11 23:03:54 +00:00
Nate Begeman 1b8121b227 Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner 602dfea79c Fix calls that need to store values in stack slots, to not copy the stack 
pointer.  This allows us to emit stuff like this:

        li r10, 0
        stw r10, 56(r1)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

instead of this:

        or r2, r1, r1     ;; Extraneous copy.
        li r10, 0
        stw r10, 56(r2)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

wowness.

llvm-svn: 25221
 2006-01-11 19:55:07 +00:00
Chris Lattner 66f63f72f3 Dead FP arguments still use an incoming FP reg. This fixes 
Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll, which was
distilled from a miscompilation in 252.eon.

llvm-svn: 25217
 2006-01-11 18:21:25 +00:00
Nate Begeman 477933cfbd Remove a comment that no longer applies. 
llvm-svn: 25167
 2006-01-10 00:15:59 +00:00
Chris Lattner 347ed8a581 Give PPCISD:: nodes legible names in dumps. 
llvm-svn: 25166
 2006-01-09 23:52:17 +00:00
Chris Lattner bfb2de9030 add ret void support back 
llvm-svn: 25164
 2006-01-09 23:20:37 +00:00
Evan Cheng 7785e5b3a4 New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 
hasInFlag, hasOutFlag.

llvm-svn: 25155
 2006-01-09 18:28:21 +00:00
Chris Lattner 1185e73cc9 Fix the PPC JIT failures last night, which were due to mishandling of linkonce globals 
llvm-svn: 25141
 2006-01-07 06:22:16 +00:00
Chris Lattner b87030358d linkonce symbols have an extra indirection, just like weak ones do. This fixes 
Prolangs-C++/family and Prolangs-C++/primes.

llvm-svn: 25119
 2006-01-06 01:04:03 +00:00
Chris Lattner 20c88dfd1b Fix a compile crash building MultiSource/Applications/d with the new front-end. 
The PPC backend was generating random shift counts in this case, due to an
uninitialized variable.

llvm-svn: 25114
 2006-01-05 18:32:49 +00:00
Jim Laskey deeafa0f00 Had expand logic backward. 
llvm-svn: 25105
 2006-01-05 01:47:43 +00:00
Jim Laskey 762e9ec06c Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Jim Laskey 219d559824 Applied some recommend changes from sabre. The dominate one beginning "let the 
pass manager do it's thing."  Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.

llvm-svn: 25100
 2006-01-04 22:28:25 +00:00
Jim Laskey 0da76a676a Add unique id to debug location for debug label use (work in progress.) 
llvm-svn: 25096
 2006-01-04 15:04:11 +00:00
Jim Laskey b0609d91c3 Tie dwarf generation to darwin assembler. 
llvm-svn: 25093
 2006-01-04 13:52:30 +00:00
Nate Begeman 336dba6fb1 Add support for generating v4i32 altivec code 
llvm-svn: 25046
 2005-12-30 00:12:56 +00:00
Nate Begeman c2c8a6202f Remove a fixme 
llvm-svn: 25045
 2005-12-30 00:11:07 +00:00
Evan Cheng 14c53b45f5 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Nate Begeman 9aea6e4691 Fix one of the things in the todo file, and get a bit closer to folding 
constant offsets from statics into the address arithmetic.

llvm-svn: 24999
 2005-12-24 01:00:15 +00:00
Evan Cheng 9ae486047e * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
 2005-12-23 22:14:32 +00:00
Chris Lattner c46fc2482c make sure bit_converts are expanded 
llvm-svn: 24978
 2005-12-23 05:13:35 +00:00
Chris Lattner f474034432 Simplify some code by using BIT_CONVERT 
llvm-svn: 24974
 2005-12-23 00:59:59 +00:00
Chris Lattner 177d7af5d5 remove dead code 
llvm-svn: 24965
 2005-12-22 21:16:08 +00:00
Chris Lattner 6b0325aa26 fix handling of weak linkage 
llvm-svn: 24964
 2005-12-22 21:15:17 +00:00
Chris Lattner ffe3542726 move some random notes out of my email into someplace useful 
llvm-svn: 24956
 2005-12-22 17:19:28 +00:00
Evan Cheng dfad8ed54e Bye bye HACKTROCITY. 
llvm-svn: 24935
 2005-12-22 02:26:21 +00:00
Evan Cheng 82285c55aa Flip the meaning of FPContractions to reflect Requires<[]> change. 
llvm-svn: 24884
 2005-12-20 20:08:53 +00:00
Nate Begeman b11b8e44fa Pattern-match return. Includes gross hack! 
llvm-svn: 24874
 2005-12-20 00:26:01 +00:00
Nate Begeman c126397a69 Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows 
us to load and store vectors directly at a pointer (offset of zero) by
using r0 as the base register.  This also requires some asm printer work
to satisfy the darwin assembler.

For
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

We now produce:
_foo:
        lvx v0, 0, r3
        vaddfp v0, v0, v0
        stvx v0, 0, r3
        blr

Instead of:
_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

llvm-svn: 24872
 2005-12-19 23:40:42 +00:00
Nate Begeman 8e6a8af205 Convert load/store over to being pattern matched 
llvm-svn: 24871
 2005-12-19 23:25:09 +00:00
Chris Lattner 2f5fb6a720 This is handled by the autogen'd code 
llvm-svn: 24834
 2005-12-18 21:06:11 +00:00
Jim Laskey 7c462768ed Added source file/line correspondence for dwarf (PowerPC only at this point.) 
llvm-svn: 24748
 2005-12-16 22:45:29 +00:00
Chris Lattner 887af88ce3 Weak and linkonce global vars should still have a .globl emitted for them 
llvm-svn: 24747
 2005-12-16 21:46:14 +00:00