Commit Graph

1853 Commits

Author SHA1 Message Date
Dale Johannesen f5124b36e4 Fix arguments for some Altivec instructions. From SWB.
llvm-svn: 40957
2007-08-09 00:49:19 +00:00
Dale Johannesen 4e7ff3593c Fix spelling of mtvscr and mfvscr.
llvm-svn: 40908
2007-08-07 23:08:00 +00:00
Dale Johannesen c5283ecd6f long double patch 2 of N. Handle it in TargetData.
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)

llvm-svn: 40792
2007-08-03 20:20:50 +00:00
Dan Gohman 5f6a9da530 More explicit keywords.
llvm-svn: 40757
2007-08-02 21:21:54 +00:00
Evan Cheng 58c3c30921 Some out operands were incorrectly specified as input operands.
llvm-svn: 40697
2007-08-01 23:07:38 +00:00
Evan Cheng 581d2795dc Vector fneg must be expanded into fsub -0.0, X.
llvm-svn: 40586
2007-07-30 07:51:22 +00:00
Duncan Sands 644f917358 Support for trampolines, except for X86 codegen which is
still under discussion.

llvm-svn: 40549
2007-07-27 12:58:54 +00:00
Dan Gohman cf0a5349de Don't ignore the return value of AsmPrinter::doInitialization and
AsmPrinter::doFinalization.

llvm-svn: 40487
2007-07-25 19:33:14 +00:00
Nick Lewycky 5805c46e8f Fix debug info and globals filled with zeros.
llvm-svn: 40483
2007-07-25 03:48:45 +00:00
Evan Cheng ac1591be42 No more noResults.
llvm-svn: 40132
2007-07-21 00:34:19 +00:00
Evan Cheng 9d5df0a5f6 Added -print-emitted-asm to print out JIT generated asm to cerr.
llvm-svn: 40123
2007-07-20 21:56:13 +00:00
Evan Cheng 9081ab8127 Oops. These stores actually produce results.
llvm-svn: 40074
2007-07-20 00:20:46 +00:00
Evan Cheng 94b5a80b93 Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
2007-07-19 01:14:50 +00:00
Anton Korobeynikov 383a324735 Long live the exception handling!
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.

llvm-svn: 39855
2007-07-14 14:06:15 +00:00
Dale Johannesen 2182f06f2d Skeleton of post-RA scheduler; doesn't do anything yet.
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.

llvm-svn: 39816
2007-07-13 17:13:54 +00:00
Lauro Ramos Venancio 09d73c0305 Assert when TLS is not implemented.
llvm-svn: 39737
2007-07-11 17:19:51 +00:00
Dan Gohman f8f531bf69 Change getCopyToParts and getCopyFromParts to always use target-endian
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.

llvm-svn: 38471
2007-07-09 20:59:04 +00:00
Chris Lattner 517290ae52 The various "getModuleMatchQuality" implementations should return
zero if they see a target triple they don't understand.

llvm-svn: 38463
2007-07-09 17:25:29 +00:00
Evan Cheng 76a97c5f8a Do away with ImmutablePredicateOperand.
llvm-svn: 37961
2007-07-06 23:22:46 +00:00
Gabor Greif e16561cd5d Here is the bulk of the sanitizing.
Almost all occurrences of "bytecode" in the sources have been eliminated.

llvm-svn: 37913
2007-07-05 17:07:56 +00:00
Evan Cheng ea4a82bcfb PPC conditional branch predicate does not change after isel.
llvm-svn: 37893
2007-07-05 07:09:50 +00:00
John Criswell 2660cef6d7 Convert .cvsignore files
llvm-svn: 37801
2007-06-29 16:35:07 +00:00
Evan Cheng 58d1eacd80 Prevent PPC::BCC first operand, the PRED number, from being isel'd into a LI instruction.
llvm-svn: 37790
2007-06-29 01:25:06 +00:00
Dan Gohman 309d3d51b3 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
2007-06-22 14:59:07 +00:00
Chris Lattner 7936d91f70 describe an argument, hide it.
llvm-svn: 37650
2007-06-19 05:46:06 +00:00
Chris Lattner 944200be45 If a function is vararg, never pass inreg arguments in registers. Thanks to
Anton for half of this patch.

llvm-svn: 37641
2007-06-19 00:13:10 +00:00
Dan Gohman 5c4413120f Rename MVT::getVectorBaseType to MVT::getVectorElementType.
llvm-svn: 37579
2007-06-14 22:58:02 +00:00
Dale Johannesen c68554683d Handle blocks with 2 unconditional branches in AnalyzeBranch.
llvm-svn: 37571
2007-06-13 17:59:52 +00:00
Evan Cheng 5514bbef46 Add a utility routine to check for unpredicated terminator instruction.
llvm-svn: 37528
2007-06-08 21:59:56 +00:00
Nicolas Geoffray cff3e122b0 Implementation of compilation callback in PPC ELF32
llvm-svn: 37340
2007-05-29 16:33:18 +00:00
Dale Johannesen f9cbdc676c name change requested by review of previous patch
llvm-svn: 37289
2007-05-22 18:31:04 +00:00
Dale Johannesen 82810c8a13 Make tail merging the default, except on powerPC. There was no prior art
for a target-dependent default with a command-line override; this way
should be generally usable.

llvm-svn: 37285
2007-05-22 17:14:46 +00:00
Evan Cheng fc94eb66d2 BlockHasNoFallThrough() now returns true if block ends with a return instruction.
llvm-svn: 37266
2007-05-21 18:44:17 +00:00
Dan Gohman c12dd5207d Apply this patch:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html

llvm-svn: 37240
2007-05-18 23:21:46 +00:00
Evan Cheng 99be49dd9b RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
llvm-svn: 37192
2007-05-18 00:05:48 +00:00
Chris Lattner 3e549e9d5f add support for 128-bit add/sub on ppc64
llvm-svn: 37158
2007-05-17 06:52:46 +00:00
Chris Lattner 0b7472da6f fix some subtle inline asm selection issues
llvm-svn: 37067
2007-05-15 01:31:05 +00:00
Evan Cheng d194a8603d PredicateOperand can be used as a normal operand for isel.
llvm-svn: 36947
2007-05-08 21:06:08 +00:00
Evan Cheng f50ba31ec6 R0 is a sub-register of X0, etc.
llvm-svn: 36939
2007-05-08 17:03:51 +00:00
Chris Lattner 90bb4fc96b revert accidental commit
llvm-svn: 36668
2007-05-03 16:40:25 +00:00
Chris Lattner c1a2a3b344 add support for printing offset of global
llvm-svn: 36667
2007-05-03 16:39:48 +00:00
Devang Patel 8c78a0bff0 Drop 'const'
llvm-svn: 36662
2007-05-03 01:11:54 +00:00
Devang Patel e95c6ad802 Use 'static const char' instead of 'static const int'.
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
2007-05-02 21:39:20 +00:00
Devang Patel 09f162ca6a Do not use typeinfo to identify pass in pass manager.
llvm-svn: 36632
2007-05-01 21:15:47 +00:00
Evan Cheng 5662b21db1 eliminateFrameIndex() change.
llvm-svn: 36626
2007-05-01 09:13:03 +00:00
Nate Begeman 27a625a74b llvm bug #1350, parts 1, 2, and 3.
llvm-svn: 36618
2007-05-01 05:57:02 +00:00
Evan Cheng 0ba174534c Match MachineFunction::UsedPhysRegs changes.
llvm-svn: 36452
2007-04-25 22:13:27 +00:00
Evan Cheng 8cd224e81c Relex assertions to account for additional implicit def / use operands.
llvm-svn: 36430
2007-04-25 07:12:14 +00:00
Chris Lattner cb35c61a4b Fix PR1351 and CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
llvm-svn: 36410
2007-04-24 22:51:03 +00:00
Chris Lattner 19ccd6226c Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2
are always unsupported.

llvm-svn: 35835
2007-04-09 22:10:05 +00:00