Commit Graph

37 Commits

Author SHA1 Message Date
Clement Courbet 003e08ff28 [llvm-exegesis] Ignore X86 pseudo instructions.
Summary: They do not lower to actual MCInsts and have no scheduling info.

Reviewers: gchatelet

Subscribers: llvm-commits, tschuett

Differential Revision: https://reviews.llvm.org/D54147

llvm-svn: 346227
2018-11-06 14:11:58 +00:00
Clement Courbet 41c8af3924 [MCSched] Bind PFM Counters to the CPUs instead of the SchedModel.
Summary:
The pfm counters are now in the ExegesisTarget rather than the
MCSchedModel (PR39165).

This also compresses the pfm counter tables (PR37068).

Reviewers: RKSimon, gchatelet

Subscribers: mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D52932

llvm-svn: 345243
2018-10-25 07:44:01 +00:00
Fangrui Song 32401afd8c [llvm-exegesis] Move namespace exegesis inside llvm::
Summary:
This allows simplifying references of llvm::foo with foo when the needs
come in the future.

Reviewers: courbet, gchatelet

Reviewed By: gchatelet

Subscribers: javed.absar, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53455

llvm-svn: 344922
2018-10-22 17:10:47 +00:00
Guillaume Chatelet 02f70a3fde [llvm-exegesis] Mark x86 segment register instructions as unsupported.
Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53499

llvm-svn: 344906
2018-10-22 14:55:43 +00:00
Guillaume Chatelet 3c639f33b4 [llvm-exegesis] Reject x86 instructions that use non uniform memory accesses
Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53438

llvm-svn: 344905
2018-10-22 14:46:08 +00:00
Clement Courbet 8d0dd0ba0e [llvm-exegesis] Mark second-form X87 instructions as unsupported.
Summary:
We only support the first form because we rely on information that is
only available there.

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53430

llvm-svn: 344782
2018-10-19 12:24:49 +00:00
Clement Courbet c51f45239d [llvm-exegesis] X87 RFP setup code.
Summary:
This was lost during refactoring in rL342644.

Fix and simplify simplify value size handling: always go through a 80 bit value,
because the value can be 1 byte). Add unit tests.

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53423

llvm-svn: 344779
2018-10-19 09:56:54 +00:00
Guillaume Chatelet 296a862cbe [llvm-exegesis][NFC] Return many CodeTemplates instead of one.
Summary: This is part one of the change where I simply changed the signature of the functions. More work need to be done to actually produce more than one CodeTemplate per instruction.

Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53209

llvm-svn: 344493
2018-10-15 09:09:19 +00:00
Guillaume Chatelet 946fb0517a [llvm-exegesis][NFC] Simplify code at the cost of small code duplication
Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53198

llvm-svn: 344351
2018-10-12 15:12:22 +00:00
Guillaume Chatelet 9b59238822 [llvm-exegesis][NFC] Pass Instruction instead of bare Opcode
llvm-svn: 344145
2018-10-10 14:57:32 +00:00
Guillaume Chatelet ee9c2a17b8 [llvm-exegesis][NFC] Code simplification
Summary: Simplify code by having LLVMState hold the RegisterAliasingTrackerCache.

Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D53078

llvm-svn: 344143
2018-10-10 14:22:48 +00:00
Guillaume Chatelet 09c2839c02 [llvm-exegesis][NFC] Use accessors for Operand.
Summary:
This moves checking logic into the accessors and makes the structure smaller.
It will also help when/if Operand are generated from the TD files.

Subscribers: tschuett, courbet, llvm-commits

Differential Revision: https://reviews.llvm.org/D52982

llvm-svn: 344028
2018-10-09 08:59:10 +00:00
Guillaume Chatelet 70ac019efa [llvm-exegesis][NFC] moving code around.
Summary: Renaming InstructionBuilder into InstructionTemplate and moving code generation tools from MCInstrDescView to CodeTemplate.

Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D52592

llvm-svn: 343188
2018-09-27 09:23:04 +00:00
Clement Courbet 78b2e73d15 [llvm-exegesis] Allow benchmarking arbitrary code snippets.
Summary:

This is a step towards fixing PR38048.

Note that right now the measurements are given per instruction. We'll
need to give measurements a per code snippet and update the analysis (PR38731).

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D52041

llvm-svn: 342947
2018-09-25 07:31:44 +00:00
Guillaume Chatelet c96a97bac7 [llvm-exegesis] Improve Register Setup (roll forward of D51856).
Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.

Reviewers: courbet, javed.absar

Subscribers: llvm-commits, tschuett, mgorny

Differential Revision: https://reviews.llvm.org/D52297

llvm-svn: 342644
2018-09-20 12:22:18 +00:00
Simon Pilgrim f652ef3d52 Revert rL342465: Added function to set a register to a particular value + tests.
rL342465 is breaking the MSVC buildbots.

llvm-svn: 342490
2018-09-18 15:38:16 +00:00
Simon Pilgrim 0242689725 Revert rL342466: [llvm-exegesis] Improve Register Setup.
rL342465 is breaking the MSVC buildbots, but I need to revert this dependent revision as well.

Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.

Reviewers: courbet, javed.absar

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51856

llvm-svn: 342489
2018-09-18 15:35:49 +00:00
Guillaume Chatelet 937f3fedec [llvm-exegesis] Improve Register Setup.
Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.

Reviewers: courbet, javed.absar

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51856

llvm-svn: 342466
2018-09-18 11:26:48 +00:00
Guillaume Chatelet 8721ad98d1 Added function to set a register to a particular value + tests.
llvm-svn: 342465
2018-09-18 11:26:35 +00:00
Guillaume Chatelet 5ad2909e52 Improve Register Setup
llvm-svn: 342464
2018-09-18 11:26:27 +00:00
Clement Courbet d939f6d013 [llvm-exegesis][NFC] Split BenchmarkRunner class
Summary:
The snippet-generation part goes to the SnippetGenerator class.

This will allow benchmarking arbitrary code (see PR38437).

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51979

llvm-svn: 342117
2018-09-13 07:40:53 +00:00
Guillaume Chatelet e60866a4e0 [llvm-exegesis] Renaming classes and functions.
Summary: Functional No Op.

Reviewers: gchatelet

Subscribers: tschuett, courbet, llvm-commits

Differential Revision: https://reviews.llvm.org/D50231

llvm-svn: 338836
2018-08-03 09:29:38 +00:00
Guillaume Chatelet 171f3f46c8 [llvm-exegesis] Rename InstructionInstance into InstructionBuilder.
Summary: Non functional change.

Subscribers: tschuett, courbet, llvm-commits

Differential Revision: https://reviews.llvm.org/D50176

llvm-svn: 338701
2018-08-02 11:12:02 +00:00
Guillaume Chatelet fb94354d2d [llvm-exegesis] Provide a way to handle memory instructions.
Summary:
And implement memory instructions on X86.

This fixes PR36906.

Reviewers: gchatelet

Reviewed By: gchatelet

Subscribers: lebedev.ri, filcab, mgorny, tschuett, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D48935

llvm-svn: 338567
2018-08-01 14:41:45 +00:00
Clement Courbet f9a0bb330d [llvm-exegesis] Add uop computation for more X87 instruction classes.
Summary:
This allows measuring comparisons (UCOM_FpIr32,UCOM_Fpr32,...),
conditional moves (CMOVBE_Fp32,...)

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48713

llvm-svn: 336352
2018-07-05 13:54:51 +00:00
Clement Courbet e945fad250 [llvm-exegesis] Remove dead comment.
llvm-svn: 336266
2018-07-04 12:31:00 +00:00
Clement Courbet e785169fce [llvm-exegesis] ExegisX86Target::setRegToConstant() should depend on the subtarget features.
Summary: This fixes PR38008.

Reviewers: gchatelet, RKSimon

Subscribers: tschuett, craig.topper, llvm-commits

Differential Revision: https://reviews.llvm.org/D48820

llvm-svn: 336171
2018-07-03 06:17:05 +00:00
Clement Courbet a53349251c [llvm-exegesis][NFC] Cleanup useless braces.
llvm-svn: 336076
2018-07-02 06:39:55 +00:00
Clement Courbet 717c9768d3 [llvm-exegesis] Add partial X87 support.
Summary:
This enables the X86-specific X86FloatingPointStackifierPass, and allow
llvm-exegesis to generate and measure X87 latency/uops for some FP ops.

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48592

llvm-svn: 335815
2018-06-28 07:41:16 +00:00
Clement Courbet 650db339a5 [llvm-exegesis][NFC] Fix windows warning in rL335465.
llvm-svn: 335591
2018-06-26 10:52:41 +00:00
Clement Courbet 4860b98443 [llvm-exegesis] Get the BenchmarkRunner from the ExegesisTarget.
Summary:
This allows targets to override code generation for some instructions.
As an example of override, this also moves ad-hoc instruction filtering
for X86 into the X86 ExegesisTarget.

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48587

llvm-svn: 335582
2018-06-26 08:49:30 +00:00
Clement Courbet a51efc266c [llvm-exegesis] Generate snippet setup code.
Summary:
This ensures that the snippet always sees the same values for registers,
making measurements reproducible.
This will also allow exploring different values.

Reviewers: gchatelet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48542

llvm-svn: 335465
2018-06-25 13:12:02 +00:00
Clement Courbet cff2caac75 [llvm-exegesis][NFC] clang-format
llvm-svn: 335452
2018-06-25 11:22:23 +00:00
Clement Courbet 6fd00e32e5 [llvm-exegesis] Add mechanism to add target-specific passes.
Summary:
createX86FloatingPointStackifierPass is disabled until we handle
TracksLiveness correctly.

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48360

llvm-svn: 335117
2018-06-20 11:54:35 +00:00
Clement Courbet 44b4c54e26 Re-land r335038 "[llvm-exegesis] A mechanism to add target-specific functionality.""
Fix typo: LLVM_NATIVE_ARCH -> LLVM_EXEGESIS_NATIVE_ARCH.

llvm-svn: 335041
2018-06-19 11:28:59 +00:00
Clement Courbet 46751785ee Revert r335038 "[llvm-exegesis] A mechanism to add target-specific functionality."
Breaks buildbots.

llvm-svn: 335040
2018-06-19 10:54:12 +00:00
Clement Courbet 6780b5f97d [llvm-exegesis] A mechanism to add target-specific functionality.
Summary: This is a step towards implementing memory operands and X87.

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48210

llvm-svn: 335038
2018-06-19 10:39:50 +00:00