Commit Graph

290339 Commits

Author SHA1 Message Date
Ekaterina Romanova db5c58ca00 Added a testcase for PR31593. A patch (r291535) that fixed this bug didn't have a testcase.
Differential Revision: https://reviews.llvm.org/D47129

llvm-svn: 333167
2018-05-24 08:45:15 +00:00
Gabor Marton 1f667535cf [ASTImporter] Add unit tests for structural equivalence
Summary:
This patch add new tests for structural equivalence. For that a new
common header is created which holds the test related language specific
types and functions.

Reviewers: a.sidorin, xazax.hun, szepet

Subscribers: rnkovacs, dkrupp, cfe-commits

Differential Revision: https://reviews.llvm.org/D46867

llvm-svn: 333166
2018-05-24 08:41:07 +00:00
Jonas Paulsson 7bcfeab4f2 [ScheduleDAGInstrs / buildSchedGraph] Clear subregister entries also.
In addPhysRegDeps, subregister entries of the defined register were previously
not removed from Uses or Defs, which resulted in extra redundant edges for
subregs around the register definition.

This is principally NFC (in very rare cases some node got a different height).

This makes the DAG more readable and efficient in some cases.

Review: Andy Trick
https://reviews.llvm.org/D46838

llvm-svn: 333165
2018-05-24 08:38:06 +00:00
Simon Atanasyan f6b0c93fb3 [mips] Remove duplicated code from the expandLoadInst. NFC
llvm-svn: 333164
2018-05-24 07:36:18 +00:00
Simon Atanasyan a188267f0a [mips] Remove redundant argument from expandLoadInst/expandStoreInst. NFC
llvm-svn: 333163
2018-05-24 07:36:11 +00:00
Simon Atanasyan be8a42efe2 [mips] Add precondition asserts to the expandLoadInst/expandStoreInst. NFC
llvm-svn: 333162
2018-05-24 07:36:06 +00:00
Simon Atanasyan 478220f1fc [mips] Cleanup the code a bit. NFC
llvm-svn: 333161
2018-05-24 07:36:00 +00:00
Gabor Buella 5219ed89be [X86] NFC Include immintrin.h in CodeGen tests
Following r333110:
"Move all Intel defined intrinsic includes into immintrin.h"

llvm-svn: 333160
2018-05-24 07:09:08 +00:00
Fangrui Song 79420acb96 [demangler] Add ItaniumPartialDemangler::isCtorOrDtor
Reviewers: erik.pilkington, ruiu, echristo, pcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47248

llvm-svn: 333159
2018-05-24 06:57:57 +00:00
Shiva Chen 43bfe84451 [RISCV] Support linker relax function call from auipc and jalr to jal
To do this:
1. Add fixup_riscv_relax fixup types which eventually will
   transfer to R_RISCV_RELAX relocation types.

2. Insert R_RISCV_RELAX relocation types to auipc function call
   expression when linker relaxation enabled.

Differential Revision: https://reviews.llvm.org/D44886

llvm-svn: 333158
2018-05-24 06:21:23 +00:00
Daniel Cederman cfba053491 [Sparc] Use the leon arch for Leon3's when using an external assembler
Summary: This allows the use of the casa instruction available in most Leon3's.

Reviewers: jyknight

Reviewed By: jyknight

Subscribers: joerg, fedor.sergeev, jrtc27, cfe-commits

Differential Revision: https://reviews.llvm.org/D47138

llvm-svn: 333157
2018-05-24 06:16:02 +00:00
Eric Christopher 85f0e505e7 Add Builtins.def support for fread and fwrite to ensure that -fno-builtin-
works with them and test accordingly.

llvm-svn: 333156
2018-05-24 06:09:28 +00:00
Karl-Johan Karlsson 478232d52f [NaryReassociate] Detect deleted instr with WeakVH
Summary:
If NaryReassociate succeed it will, when replacing the old instruction
with the new instruction, also recursively delete trivially
dead instructions from the old instruction. However, if the input to the
NaryReassociate pass contain dead code it is not save to recursively
delete trivially deadinstructions as it might lead to deleting the newly
created instruction.

This patch will fix the problem by using WeakVH to detect this
rare case, when the newly created instruction is dead, and it will then
restart the basic block iteration from the beginning.

This fixes pr37539

Reviewers: tra, meheff, grosser, sanjoy

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47139

llvm-svn: 333155
2018-05-24 06:09:02 +00:00
Eric Christopher c27ad9bbc8 Migrate libcalls-fno-builtin.c test from checking optimized assembly
to checking for attributes on the call site - and fix up builtin
functions that we were testing for but not ensuring wouldn't be
optimized by the backend.

Leave one set of asm tests to make sure that we're also communicating
builtin-ness to TLI.

llvm-svn: 333154
2018-05-24 06:00:50 +00:00
Tom Stellard 1b95fed6f7 AMDGPU/R600: Remove code for handling AMDGPUISD::CLAMP
Summary:
We don't generate AMDGPUISD::CLAMP for R600 now that llvm.AMDGPU.clamp
is gone.

Reviewers: arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D47181

llvm-svn: 333153
2018-05-24 05:28:34 +00:00
Andres Freund 361941283f Revert r333147 "[ORC] Add findSymbolIn() wrapper to C bindings."
This reverts r333147 until https://reviews.llvm.org/D47308 is ready to
be reviewed. r333147 exposed a behavioural difference between
OrcCBindingsStack::findSymbolIn() and OrcCBindingsStack::findSymbol(),
where only the latter does name mangling. After r333147 that causes a
test failure on OSX, because the new test looks for main using
findSymbolIn() but the mangled name is _main.

llvm-svn: 333152
2018-05-24 05:10:19 +00:00
James Y Knight bfc51694af Remove unused include, and corresponding library dependency.
llvm-svn: 333151
2018-05-24 03:42:38 +00:00
Lei Huang f4ec67822f [PowerPC] Remove the match pattern in the definition of LXSDX/STXSDX
The match pattern in the definition of LXSDX is xoaddr, so the Pseudo
instruction XFLOADf64 never gets selected. XFLOADf64 expands to LXSDX/LFDX post
RA based on the register pressure. To avoid ambiguity, we need to remove the
select pattern for LXSDX, same as what was done for LXSD. STXSDX also have
the same issue.

Patch by Qing Shan Zhang (steven.zhang).

Differential Revision: https://reviews.llvm.org/D47178

llvm-svn: 333150
2018-05-24 03:20:28 +00:00
Kostya Serebryany 4d53b744ca [libFuzzer] DataFlow tracer now tags a subset of the input. A separate script merges traces from the subsets
llvm-svn: 333149
2018-05-24 01:43:48 +00:00
Steven Wu 49d7c2f597 [Sema][ObjC] Do not DiagnoseUseOfDecl in LookupMemberExpr
Summary:
Remove the call to DiagnoseUseOfDecl in LookupMemberExpr because:
1. LookupMemberExpr eagerly lookup both getter and setter, reguardless
if they are used or not. It causes wrong diagnostics if you are only
using getter.
2. LookupMemberExpr only diagnoses getter, but not setter.
3. ObjCPropertyOpBuilder already DiagnoseUseOfDecl when building getter
and setter. Doing it again in LookupMemberExpr causes duplicated
diagnostics.

rdar://problem/38479756

Reviewers: erik.pilkington, arphaman, doug.gregor

Reviewed By: arphaman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D47280

llvm-svn: 333148
2018-05-24 01:01:43 +00:00
Andres Freund b0b67b07f5 [ORC] Add findSymbolIn() wrapper to C bindings.
In many cases JIT users will know in which module a symbol
resides. Avoiding to search other modules can be more efficient. It
also allows to handle duplicate symbol names between modules.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D44889

llvm-svn: 333147
2018-05-24 01:01:42 +00:00
Roman Tereshin a4c410d50d [GlobalISel][InstructionSelect] Switching over root LLTs, perf patch 10
This patch continues a series of patches started by r332907 (reapplied
as r332917).

In this commit we introduce new matching opcode for the MatchTable:
GIM_SwitchType, similar to GIM_SwitchOpcode, and use it to switch over
LLTs of def operands of root instructions on the 2nd level of the
MatchTable within GIM_SwitchOpcode's cases.

This is expected to decrease time GlobalISel spends in its
InstructionSelect pass by about 6.5% for an -O0 build as measured on
sqlite3-amalgamation (http://sqlite.org/download.html) targeting
AArch64 (cross-compile on x86).

Reviewers: qcolombet, dsanders, bogner, aemerson, javed.absar

Reviewed By: qcolombet

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D44700

llvm-svn: 333146
2018-05-24 00:24:15 +00:00
Zachary Turner 6cef421b34 Add missing include.
llvm-svn: 333145
2018-05-24 00:11:24 +00:00
Roman Tereshin 5f5e55008f [GlobalISel][InstructionSelect] Moving Reg Bank Checks forward, perf patch 9
This patch continues a series of patches started by r332907 (reapplied
as r332917).

In this commit we move register bank checks back from epilogue of
every rule matcher to a position locally close to the rest of the
checks for a particular (nested) instruction.

This increases the number of common conditions within 2nd level
groups.

This is expected to decrease time GlobalISel spends in its
InstructionSelect pass by about 2% for an -O0 build as measured on
sqlite3-amalgamation (http://sqlite.org/download.html) targeting
AArch64 (cross-compile on x86).

Reviewers: qcolombet, dsanders, bogner, aemerson, javed.absar

Reviewed By: qcolombet

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D44700

llvm-svn: 333144
2018-05-23 23:58:10 +00:00
Zachary Turner 8e8d4b91a8 Break dependency from Core to ObjectFileJIT.
The only reason this was here was so that Module could have a
function called CreateJITModule which created things in a special
order.  Instead of making this specific to creating JIT modules,
I converted this into a template function that can create a module
for any type of object file plugin and just forwards arguments
through.  Since the template is not instantiated in Core, the linker
(and header file) dependency moves to the point where it is
instantiated, which only happens in Expression.  Conceptually, this
location also makes more sense for a dependency on ObjectFileJIT.
After all, we JIT expressions so it's no surprise that Expression
needs to make use of ObjectFileJIT.

Differential Revision: https://reviews.llvm.org/D47228

llvm-svn: 333143
2018-05-23 23:56:09 +00:00
Kostya Serebryany 500ca8713c [libFuzzer] fix two off-by-ones (!!) in the data flow tracer
llvm-svn: 333142
2018-05-23 23:55:54 +00:00
Richard Smith 3e268632cf Use zeroinitializer for (trailing zero portion of) large array initializers
more reliably.

This re-commits r333044 with a fix for PR37560.

llvm-svn: 333141
2018-05-23 23:41:38 +00:00
Adrian Prantl 4672849ead Add a --synchronous option to lldb-mi to facilitate reliable testing.
Patch by Alexander Polyakov!

Differential Revision: https://reviews.llvm.org/D47110

llvm-svn: 333140
2018-05-23 23:33:50 +00:00
Roman Tereshin 152fc1605e [GlobalISel][InstructionSelect] Maximizing # of Group's common conditions, perf patch 8
This patch continues a series of patches started by r332907 (reapplied
as r332917).

In this commit we greedily stuff 2nd level GroupMatcher's common
conditions with as many predicates as possible. This is purely
post-processing and it doesn't change which rules are put into the
groups in the first place: that decision is made by looking at the
first common predicate only.

The compile time improvements are minor and well within error margin,
however, it's highly improbable that this transformation could
pessimize performance, thus I'm still committing it for potential
gains for targets not implementing GlobalISel yet and out of tree
targets.

Reviewers: qcolombet, dsanders, bogner, aemerson, javed.absar

Reviewed By: qcolombet

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D44700

llvm-svn: 333139
2018-05-23 22:50:53 +00:00
Vedant Kumar 7417789317 Move a debug info test into the X86 directory
This test triggers a code path which does not appear to fire on some
targets:

http://lab.llvm.org:8011/builders/clang-cmake-armv8-quick/builds/3028

I've made the test X86-specific in an attempt to address the issue.

llvm-svn: 333138
2018-05-23 22:50:45 +00:00
Mandeep Singh Grang ddcb95664e [RISCV] Lower the tail pseudoinstruction
This patch lowers the tail pseudoinstruction. This has been modeled after ARM's
tail call opt.

llvm-svn: 333137
2018-05-23 22:44:08 +00:00
Jake Ehrlich 767d92e3fb [fuchsia] Add line buffering in RawWrite
This change causes RawWrite to buffer upto 128 bytes or until
a line is reached. This helps group calls into more readable
lines.

llvm-svn: 333136
2018-05-23 22:27:12 +00:00
Roman Tereshin 9e4931834b [GlobalISel][Tablegen] Assign small opcodes to pseudos
Sort pseudo instructions first while emitting enum's for target
instructions info. That puts them close to each other and to generic
G_* opcodes for GlobalISel. This makes it easier to build small jump
tables over opcodes that could be directly embedded into MatchTable's
Tablegen'erated for GlobalISel's InstructionSelect.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D47240

llvm-svn: 333135
2018-05-23 22:10:21 +00:00
James Y Knight 1a05affa80 Remove spurious dependency on Process/elf-core from Process/Utility.
These checks do absolutely nothing other than cause a library layering
violation in the code.

llvm-svn: 333134
2018-05-23 22:04:20 +00:00
Vedant Kumar 9374c0432b [DebugInfo] Maintain DI for sunken bitcasts
When a bitcast is being sunk in -codegenprepare pass, its DI wasn't
copied over to the newly created instruction. This patch fixes that
bug.

Patch by Kareem Ergawy!

Differential Revision: https://reviews.llvm.org/D47282

llvm-svn: 333133
2018-05-23 22:03:48 +00:00
Sameer AbuAsal eadce02741 [RISCV] Set CostPerUse for registers
Summary:
 Set CostPerUse higher for registers that are not used in the compressed
 instruction set. This will influence the greedy register allocator to reduce
 the use of registers that can't be encoded in 16 bit instructions. This
 affects register allocation even when compressed instruction isn't targeted,
 we see no major negative codegen impact.

Reviewers: asb

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, apazos, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang

Differential Revision: https://reviews.llvm.org/D47039

llvm-svn: 333132
2018-05-23 21:34:30 +00:00
Roman Tereshin 9a9fa49cd2 [GlobalISel][InstructionSelect] Sorting MatchTable's 2nd level by root LLT, perf patch 7
This patch continues a series of patches started by r332907 (reapplied
as r332917).

In this commit we sort rules within their 2nd level by the type check
on def operand of the root instruction, which allows for better
nesting grouping on the level.

This is expected to decrease time GlobalISel spends in its
InstructionSelect pass by roughly 22% for an -O0 build as measured on
sqlite3-amalgamation (http://sqlite.org/download.html) targeting
AArch64 (cross-compile on x86).

Reviewers: qcolombet, dsanders, bogner, aemerson, javed.absar

Reviewed By: qcolombet

Subscribers: rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D44700

llvm-svn: 333131
2018-05-23 21:30:16 +00:00
Lang Hames 4c4a2ba353 [RuntimeDyld][MachO] Add support for MachO::ARM64_RELOC_POINTER_TO_GOT reloc.
llvm-svn: 333130
2018-05-23 21:27:07 +00:00
Lang Hames 5216ac9685 [LKH] Add a new IRTransformLayer.
llvm-svn: 333129
2018-05-23 21:27:07 +00:00
Lang Hames 85642262b2 [LKH] Add ObjectTransformLayer2.
llvm-svn: 333128
2018-05-23 21:27:06 +00:00
Lang Hames 4caa2f70ac [LKH] Add a new IRCompileLayer.
llvm-svn: 333127
2018-05-23 21:27:01 +00:00
Richard Smith 08b682bec1 Rework __builtin_classify_type support to better match GCC and to not assert on
unusual types.

Following the observed behavior of GCC, we now return -1 for vector types
(along with all of our extensions that GCC doesn't support), and for atomic
types we classify the underlying type.

GCC appears to have changed its classification for function and array arguments
between version 5 and version 6. Previously it would classify them as pointers
in C and as functions or arrays in C++, but from version 6 onwards, it
classifies them as pointers. We now follow the more recent GCC behavior rather
than emulating what I can only assume to be a historical bug in their C++
support for this builtin.

Finally, no version of GCC that I can find has ever used the "method"
classification for C++ pointers to member functions. Instead, GCC classifies
them as record types, presumably reflecting an internal implementation detail,
but whatever the reason we now produce compatible results.

llvm-svn: 333126
2018-05-23 21:18:00 +00:00
Roman Tereshin 13229aff54 [GlobalISel] NFCI, Getting GlobalISel ~5% faster
by replacing DenseMap with IndexedMap for LLTs within MRI, as
benchmarked by cross-compiling sqlite3 amalgamation for AArch64
on x86 machine.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D46809

llvm-svn: 333125
2018-05-23 21:12:02 +00:00
Craig Topper 3e7d8dfae3 [X86] Move the include of clzerointrin.h from immintrin.h back to x86intrin.h.
This is an AMD intrinsic not an Intel intrinsic so it shouldn't be in immintrin.h

llvm-svn: 333124
2018-05-23 21:04:26 +00:00
Raphael Isemann 83bdfe5e51 [modules] Mark __wmmintrin_pclmul.h/__wmmintrin_aes.h as textual
Summary:
Since clang r332929 these two headers throw errors when included from somewhere else than their wrapper header. It seems marking them as textual is the best way to fix the builds.

Fixes this new module build error:
    While building module '_Builtin_intrinsics' imported from ...:
    In file included from <module-includes>:2:
    In file included from lib/clang/7.0.0/include/immintrin.h:54:
    In file included from lib/clang/7.0.0/include/wmmintrin.h:29:
    lib/clang/7.0.0/include/__wmmintrin_aes.h:25:2: error: "Never use <__wmmintrin_aes.h> directly; include <wmmintrin.h> instead."
    #error "Never use <__wmmintrin_aes.h> directly; include <wmmintrin.h> instead."

Reviewers: rsmith, v.g.vassilev, craig.topper

Reviewed By: craig.topper

Subscribers: craig.topper, cfe-commits

Differential Revision: https://reviews.llvm.org/D47277

llvm-svn: 333123
2018-05-23 20:59:46 +00:00
Kostya Serebryany 4925392897 [libFuzzer] change the output format for the DataFlow tracer
llvm-svn: 333122
2018-05-23 20:57:11 +00:00
Roman Tereshin d760c20c94 [Tablegen] Tidying up InstRegexOp a little, NFC
Differential Review: https://reviews.llvm.org/D47240

llvm-svn: 333121
2018-05-23 20:45:43 +00:00
Alexander Shaposhnikov c7277e6e2b [llvm-strip] Minor fix of the usage of TableGen
This is a small follow-up to the revisions r333117 and r331663.

1. Avoid the name conflicts of the generated variables for prefixes.
2. Apply clang-format -i -style=llvm to llvm-objcopy.cpp once again.
3. Add a test for the flag with double dash.

Test plan: make check-all

llvm-svn: 333120
2018-05-23 20:39:52 +00:00
Kostya Serebryany 28fe54fac8 [libFuzzer] add a stress test for the DataFlow tracer
llvm-svn: 333119
2018-05-23 20:23:33 +00:00
Tobias Grosser 79e3f2c6e2 Update isl to isl-0.19-152-g437e6ab0
Besides normal updates this change also contains a bug-fix to in
isl_coalesce which broke the AOSP buildbot. Thanks to Michael Kruse for
reporting this bug and Sven Verdoolage for fixing this bug.

llvm-svn: 333118
2018-05-23 20:18:50 +00:00