a49e16fefa
implement visitBR_CC so that PowerPC/inverted-bool-compares.ll passes
...
with the dag combiner. This speeds up espresso by 8%, reaching performance
parity with the dag-combiner-disabled llc.
llvm-svn: 23636
2005-10-05 06:47:48 +00:00
b11d15637a
fix some pastos
...
llvm-svn: 23635
2005-10-05 06:37:22 +00:00
06f1d0f73a
Add a new HandleNode class, which is used to handle (haha) cases in the
...
dead node elim and dag combiner passes where the root is potentially updated.
This fixes a fixme in the dag combiner.
llvm-svn: 23634
2005-10-05 06:35:28 +00:00
a6895d180e
Implement the code for PowerPC/inverted-bool-compares.ll, even though it
...
that testcase still does not pass with the dag combiner. This is because
not all forms of br* are folded yet.
Also, when we combine a node into another one, delete the node immediately
instead of waiting for the node to potentially come up in the future.
llvm-svn: 23632
2005-10-05 06:11:08 +00:00
6bd8fd09b6
make sure that -view-isel-dags is the input to the isel, not the input to
...
the second phase of dag combining
llvm-svn: 23631
2005-10-05 06:09:10 +00:00
746d50a01a
Fix a crash compiling Olden/tsp
...
llvm-svn: 23630
2005-10-05 04:45:43 +00:00
3b793c6521
refactor a bit of code.
...
When moving constant entries in 'Map' if the entry is the representative
constant for the abstractypemap, make sure to update it as well. This
fixes the bcreader failures from last night on several C++ apps.
llvm-svn: 23628
2005-10-04 21:35:50 +00:00
dff59118c6
Minor speedup to avoid array searches given a Use*. This speeds up bc reading
...
of the python test from 1:00 to 54s.
llvm-svn: 23627
2005-10-04 18:47:09 +00:00
7a1450dbc6
Change the signature of replaceUsesOfWithOnConstant. The bool was always
...
true dynamically. Finally, pass the Use* that replaceAllUsesWith has into
the method for future use.
llvm-svn: 23626
2005-10-04 18:13:04 +00:00
935aa922e3
For large constants (e.g. arrays and structs with many elements) just
...
creating the keys and doing comparisons to index into 'Map' takes a lot
of time. For these large constants, keep an inverse map so that 'remove'
and move operations are much faster.
This speeds up a release build of the bc reader on Eric's nasty python
bytecode file from 1:39 to 1:00s.
llvm-svn: 23624
2005-10-04 17:48:46 +00:00
5bbf60a5b6
minor cleanup/fastpath for the bcreader. This speeds up the bcreader
...
from 1:41 -> 1:39 on the large python .bc file in a release build.
llvm-svn: 23623
2005-10-04 16:52:46 +00:00
327d4298e1
Reverting to version - until problem isolated.
...
llvm-svn: 23622
2005-10-04 16:41:51 +00:00
d1a5bc8dbd
Add a forward def
...
llvm-svn: 23621
2005-10-04 05:09:20 +00:00
5da6908d65
Fix some faulty logic in the libcall inserter.
...
Since calls return more than one value, don't bail if one of their uses
happens to be a node that's not an MVT::Other when following the chain
from CALLSEQ_START to CALLSEQ_END.
Once we've found a CALLSEQ_START, we can just return; there's no need to
tail-recurse further up the graph.
Most importantly, just because something only has one use doesn't mean we
should use it's one use to follow from start to end. This faulty logic
caused us to follow a chain of one-use FP operations back to a much earlier
call, putting a cycle in the graph from a later start to an earlier end.
This is a better fix that reverting to the workaround committed earlier
today.
llvm-svn: 23620
2005-10-04 02:10:55 +00:00
8760ec73d8
implement the struct version of the array speedup, speeding up the
...
testcase a bit more from 1:48 -> 1.40.
llvm-svn: 23619
2005-10-04 01:17:50 +00:00
20b0754c41
Fix DemoteRegToStack on an invoke. This fixes PR634.
...
llvm-svn: 23618
2005-10-04 00:44:01 +00:00
54fb5002e5
Add back a workaround that fixes some breakages from chris's last change.
...
Neither of us have yet figured out why this code is necessary, but stuff
breaks if its not there. Still tracking this down...
llvm-svn: 23617
2005-10-04 00:37:37 +00:00
4c3b2b536c
Clean up the code a bit. Use isInstructionTriviallyDead to be more aggressive
...
and more correct than use_empty(). This fixes PR635 and
SimplifyCFG/2005-10-02-InvokeSimplify.ll
llvm-svn: 23616
2005-10-03 23:43:43 +00:00
b64419ac40
Change ConstantArray::replaceUsesOfWithOnConstant to attempt to update
...
constant arrays in place instead of reallocating them and replaceAllUsesOf'ing
the result. This speeds up a release build of the bcreader from:
136.987u 120.866s 4:24.38
to
49.790u 49.890s 1:40.14
... a 2.6x speedup parsing a large python bc file.
llvm-svn: 23614
2005-10-03 22:51:37 +00:00
c4062ba65f
move some methods, no other changes
...
llvm-svn: 23613
2005-10-03 21:58:36 +00:00
0144fadc17
minor microoptimizations
...
llvm-svn: 23612
2005-10-03 21:56:24 +00:00
bad09e71d0
Use a map to cache the ModuleType information, so we can do logarithmic
...
lookups instead of linear time lookups. This speeds up bc parsing of a
large file from
137.834u 118.256s 4:27.96
to
132.611u 114.436s 4:08.53
with a release build.
llvm-svn: 23611
2005-10-03 21:26:53 +00:00
409a6b204e
Refactor gathering node info and emission.
...
llvm-svn: 23610
2005-10-03 12:30:32 +00:00
57b21f9f10
clean up this code a bit, no functionality change
...
llvm-svn: 23609
2005-10-03 07:22:07 +00:00
afef68baff
Speed up the asm printer a lot by not printing formatted LLVM asm output
...
for globals
llvm-svn: 23608
2005-10-03 07:08:36 +00:00
5f096e2847
Break the body of the loop out into a new method
...
llvm-svn: 23606
2005-10-03 04:47:08 +00:00
f07a587c79
Make IVUseShouldUsePostIncValue more aggressive when the use is a PHI. In
...
particular, it should realize that phi's use their values in the pred block
not the phi block itself. This change turns our em3d loop from this:
_test:
cmpwi cr0, r4, 0
bgt cr0, LBB_test_2 ; entry.no_exit_crit_edge
LBB_test_1: ; entry.loopexit_crit_edge
li r2, 0
b LBB_test_6 ; loopexit
LBB_test_2: ; entry.no_exit_crit_edge
li r6, 0
LBB_test_3: ; no_exit
or r2, r6, r6
lwz r6, 0(r3)
cmpw cr0, r6, r5
beq cr0, LBB_test_6 ; loopexit
LBB_test_4: ; endif
addi r3, r3, 4
addi r6, r2, 1
cmpw cr0, r6, r4
blt cr0, LBB_test_3 ; no_exit
LBB_test_5: ; endif.loopexit.loopexit_crit_edge
addi r3, r2, 1
blr
LBB_test_6: ; loopexit
or r3, r2, r2
blr
into:
_test:
cmpwi cr0, r4, 0
bgt cr0, LBB_test_2 ; entry.no_exit_crit_edge
LBB_test_1: ; entry.loopexit_crit_edge
li r2, 0
b LBB_test_5 ; loopexit
LBB_test_2: ; entry.no_exit_crit_edge
li r6, 0
LBB_test_3: ; no_exit
lwz r2, 0(r3)
cmpw cr0, r2, r5
or r2, r6, r6
beq cr0, LBB_test_5 ; loopexit
LBB_test_4: ; endif
addi r3, r3, 4
addi r6, r6, 1
cmpw cr0, r6, r4
or r2, r6, r6
blt cr0, LBB_test_3 ; no_exit
LBB_test_5: ; loopexit
or r3, r2, r2
blr
Unfortunately, this is actually worse code, because the register coallescer
is getting confused somehow. If it were doing its job right, it could turn the
code into this:
_test:
cmpwi cr0, r4, 0
bgt cr0, LBB_test_2 ; entry.no_exit_crit_edge
LBB_test_1: ; entry.loopexit_crit_edge
li r6, 0
b LBB_test_5 ; loopexit
LBB_test_2: ; entry.no_exit_crit_edge
li r6, 0
LBB_test_3: ; no_exit
lwz r2, 0(r3)
cmpw cr0, r2, r5
beq cr0, LBB_test_5 ; loopexit
LBB_test_4: ; endif
addi r3, r3, 4
addi r6, r6, 1
cmpw cr0, r6, r4
blt cr0, LBB_test_3 ; no_exit
LBB_test_5: ; loopexit
or r3, r6, r6
blr
... which I'll work on next. :)
llvm-svn: 23604
2005-10-03 02:50:05 +00:00
e4ed42a426
Refactor some code into a function
...
llvm-svn: 23603
2005-10-03 01:04:44 +00:00
360928dbed
This break is bogus and I have no idea why it was there. Basically it prevents
...
memoizing code when IV's are used by phinodes outside of loops. In a simple
example, we were getting this code before (note that r6 and r7 are isomorphic
IV's):
li r6, 0
or r7, r6, r6
LBB_test_3: ; no_exit
lwz r2, 0(r3)
cmpw cr0, r2, r5
or r2, r7, r7
beq cr0, LBB_test_5 ; loopexit
LBB_test_4: ; endif
addi r2, r7, 1
addi r7, r7, 1
addi r3, r3, 4
addi r6, r6, 1
cmpw cr0, r6, r4
blt cr0, LBB_test_3 ; no_exit
Now we get:
li r6, 0
LBB_test_3: ; no_exit
or r2, r6, r6
lwz r6, 0(r3)
cmpw cr0, r6, r5
beq cr0, LBB_test_6 ; loopexit
LBB_test_4: ; endif
addi r3, r3, 4
addi r6, r2, 1
cmpw cr0, r6, r4
blt cr0, LBB_test_3 ; no_exit
this was noticed in em3d.
llvm-svn: 23602
2005-10-03 00:37:33 +00:00
8fcce170cf
when checking if we should move a split edge block outside of a loop,
...
check the presplit pred, not the post-split pred. This was causing us
to make the wrong decision in some cases, leaving the critical edge block
in the loop.
llvm-svn: 23601
2005-10-03 00:31:52 +00:00
9cfccfb517
Fix a problem where the legalizer would run out of stack space on extremely
...
large basic blocks because it was purely recursive. This switches it to an
iterative/recursive hybrid.
llvm-svn: 23596
2005-10-02 17:49:46 +00:00
7f718e61e8
silence a bogus warning
...
llvm-svn: 23595
2005-10-02 16:30:51 +00:00
9982da2703
silence some warnings
...
llvm-svn: 23594
2005-10-02 16:29:36 +00:00
c0e655b65d
silence a warning
...
llvm-svn: 23593
2005-10-02 16:27:59 +00:00
68303a78ff
add patterns for float binops and fma ops
...
llvm-svn: 23592
2005-10-02 07:46:28 +00:00
98da1d9910
Sort the cpu and features table, so that the alpha backend doesn't fail EVERY
...
compile with an assertion that the tables are not sorted!
llvm-svn: 23591
2005-10-02 07:13:52 +00:00
704d97f8b2
Add assertions to the trivial scheduler to check that the value types match
...
up between defs and uses.
llvm-svn: 23590
2005-10-02 07:10:55 +00:00
3734d204b8
another solution to the fsel issue. Instead of having 4 variants, just force
...
the comparison to be 64-bits. This is fine because extensions from float
to double are free.
llvm-svn: 23589
2005-10-02 07:07:49 +00:00
9e98672962
fsel can take a different FP type for the comparison and for the result. As such
...
split the FSEL family into 4 things instead of just two.
llvm-svn: 23588
2005-10-02 06:58:23 +00:00
a17e6c486c
fix an f32/f64 type mismatch
...
llvm-svn: 23587
2005-10-02 06:37:13 +00:00
a038d901fb
Codegen CopyFromReg using the regclass that matches the valuetype of the
...
destination vreg.
llvm-svn: 23586
2005-10-02 06:34:16 +00:00
4155ae0f74
Adjust to change in ctor
...
llvm-svn: 23585
2005-10-02 06:23:51 +00:00
5ab9d42bb4
Minor tweak to the branch selector. When emitting a two-way branch, and if
...
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch. For example, emit this:
LBBl29_z__44:
stw r9, 0(r15)
stw r9, 4(r15)
stw r9, 8(r15)
stw r9, 12(r15)
addi r15, r15, 16
addi r8, r8, 1
cmpw cr0, r8, r28
ble cr0, LBBl29_z__44
b LBBl29_z__48 *** NOT PART OF LOOP
Instead of:
LBBl29_z__44:
stw r9, 0(r15)
stw r9, 4(r15)
stw r9, 8(r15)
stw r9, 12(r15)
addi r15, r15, 16
addi r8, r8, 1
cmpw cr0, r8, r28
bgt cr0, LBBl29_z__48 *** PART OF LOOP!
b LBBl29_z__44
The former sequence has one fewer dispatch group for the loop body.
llvm-svn: 23582
2005-10-01 23:06:26 +00:00
6f4dc51d6f
like the comment says, enable this
...
llvm-svn: 23581
2005-10-01 23:02:40 +00:00
5a7bfe0b72
Add some very paranoid checking for operand/result reg class matchup
...
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0
llvm-svn: 23580
2005-10-01 07:45:09 +00:00
f8a5e5ae6e
Fix VC++ warnings.
...
llvm-svn: 23579
2005-10-01 03:57:14 +00:00
8713ebf37c
fix typo
...
llvm-svn: 23578
2005-10-01 02:51:36 +00:00
d3eee1a09b
Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
...
These are used to represent float and double values, and the two regclasses
contain the same physical registers.
llvm-svn: 23577
2005-10-01 01:35:02 +00:00
fda6944c5b
add a method
...
llvm-svn: 23575
2005-10-01 00:17:07 +00:00
d3850457a1
typo
...
llvm-svn: 23574
2005-10-01 00:08:23 +00:00
9d96932879
1. Simplify the gathering of node groups.
...
2. Printing node groups when displaying nodes.
llvm-svn: 23573
2005-10-01 00:03:07 +00:00
f61232354f
Should be using flag and not chain.
...
llvm-svn: 23572
2005-09-30 23:43:37 +00:00
fbfad0b565
Remove some now-dead code.
...
llvm-svn: 23571
2005-09-30 21:28:27 +00:00
49e48f6234
subtarget support for CIX and FIX extentions (the only 2 I care about right now)
...
llvm-svn: 23569
2005-09-30 20:24:38 +00:00
3fe3841c2a
1. Made things node-centric (from operand).
...
2. Added node groups to handle flagged nodes.
3. Started weaning simple scheduling off existing emitter.
llvm-svn: 23566
2005-09-30 19:15:27 +00:00
c9f4219cfc
Rename MRegisterDesc -> TargetRegisterDesc for consistency
...
llvm-svn: 23564
2005-09-30 17:49:27 +00:00
81f32a2acb
trim down the target info structs now that we have a preferred spill register class for each callee save register
...
Why is V9 maintaining these tables manually? ugh!
llvm-svn: 23561
2005-09-30 17:38:36 +00:00
2e794c9198
now that we have a reg class to spill with, get this info from the regclass
...
llvm-svn: 23559
2005-09-30 17:19:22 +00:00
88025e17c5
constant fold these calls
...
llvm-svn: 23558
2005-09-30 17:16:59 +00:00
bb1c9ecb17
simplify this code using the new regclass info passed in
...
llvm-svn: 23557
2005-09-30 17:12:38 +00:00
51878189c5
Now that we have getCalleeSaveRegClasses() info, use it to pass the register
...
class into the spill/reload methods. Targets can now rely on that argument.
llvm-svn: 23556
2005-09-30 16:59:07 +00:00
8688b92b86
stub out a virtual method
...
llvm-svn: 23554
2005-09-30 06:55:18 +00:00
4984e99b83
CR registers are not used by this "target"
...
llvm-svn: 23552
2005-09-30 06:43:58 +00:00
6169a78f46
these registers don't belong to any register classes, so don't mark them
...
as callee save. They can never be generated by the compiler.
llvm-svn: 23551
2005-09-30 06:42:24 +00:00
33ce5f8a73
Now that self referential classes are supported, get rid of a work-around.
...
llvm-svn: 23544
2005-09-30 04:13:23 +00:00
f6d4173f75
pass extra args
...
llvm-svn: 23539
2005-09-30 01:31:52 +00:00
64ca7cda3f
these methods get extra args
...
llvm-svn: 23538
2005-09-30 01:30:55 +00:00
a654525c1c
Pass extra regclasses into spilling code
...
llvm-svn: 23537
2005-09-30 01:29:42 +00:00
5a6199f387
Change this code ot pass register classes into the stack slot spiller/reloader
...
code. PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.
llvm-svn: 23536
2005-09-30 01:29:00 +00:00
08f157c5b2
Use the 32-bit version for now
...
llvm-svn: 23534
2005-09-30 00:05:05 +00:00
027a2671ef
Add a bunch of patterns for F64 FP ops, add some more integer ops
...
llvm-svn: 23533
2005-09-29 23:34:24 +00:00
1de5706e68
Remove code for patterns that are autogenerated
...
llvm-svn: 23532
2005-09-29 23:33:31 +00:00
a7a83b9255
begining alpha subtarget support
...
llvm-svn: 23531
2005-09-29 22:54:56 +00:00
0a1cd715d4
tblgen autogens this pattern now
...
llvm-svn: 23530
2005-09-29 22:37:24 +00:00
bae1f9d790
copy and paste error
...
llvm-svn: 23528
2005-09-29 21:11:57 +00:00
a748e3ae5b
now that tblgen is smarter, this pattern is not needed. Also, tblgen
...
now inverts commuted versions of ANDC/ORC with the current .td file.
llvm-svn: 23527
2005-09-29 19:29:15 +00:00
a554c9470b
Insert stores after phi nodes in the normal dest. This fixes
...
LowerInvoke/2005-08-03-InvokeWithPHI.ll
llvm-svn: 23525
2005-09-29 17:44:20 +00:00
02d3ba3db8
consistency with other cases, no functionality change
...
llvm-svn: 23524
2005-09-29 17:38:52 +00:00
eca4f56646
Make the JIT default to the DAG isel instead of the pattern isel, like LLC.
...
The Pattern isel has some strange memory corruption issues going on. :(
This should have been converted over anyway, but it got forgotten somehow
when switching to the dag isel.
llvm-svn: 23523
2005-09-29 17:31:03 +00:00
5b2be1f890
Fix two bugs in my patch earlier today that broke int->fp conversion on X86.
...
llvm-svn: 23522
2005-09-29 06:44:39 +00:00
87ef943a4c
Fold isascii into a simple comparison. This speeds up 197.parser by 7.4%,
...
bringing the LLC time down to the CBE time.
llvm-svn: 23521
2005-09-29 06:17:27 +00:00
5f6035feb0
remove a bunch of unneeded stuff, or self evident comments
...
llvm-svn: 23519
2005-09-29 06:16:11 +00:00
c244e7c178
Implement a couple of memcmp folds from the todo list
...
llvm-svn: 23517
2005-09-29 04:54:20 +00:00
b01a41a06d
Silence VC++ redeclaration warnings.
...
llvm-svn: 23516
2005-09-29 01:59:49 +00:00
08c319fbdd
Never rely on ReplaceAllUsesWith when selecting, use CodeGenMap instead.
...
ReplaceAllUsesWith does not replace scalars SDOperand floating around on
the stack, permitting things to be selected multiple times.
llvm-svn: 23515
2005-09-29 00:59:32 +00:00
d4e9e8b7ec
Codegen ADD X, IMM -> addis/addi if needed.
...
This implements PowerPC/fold-li.ll
llvm-svn: 23514
2005-09-28 23:07:13 +00:00
b9b2e77295
Autogen MUL, move FP cases together
...
llvm-svn: 23512
2005-09-28 22:53:16 +00:00
5769311c92
disentangle FP from INT versions of div/mul
...
llvm-svn: 23511
2005-09-28 22:50:24 +00:00
585131baaf
Use the autogenerated matcher for ADD/SUB
...
llvm-svn: 23510
2005-09-28 22:47:28 +00:00
f023b2cda2
add a patter for SUBFIC
...
llvm-svn: 23509
2005-09-28 22:47:06 +00:00
21551ea5ab
Mark int binops as int-only, add FP binops. Mark FADD/FMUL as commutative but
...
not associative. Add [SU]REM.
llvm-svn: 23508
2005-09-28 22:38:27 +00:00
cd002b2461
wrap a long line
...
llvm-svn: 23507
2005-09-28 22:30:58 +00:00
d3ea19b51a
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
...
llvm-svn: 23506
2005-09-28 22:29:58 +00:00
0815dcae3f
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
...
Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
llvm-svn: 23505
2005-09-28 22:29:17 +00:00
6f3b577ee6
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
...
Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
llvm-svn: 23504
2005-09-28 22:28:18 +00:00
7fe6734dff
Mark associative nodes as associative
...
llvm-svn: 23503
2005-09-28 20:58:39 +00:00
b97b054ba7
Nate pointed out that mulh[us] are commutative as well. Thanks!
...
llvm-svn: 23500
2005-09-28 19:01:44 +00:00
89d168ceb3
expose commutativity information
...
llvm-svn: 23498
2005-09-28 18:27:58 +00:00
fab48b3285
All (xor *) cases are autogenerated now
...
llvm-svn: 23497
2005-09-28 18:12:37 +00:00
037d69a404
add support for missed eqv tests
...
llvm-svn: 23496
2005-09-28 18:10:51 +00:00
33f8e08c8f
Implement PowerPC/eqv-andc-orc-nor.ll:EQV3
...
llvm-svn: 23494
2005-09-28 18:04:52 +00:00
8cd7b88a88
learn to codegen not as NOR instead of xoris/xori
...
llvm-svn: 23490
2005-09-28 17:13:15 +00:00
bb5939a436
These nodes are all autogenerated
...
llvm-svn: 23489
2005-09-28 17:07:09 +00:00
ea7214b23d
Constant fold llvm.sqrt
...
llvm-svn: 23487
2005-09-28 01:34:32 +00:00
3b63bb375c
add a note about a way to improve this code further, that I won't be getting
...
to right now.
llvm-svn: 23485
2005-09-27 22:44:59 +00:00
eb953f0ef8
Fix a regression in my previous patch, fixing GlobalOpt/2005-09-27-Crash.ll
...
and PR632.
llvm-svn: 23484
2005-09-27 22:28:11 +00:00
a028e7a39c
Darwin, like many BSD systems, has a setjmp/longjmp which saves the signal mask
...
on setjmp calls and restores it on longjmp calls (both of which require syscalls).
This makes the calls REALLY slow. Use _setjmp/_longjmp instead. This speeds up
hexxagon from 120.31s to 15.68s: from 5.53x slower than GCC to 28% faster than GCC.
llvm-svn: 23482
2005-09-27 22:18:25 +00:00
0fd8f9fbc9
If the target prefers it, use _setjmp/_longjmp should be used instead of setjmp/longjmp for llvm.setjmp/llvm.longjmp.
...
llvm-svn: 23481
2005-09-27 22:15:53 +00:00
59dc1e082c
initialize new flag
...
llvm-svn: 23480
2005-09-27 22:13:56 +00:00
e285f5ed8f
Avoid spilling stack slots... to stack slots.
...
llvm-svn: 23478
2005-09-27 21:33:12 +00:00
87eb249300
Completely rewrite 'correct' eh support. This changes how setjmp insertion
...
is performed so it is only at most once per function that contains an invoke
instead of once per invoke in the function. This patch has the following perks:
1. It fixes PR631, which complains about slowness.
2. If fixes PR240, which complains about non-volatile vars being live across
setjmp/longjmps.
3. It improves (but does not fix) the jmpbuf alignment issue on itanium by not
forcing the jmpbufs to always be 8-bytes off the alignment of the structure.
4. It speeds up 253.perlbmk from 338s to 13.70s (a 25x improvement!), making us
now about 4% faster than GCC.
Further improvements are also possible.
llvm-svn: 23477
2005-09-27 21:18:17 +00:00
92233d2175
Make the pass name simpler
...
llvm-svn: 23476
2005-09-27 21:10:32 +00:00
5635cc069f
fix CBackend/2005-09-27-VolatileFuncPtr.ll
...
llvm-svn: 23475
2005-09-27 20:52:44 +00:00
16cd356fb2
allow demotion to volatile values, add support for invoke
...
llvm-svn: 23473
2005-09-27 19:39:00 +00:00
c628f00845
Make sure to clear the CodeGenMap after each basic block is selected to avoid
...
cross MBB pollution.
llvm-svn: 23470
2005-09-27 17:45:33 +00:00
63523f98d5
Remove some redundancies.
...
llvm-svn: 23469
2005-09-27 17:32:45 +00:00
e7e139e8e8
Split SimpleConstantVal up into its components, so each Constant subclass getsa different enum value. This allows 'classof' for these to be really simple,not needing to call getType() anymore.
...
This speeds up isa/dyncast/etc for constants, and also makes them smaller.
For example, the text section of a release build of InstCombine.cpp shrinks
from 230037 bytes to 216363 bytes, a 6% reduction.
llvm-svn: 23467
2005-09-27 06:09:08 +00:00
3d27e7f27f
Add support for external calls that we know how to constant fold. This implements
...
ctor-list-opt.ll:CTOR8
llvm-svn: 23465
2005-09-27 05:02:43 +00:00
29b2780c8a
Fix a bug where we would evaluate stores into linkonce objects which could be
...
potentially replaced at link-time.
llvm-svn: 23463
2005-09-27 04:50:03 +00:00
65a3a0918f
Implement support for static constructors with calls in them. This is useful
...
because gccas runs globalopt before inlining.
This implements ctor-list-opt.ll:CTOR7
llvm-svn: 23462
2005-09-27 04:45:34 +00:00
da1889b778
Refactor this code a bit, no functionality changes.
...
llvm-svn: 23460
2005-09-27 04:27:01 +00:00
54ec5f2089
Move the post-lsr simplify cfg pass after lowereh, so it can clean up after
...
eh lowering as well.
llvm-svn: 23459
2005-09-27 00:14:41 +00:00
4435b149a0
minor pattern shuffling
...
llvm-svn: 23458
2005-09-26 22:20:16 +00:00
5f2443c8a3
Addition of a simple two pass scheduler. This version is currently hacked up
...
for testing and will require target machine info to do a proper scheduling.
The simple scheduler can be turned on using -sched=simple (defaults
to -sched=none)
llvm-svn: 23455
2005-09-26 21:57:04 +00:00
f2f89af69a
Remove some dead code. ctor evaluation subsumes empty ctor elim
...
llvm-svn: 23453
2005-09-26 20:38:20 +00:00
6bf2cd5735
Add support for alloca, implementing ctor-list-opt.ll:CTOR6
...
llvm-svn: 23452
2005-09-26 17:07:09 +00:00
46d9ff081d
Add a debug printout, fix a crash on kc++
...
llvm-svn: 23450
2005-09-26 07:34:35 +00:00
46af55e0e4
Implement loads/stores through GEP's of globals. This implements
...
ctor-list-opt.ll:CTOR5.
llvm-svn: 23449
2005-09-26 06:52:44 +00:00
61ff32cd70
Replace TraverseGEPInitializer with ConstantFoldLoadThroughGEPConstantExpr
...
llvm-svn: 23447
2005-09-26 05:34:07 +00:00
02ae21e1e0
Eliminate GetGEPGlobalInitializer in favor of the more powerful
...
ConstantFoldLoadThroughGEPConstantExpr function in the utils lib.
llvm-svn: 23446
2005-09-26 05:28:52 +00:00
0b011ec8e2
Factor the GetGEPGlobalInitializer out of this pass and into Transforms/Utils
...
as ConstantFoldLoadThroughGEPConstantExpr.
llvm-svn: 23445
2005-09-26 05:28:06 +00:00
c13c7b9376
Move the ConstantFoldLoadThroughGEPConstantExpr function out of the InstCombine
...
pass.
llvm-svn: 23444
2005-09-26 05:27:10 +00:00
b009663e27
add a comment
...
llvm-svn: 23442
2005-09-26 05:16:34 +00:00
4b05c322d5
Add support for getelementptr, load, and correctly reject volatile stores.
...
llvm-svn: 23441
2005-09-26 05:15:37 +00:00
3e9ea5ffec
Add support for br/brcond/switch and phi
...
llvm-svn: 23439
2005-09-26 04:57:38 +00:00
99e23fa74c
Add a simple interpreter to this code, allowing us to statically evaluate
...
global ctors that are simple enough. This implements ctor-list-opt.ll:CTOR2.
llvm-svn: 23437
2005-09-26 04:44:35 +00:00
696beefabb
factor some code into a InstallGlobalCtors method, add comments. No functionality change.
...
llvm-svn: 23435
2005-09-26 02:31:18 +00:00
838bdc1836
Make the global opt optimizer work on modules with a null terminator, by
...
accepting the null even with a non-65535 init prio
llvm-svn: 23434
2005-09-26 02:19:27 +00:00
41b6a5a693
Factor this code out into a few methods.
...
Implement the start of global ctor optimization. It is currently smart
enough to remove the global ctor for cases like this:
struct foo {
foo() {}
} x;
... saving a bit of startup time for the program.
llvm-svn: 23433
2005-09-26 01:43:45 +00:00
f487768062
Fix some logic I broke that caused a regression on
...
SimplifyLibCalls/2005-05-20-sprintf-crash.ll
llvm-svn: 23430
2005-09-25 07:06:48 +00:00
0b3557f54a
Move MaskedValueIsZero up.
...
Match a bunch of idioms for sign extensions, implementing InstCombine/signext.ll
llvm-svn: 23428
2005-09-24 23:43:33 +00:00
175463a165
Simplify this code a bit by relying on recursive simplification. Support
...
sprintf("%s", P)'s that have uses.
s/hasNUses(0)/use_empty()/
llvm-svn: 23425
2005-09-24 22:17:06 +00:00
cc9c03386f
Add support for a marker byte that indicates that we shouldn't add the user
...
prefix to a symbol name
llvm-svn: 23421
2005-09-24 08:24:28 +00:00
6736a6cdd2
Teach the dag isel generator how to construct arbitrary immediates. The
...
generated isel now tries li then lis, then lis+ori.
llvm-svn: 23418
2005-09-24 00:41:58 +00:00
499e33646e
remove some debugging code
...
llvm-svn: 23411
2005-09-23 18:49:09 +00:00
c59a371d45
Fold two consequtive branches that share a common destination between them.
...
This implements SimplifyCFG/branch-fold.ll, and is useful on ?:/min/max heavy
code
llvm-svn: 23410
2005-09-23 18:47:20 +00:00
3a978bf66d
simplify some logic further
...
llvm-svn: 23408
2005-09-23 07:23:18 +00:00
cc14ebc17b
pull a bunch of logic out of SimplifyCFG into a helper fn
...
llvm-svn: 23407
2005-09-23 06:39:30 +00:00
1e3d3148bb
speed up Archive::isBytecodeArchive in the case when the archive doesn't have
...
an llvm-ranlib symtab. This speeds up gccld -native on an almost empty .o file
from 1.63s to 0.18s.
llvm-svn: 23406
2005-09-23 06:22:58 +00:00
59a05bdde6
Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0 (and move a function)
...
This happens all the time on PPC for bool values, e.g. eliminating a xori
in inverted-bool-compares.ll.
This should be added to the dag combiner as well.
llvm-svn: 23403
2005-09-23 00:55:52 +00:00
b1f8982ff0
Expose the LiveInterval interfaces as public headers.
...
llvm-svn: 23400
2005-09-21 04:19:09 +00:00
6c70106053
Start threading across blocks with code in them, so long as the code does
...
not define a value that is used outside of it's block. This catches many
more simplifications, e.g. 854 in 176.gcc, 137 in vpr, etc.
This implements branch-phi-thread.ll:test3.ll
llvm-svn: 23397
2005-09-20 01:48:40 +00:00
f0bd8d0107
Implement merging of blocks with the same condition if the block has multiple
...
predecessors. This implements branch-phi-thread.ll::test1
llvm-svn: 23395
2005-09-20 00:43:16 +00:00
049cb4482f
Reject a case we don't handle yet
...
llvm-svn: 23393
2005-09-19 23:57:04 +00:00
a160924d57
remove debugging code :-/
...
llvm-svn: 23392
2005-09-19 23:50:15 +00:00
748f903046
Implement SimplifyCFG/branch-phi-thread.ll, the most trivial case of threading
...
control across branches with determined outcomes. More generality to follow.
This triggers a couple thousand times in specint.
llvm-svn: 23391
2005-09-19 23:49:37 +00:00
c760f80fed
Stub out the rest of the DAG Combiner. Just need to fill in the
...
select_cc bits and then wrap it in a convenience function for use with
regular select.
llvm-svn: 23389
2005-09-19 22:34:01 +00:00
2f838f2192
Teach the local spiller to turn stack slot loads into register-register copies
...
when possible, avoiding the load (and avoiding the copy if the value is already
in the right register).
This patch came about when I noticed code like the following being generated:
store R17 -> [SS1]
...blah...
R4 = load [SS1]
This was causing an LSU reject on the G5. This problem was due to the register
allocator folding spill code into a reg-reg copy (producing the load), which
prevented the spiller from being able to rewrite the load into a copy, despite
the fact that the value was already available in a register. In the case
above, we now rip out the R4 load and replace it with a R4 = R17 copy.
This speeds up several programs on X86 (which spills a lot :) ), e.g.
smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from
68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc. This may have a larger
impact in some cases on the G5 (by avoiding LSU rejects), though it probably
won't trigger as often (less spilling in general).
Targets that implement folding of loads/stores into copies should implement
the isLoadFromStackSlot hook to get this.
llvm-svn: 23388
2005-09-19 06:56:21 +00:00
de3c87a2ab
Implement the isLoadFromStackSlot interface
...
llvm-svn: 23387
2005-09-19 05:23:44 +00:00
b4b2530a1a
Refactor this code a bit and make it more general. This now compiles:
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus2 (unsigned int x) { b.j += x; }
To:
_plus2:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
slwi r3, r3, 6
add r3, r4, r3
rlwimi r3, r4, 0, 26, 14
stw r3, 0(r2)
blr
instead of:
_plus2:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
rlwinm r5, r4, 26, 21, 31
add r3, r5, r3
rlwimi r4, r3, 6, 15, 25
stw r4, 0(r2)
blr
by eliminating an 'and'.
I'm pretty sure this is as small as we can go :)
llvm-svn: 23386
2005-09-18 07:22:02 +00:00
797dee7705
Compile
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus2 (unsigned int x) {
b.j += x;
}
to:
plus2:
mov %EAX, DWORD PTR [b]
mov %ECX, %EAX
and %ECX, 131008
mov %EDX, DWORD PTR [%ESP + 4]
shl %EDX, 6
add %EDX, %ECX
and %EDX, 131008
and %EAX, -131009
or %EDX, %EAX
mov DWORD PTR [b], %EDX
ret
instead of:
plus2:
mov %EAX, DWORD PTR [b]
mov %ECX, %EAX
shr %ECX, 6
and %ECX, 2047
add %ECX, DWORD PTR [%ESP + 4]
shl %ECX, 6
and %ECX, 131008
and %EAX, -131009
or %ECX, %EAX
mov DWORD PTR [b], %ECX
ret
llvm-svn: 23385
2005-09-18 06:30:59 +00:00
01f56c68e9
Generalize this transform, using MaskedValueIsZero, allowing us to compile:
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus3 (unsigned int x) { b.k += x; }
To:
plus3:
mov %EAX, DWORD PTR [%ESP + 4]
shl %EAX, 17
add DWORD PTR [b], %EAX
ret
instead of:
plus3:
mov %EAX, DWORD PTR [%ESP + 4]
shl %EAX, 17
mov %ECX, DWORD PTR [b]
add %EAX, %ECX
and %EAX, -131072
and %ECX, 131071
or %ECX, %EAX
mov DWORD PTR [b], %ECX
ret
llvm-svn: 23384
2005-09-18 06:02:59 +00:00
4ebc8ab4e0
fix typeo
...
llvm-svn: 23383
2005-09-18 05:25:20 +00:00
e5b23a6d67
Remove unintentionally committed code
...
llvm-svn: 23382
2005-09-18 05:12:51 +00:00
27cb9dbd35
implement shift.ll:test25. This compiles:
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus3 (unsigned int x) {
b.k += x;
}
to:
_plus3:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r3, 0(r2)
rlwinm r4, r3, 0, 0, 14
add r4, r4, r3
rlwimi r4, r3, 0, 15, 31
stw r4, 0(r2)
blr
instead of:
_plus3:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
srwi r5, r4, 17
add r3, r5, r3
slwi r3, r3, 17
rlwimi r3, r4, 0, 15, 31
stw r3, 0(r2)
blr
llvm-svn: 23381
2005-09-18 05:12:10 +00:00
af517574ce
Implement add.ll:test29. Codegening:
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus1 (unsigned int x) {
b.i += x;
}
as:
_plus1:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
add r3, r4, r3
rlwimi r3, r4, 0, 0, 25
stw r3, 0(r2)
blr
instead of:
_plus1:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
rlwinm r5, r4, 0, 26, 31
add r3, r5, r3
rlwimi r3, r4, 0, 0, 25
stw r3, 0(r2)
blr
llvm-svn: 23379
2005-09-18 04:24:45 +00:00
027eaf01cf
remove debug output
...
llvm-svn: 23377
2005-09-18 03:50:25 +00:00
1521298993
Implement or.ll:test21. This teaches instcombine to be able to turn this:
...
struct {
unsigned int bit0:1;
unsigned int ubyte:31;
} sdata;
void foo() {
sdata.ubyte++;
}
into this:
foo:
add DWORD PTR [sdata], 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [sdata]
mov %ECX, %EAX
add %ECX, 2
and %ECX, -2
and %EAX, 1
or %EAX, %ECX
mov DWORD PTR [sdata], %EAX
ret
llvm-svn: 23376
2005-09-18 03:42:07 +00:00
4d9cf68023
Implement hook for ppc
...
llvm-svn: 23374
2005-09-17 01:03:26 +00:00
24a7eca282
More DAG combining. Still need the branch instructions, and select_cc
...
llvm-svn: 23371
2005-09-16 00:54:12 +00:00
0ebec06671
disable this for now
...
llvm-svn: 23366
2005-09-15 21:44:00 +00:00
9e4a4ee3dc
Give all operands names
...
llvm-svn: 23357
2005-09-14 21:11:13 +00:00
2e84be22a8
give all operands names
...
llvm-svn: 23356
2005-09-14 21:10:24 +00:00
f006d15e7f
Fix some issues exposed by more testing. XORIS had the wrong operands
...
specified. The various *imm operands defined by PPC are really all i32,
even though the actual immediate is restricted to a smaller value in it.
llvm-svn: 23352
2005-09-14 20:53:05 +00:00
6b013fc923
Fix some bugs noticed by new checking code
...
llvm-svn: 23350
2005-09-14 18:18:39 +00:00
a393e4d4b3
Fix the regression last night compiling povray
...
llvm-svn: 23348
2005-09-14 17:32:56 +00:00
b42e962d23
fix a major regression from my patch this afternoon
...
llvm-svn: 23347
2005-09-14 06:06:45 +00:00
b011cb2746
we don't need this proto any longer
...
llvm-svn: 23342
2005-09-13 22:05:21 +00:00
03e08eefc7
move the #include for the generated code into the isel class body so we
...
can use/define class methods
llvm-svn: 23339
2005-09-13 22:03:06 +00:00
0f965a615e
Change the arg lowering code to use copyfromreg from vregs associated
...
with incoming arguments instead of the pregs themselves. This fixes
the scheduler from causing problems by moving a copyfromreg for an argument
to after a select_cc node (now it can, and bad things won't happen).
llvm-svn: 23334
2005-09-13 19:33:40 +00:00
ee8113293e
This has been moved to the target-indep code
...
llvm-svn: 23333
2005-09-13 19:32:18 +00:00
fb96e50b8c
This code is no longer needed, it is moved to the target-indep code
...
llvm-svn: 23332
2005-09-13 19:31:44 +00:00
d4382f0afa
If a function has liveins, and if the target requested that they be plopped
...
into particular vregs, emit copies into the entry MBB.
llvm-svn: 23331
2005-09-13 19:30:54 +00:00
64685b4ca2
Majik numbers are bad
...
llvm-svn: 23330
2005-09-13 19:03:13 +00:00
aa6cbd90c5
Remove some dead vectors
...
llvm-svn: 23329
2005-09-13 18:47:49 +00:00
2a8932960d
Add a simple xform to simplify array accesses with casts in the way.
...
This is useful for 178.galgel where resolution of dope vectors (by the
optimizer) causes the scales to become apparent.
llvm-svn: 23328
2005-09-13 18:36:04 +00:00
fd018c8dfe
Fix an issue where LSR would miss rewriting a use of an IV expression by a PHI node that is not the original PHI.
...
This fixes up a dot-product loop in galgel, speeding it up from 18.47s to
16.13s.
llvm-svn: 23327
2005-09-13 02:09:55 +00:00
567b81f0d2
Add a helper function, allowing us to simplify some code a bit, changing
...
indentation, no functionality change
llvm-svn: 23325
2005-09-13 00:40:14 +00:00
219175c84d
Implement a simple xform to turn code like this:
...
if () { store A -> P; } else { store B -> P; }
into a PHI node with one store, in the most trival case. This implements
load.ll:test10.
llvm-svn: 23324
2005-09-12 23:23:25 +00:00
e0bfdf1485
Another load-peephole optimization: do gcse when two loads are next to
...
each other. This implements InstCombine/load.ll:test9
llvm-svn: 23322
2005-09-12 22:21:03 +00:00
b990f7d8ed
Implement a trivial form of store->load forwarding where the store and the
...
load are exactly consequtive. This is picked up by other passes, but this
triggers thousands of times in fortran programs that use static locals
(and is thus a compile-time speedup).
llvm-svn: 23320
2005-09-12 22:00:15 +00:00
8048b85e8f
Fix a regression from last night, which caused this pass to create invalid
...
code for IV uses outside of loops that are not dominated by the latch block.
We should only convert these uses to use the post-inc value if they ARE
dominated by the latch block.
Also use a new LoopInfo method to simplify some code.
This fixes Transforms/LoopStrengthReduce/2005-09-12-UsesOutOutsideOfLoop.ll
llvm-svn: 23318
2005-09-12 17:11:27 +00:00
b35df5f5bc
Add a new getLoopLatch() method.
...
llvm-svn: 23315
2005-09-12 17:03:55 +00:00
a67648396a
_test:
...
li r2, 0
LBB_test_1: ; no_exit.2
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmpwi cr0, r2, 701
blt cr0, LBB_test_1 ; no_exit.2
LBB_test_2: ; loopexit.2.loopexit
addi r2, r2, 1
stw r2, 0(r4)
blr
[zion ~/llvm]$ cat > ~/xx
Uses of IV's outside of the loop should use hte post-incremented version
of the IV, not the preincremented version. This helps many loops (e.g. in sixtrack)
which used to generate code like this (this is the code from the
dont-hoist-simple-loop-constants.ll testcase):
_test:
li r2, 0 **** IV starts at 0
LBB_test_1: ; no_exit.2
or r5, r2, r2 **** Copy for loop exit
li r2, 0
stw r2, 0(r3)
addi r3, r3, 4
addi r2, r5, 1
addi r6, r5, 2 **** IV+2
cmpwi cr0, r6, 701
blt cr0, LBB_test_1 ; no_exit.2
LBB_test_2: ; loopexit.2.loopexit
addi r2, r5, 2 **** IV+2
stw r2, 0(r4)
blr
And now generated code like this:
_test:
li r2, 1 *** IV starts at 1
LBB_test_1: ; no_exit.2
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmpwi cr0, r2, 701 *** IV.postinc + 0
blt cr0, LBB_test_1
LBB_test_2: ; loopexit.2.loopexit
stw r2, 0(r4) *** IV.postinc + 0
blr
llvm-svn: 23313
2005-09-12 06:04:47 +00:00
530fe6ab30
implement Transforms/LoopStrengthReduce/dont-hoist-simple-loop-constants.ll.
...
We used to emit this code for it:
_test:
li r2, 1 ;; Value tying up a register for the whole loop
li r5, 0
LBB_test_1: ; no_exit.2
or r6, r5, r5
li r5, 0
stw r5, 0(r3)
addi r5, r6, 1
addi r3, r3, 4
add r7, r2, r5 ;; should be addi r7, r5, 1
cmpwi cr0, r7, 701
blt cr0, LBB_test_1 ; no_exit.2
LBB_test_2: ; loopexit.2.loopexit
addi r2, r6, 2
stw r2, 0(r4)
blr
now we emit this:
_test:
li r2, 0
LBB_test_1: ; no_exit.2
or r5, r2, r2
li r2, 0
stw r2, 0(r3)
addi r3, r3, 4
addi r2, r5, 1
addi r6, r5, 2 ;; whoa, fold those adds!
cmpwi cr0, r6, 701
blt cr0, LBB_test_1 ; no_exit.2
LBB_test_2: ; loopexit.2.loopexit
addi r2, r5, 2
stw r2, 0(r4)
blr
more improvement coming.
llvm-svn: 23306
2005-09-10 01:18:45 +00:00
4309c3a785
PowerPC cannot truncstore i1 natively
...
llvm-svn: 23304
2005-09-10 00:21:06 +00:00
2d454bf5be
Allow targets to say they don't support truncstore i1 (which includes a mask
...
when storing to an 8-bit memory location), as most don't.
llvm-svn: 23303
2005-09-10 00:20:18 +00:00
bd39c1a4c6
Add a missing #include, patch courtesy of Baptiste Lepilleur.
...
llvm-svn: 23302
2005-09-09 23:53:39 +00:00
331b311f7b
Fix a problem duraid encountered on itanium where this folding:
...
select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32. Add the zero extend as needed.
llvm-svn: 23301
2005-09-09 23:00:07 +00:00
16e5cb87ba
Fix a crash viewing dags that have target nodes in them
...
llvm-svn: 23300
2005-09-09 22:35:03 +00:00
0f2146bb5d
I forgot that we always spill fp values as 64-bits. Implement spill folding
...
for FP as well. This triggers a couple dozen times on 177.mesa (for example).
llvm-svn: 23299
2005-09-09 21:59:44 +00:00
712e78ee28
Fix a problem that Nate noticed, where spill code was not getting coallesced
...
with copies, leading to code like this:
lwz r4, 380(r1)
or r10, r4, r4 ;; Last use of r4
By teaching the PPC backend how to fold spills into copies, we now get this
code:
lwz r10, 380(r1)
wow. :)
This reduces a testcase nate sent me from 1505 instructions to 1484.
Note that this could handle FP values but doesn't currently, for reasons
mentioned in the patch
llvm-svn: 23298
2005-09-09 21:46:49 +00:00
f540c1a2e8
code cleanup
...
llvm-svn: 23297
2005-09-09 20:51:08 +00:00
1410003751
Use continue in the use-processing loop to make it clear what the early exits
...
are, simplify logic, and cause things to not be nested as deeply. This also
uses MRI->areAliases instead of an explicit loop.
No functionality change, just code cleanup.
llvm-svn: 23296
2005-09-09 20:29:51 +00:00
049b748c76
Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such
...
as setcc and select next.
llvm-svn: 23295
2005-09-09 19:49:52 +00:00
ce3662f2a2
remove debugging code *slaps head*
...
llvm-svn: 23294
2005-09-09 19:19:20 +00:00
c9053083eb
When spilling a live range that is used multiple times by one instruction,
...
only add a reload live range once for the instruction. This is one step
towards fixing a regalloc pessimization that Nate notice, but is later undone
by the spiller (so no code is changed).
llvm-svn: 23293
2005-09-09 19:17:47 +00:00
c37a2f13c4
Teach the code generator that rlwimi is commutable if the rotate amount
...
is zero. This lets the register allocator elide some copies in some cases.
This implements CodeGen/PowerPC/rlwimi-commute.ll
llvm-svn: 23292
2005-09-09 18:17:41 +00:00
39b4d83f6a
Introduce two new concepts:
...
1. Add support for defining Pattern's, which can match expressions when there
is no instruction that directly implements something. Instructions usually
implicitly define patterns.
2. Add support for defining SDNodeXForm's, which are node transformations.
This seperates the concept of a node xform out from the existing predicate
support.
Using this new stuff, we add a few instruction patterns, one for testing, and
two for OR/XOR by an arbitrary immediate.
llvm-svn: 23286
2005-09-09 00:39:56 +00:00
4b09f3c6f5
whitespace/comment changes, no functionality diffs
...
llvm-svn: 23283
2005-09-08 23:17:26 +00:00
85c1cc4523
Move yet more folds over to the dag combiner from sd.cpp
...
llvm-svn: 23278
2005-09-08 20:18:10 +00:00
0ec8fa0880
Add a bunch of stuff needed for node type inference. Move 'BLR' down with
...
the rest of the instructions, add comment markers to seperate portions of
the file into logical parts
llvm-svn: 23277
2005-09-08 19:50:41 +00:00
76cb006e2c
add patterns for x?oris?
...
llvm-svn: 23268
2005-09-08 17:40:49 +00:00
2d8032b54c
add patterns to the addi/addis/mulli etc instructions. Define predicates
...
for matching signed 16-bit and shifted 16-bit ppc immediates
llvm-svn: 23267
2005-09-08 17:33:10 +00:00
cf9b0e6673
Add patterns for some new instructions, allowing the use of the ineg fragment.
...
llvm-svn: 23266
2005-09-08 17:01:54 +00:00
7c8dba750c
ignore generated files
...
llvm-svn: 23263
2005-09-07 23:47:44 +00:00
498915dafa
Remove some cases handled by the generated portion of the isel
...
llvm-svn: 23262
2005-09-07 23:45:15 +00:00
2cc2c9a79c
Another round of dag combiner changes. This fixes some missing XOR folds
...
as well as fixing how we replace old values with new values.
llvm-svn: 23260
2005-09-07 23:25:52 +00:00
5d16dbd5bb
Fix a bug that Tzu-Chien Chiu noticed: live interval analysis does NOT
...
preserve livevar
llvm-svn: 23259
2005-09-07 17:34:39 +00:00
6791d63e55
Implement a common missing fold, (add (add x, c1), c2) -> (add x, c1+c2).
...
This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.
llvm-svn: 23258
2005-09-07 16:09:19 +00:00
5ea0ee7b19
On non-apple systems, when using -march=ppc32, do not print:
...
'' is not a recognized processor for this target (ignoring processor)
Default to "generic" instead of "" for the default CPU.
llvm-svn: 23257
2005-09-07 05:45:33 +00:00
8d0e9d90aa
Print:
...
'' is not a recognized processor for this target (ignoring processor)
instead of:
is not a recognized processor for this target (ignoring processor)
llvm-svn: 23256
2005-09-07 05:44:14 +00:00
fe883adfd2
Fix a bug nate ran into with replacealluseswith. In the recursive cse case,
...
we were losing a node, causing an assertion to fail. Now we eagerly delete
discovered CSE's, and provide an optional vector to keep track of these
discovered equivalences.
llvm-svn: 23255
2005-09-07 05:37:01 +00:00
007c650699
Add an option to the DAG Combiner to enable it for beta runs, and turn on
...
that option for PowerPC's beta.
llvm-svn: 23253
2005-09-07 00:15:36 +00:00
6095214bf0
Implement i64<->fp using the fctidz/fcfid instructions on PowerPC when we
...
are allowed to generate 64-bit-only PowerPC instructions for 32 bit hosts,
such as the PowerPC 970.
This speeds up 189.lucas from 81.99 to 32.64 seconds.
llvm-svn: 23250
2005-09-06 22:03:27 +00:00
a63a066205
Fix up the AssertXext problem, as well as adding it at calls
...
llvm-svn: 23246
2005-09-06 17:00:23 +00:00
e9e2c6d314
Add note about future optimization noted in the ppc compiler writer's guide
...
llvm-svn: 23245
2005-09-06 15:30:48 +00:00
2dded8302a
Add accessor for 64bit flag, so that we can tell when it is safe to
...
generate the fun in-register fp<->long instructions.
llvm-svn: 23244
2005-09-06 15:30:12 +00:00
d23739d020
Next round of DAGCombiner changes. This version now passes all the tests
...
I have run so far when run before Legalize. It still needs to pick up the
SetCC folds, and nodes that use SetCC.
llvm-svn: 23243
2005-09-06 04:43:02 +00:00
c8bd5bda59
revert part of the last change, should fix regressions
...
llvm-svn: 23241
2005-09-04 06:12:19 +00:00
aa833d4571
explicitly specify an operands list for patterns with inputs (e.g. neg)
...
llvm-svn: 23240
2005-09-03 01:28:40 +00:00
8ae9525bd0
include the dag isel fragment
...
llvm-svn: 23239
2005-09-03 01:17:22 +00:00
0442dcfabc
ask for a dag isel
...
llvm-svn: 23238
2005-09-03 01:15:41 +00:00
821628ff2a
Fix a checking failure in gs
...
llvm-svn: 23235
2005-09-03 01:04:40 +00:00
5f12cf14be
Change the isel to not break out of the big giant switch. Instead, the
...
switch should never be exited, so its bottom is now unreachable.
llvm-svn: 23234
2005-09-03 00:53:47 +00:00
9220f92c41
rearrange logical ops to group them together more consistently.
...
Define the PatFrag class which can be used to define subpatterns to match
things with. Define 'not', and use it to define the patterns for andc,
nand, etc.
llvm-svn: 23233
2005-09-03 00:21:51 +00:00
dcbb561b76
Add AND/OR/XOR
...
llvm-svn: 23232
2005-09-02 22:35:53 +00:00
7cea6ef16e
Next round of DAG Combiner changes. Just need to support multiple return
...
values, and then we should be able to hook it up.
llvm-svn: 23231
2005-09-02 21:18:40 +00:00
3a1002d529
Add some initial patterns to simple binary instructions, though they
...
currently don't do anything. This elides patterns for binary operators
that ping on the carry flag, since we don't model it yet.
This patch also removes PPC::SUB, because it is dead.
llvm-svn: 23230
2005-09-02 21:18:00 +00:00
1a570f1fe4
Clean up some code from the last checkin
...
llvm-svn: 23229
2005-09-02 20:32:45 +00:00
630226697f
Fix a bug in legalize where it would emit two calls to libcalls that return
...
i64 values on targets that need that expanded to 32-bit registers. This fixes
PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from
taking 122.72s to 81.96s on my desktop.
llvm-svn: 23228
2005-09-02 20:26:58 +00:00
06e237f253
turn on dag isel by default
...
llvm-svn: 23226
2005-09-02 19:53:54 +00:00
b95b280bee
Make sure to auto-cse nullary ops
...
llvm-svn: 23224
2005-09-02 19:36:17 +00:00
27d628dfc9
Add help support for -mcpu and -mattr.
...
llvm-svn: 23222
2005-09-02 19:27:43 +00:00
1e89e36dcd
Fix some buggy logic where we would try to remove nodes with two operands
...
from the binary ops map, even if they had multiple results. This latent bug
caused a few failures with the dag isel last night.
To prevent stuff like this from happening in the future, add some really
strict checking to make sure that the CSE maps always match up with reality!
llvm-svn: 23221
2005-09-02 19:15:44 +00:00
9690a4f321
Pull out Lowering in preperation for multiple ISels. Oh, and get rid of some stuff
...
llvm-svn: 23220
2005-09-02 18:46:02 +00:00
b0b4ec5655
Don't create zero sized stack objects even for array allocas with a zero
...
number of elements.
llvm-svn: 23219
2005-09-02 18:41:28 +00:00
aa3b1fcc58
Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.
...
Remove the -enable-gpopt option which is subsumed by feature flags.
llvm-svn: 23218
2005-09-02 18:33:05 +00:00
b6cde17d29
Fix the release build, noticed by Eric van Riet Paap
...
llvm-svn: 23215
2005-09-02 07:09:28 +00:00
b5e381a8cf
Fix a problem that Dan Berlin noticed, where reassociation would not succeed
...
in building maximal expressions before simplifying them. In particular, i
cases like this:
X-(A+B+X)
the code would consider A+B+X to be a maximal expression (not understanding
that the single use '-' would be turned into a + later), simplify it (a noop)
then later get simplified again.
Each of these simplify steps is where the cost of reassociation comes from,
so this patch should speed up the already fast pass a bit.
Thanks to Dan for noticing this!
llvm-svn: 23214
2005-09-02 07:07:58 +00:00
Chris Lattner