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Author SHA1 Message Date
Chris Lattner 229878b7bc silence a release mode warning 
llvm-svn: 23868
 2005-10-21 16:01:26 +00:00
Chris Lattner e95b5745c0 Make the coallescer a bit smarter, allowing it to join more live ranges. 
For example, we can now join things like [0-30:0)[31-40:1)[52-59:2)
with [40:60:0) if the 52-59 range is defined by a copy from the 40-60 range.
The resultant range ends up being [0-30:0)[31-60:1).

This fires a lot through-out the test suite (e.g. shrinking bc from
19492 -> 18509 machineinstrs) though most gains are smaller (e.g. about
50 copies eliminated from crafty).

llvm-svn: 23866
 2005-10-21 06:49:50 +00:00
Chris Lattner 76c97afbbc Fix LiveInterval::getOverlapingRanges to take things in the right order 
(an unused method).

Fix the merger so that it can merge ranges like this  [10:12)[16:40) with
[12:38) into [10:40) instead of bogus ranges.  This sort of input will be
possible for the merger coming shortly

llvm-svn: 23865
 2005-10-21 06:41:30 +00:00
Nate Begeman fd0d55ec69 Match rotate. This does actually match the rotates in an rc5 cipher, but I 
haven't seen it fire on our testsuite.

llvm-svn: 23863
 2005-10-21 06:36:18 +00:00
Chris Lattner 5df0e36e98 My previous patch was too conservative. Reject FP and void types, but do 
allow pointer types.

llvm-svn: 23859
 2005-10-21 05:45:41 +00:00
Nate Begeman ae5d9bd65b Don't generate operations that aren't yet supported 
llvm-svn: 23858
 2005-10-21 01:52:45 +00:00
Nate Begeman 62e9e5462c Kill some now-dead code. 
llvm-svn: 23857
 2005-10-21 01:52:20 +00:00
Nate Begeman 8f62cd32ad Fix a typo in the dag combiner, so that this can work on i64 targets 
llvm-svn: 23856
 2005-10-21 01:51:45 +00:00
Andrew Lenharth a099c0131e byte zap not immediate goodness 
llvm-svn: 23855
 2005-10-21 01:24:05 +00:00
Nate Begeman 4dd383120f Invert the TargetLowering flag that controls divide by consant expansion. 
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.

llvm-svn: 23853
 2005-10-21 00:02:42 +00:00
Andrew Lenharth a6a23b5874 Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight 
llvm-svn: 23852
 2005-10-20 23:58:36 +00:00
Chris Lattner a553780e98 Use a literal to define ineg instead of immzero 
llvm-svn: 23851
 2005-10-20 23:30:37 +00:00
Chris Lattner b7b75e1b68 Fix a conditional so we don't access past the end of the range. Thanks to 
Andrew for bringing this to my attn.

llvm-svn: 23850
 2005-10-20 22:50:10 +00:00
Andrew Lenharth d4c0ed74e4 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh 
llvm-svn: 23849
 2005-10-20 19:39:24 +00:00
Andrew Lenharth 7e0e8234f6 add cttz and ctpop 
llvm-svn: 23848
 2005-10-20 19:38:11 +00:00
Nate Begeman 7efe53d90b Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU 
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.

llvm-svn: 23846
 2005-10-20 17:45:03 +00:00
Chris Lattner a6efeb01f9 don't use llabs with apparently VC++ doesn't have 
llvm-svn: 23845
 2005-10-20 17:01:00 +00:00
Chris Lattner 35852fc391 Fix order of eval problem from when I refactored this into a function. 
llvm-svn: 23844
 2005-10-20 16:56:40 +00:00
Andrew Lenharth eb0ad1863b Sounds good, finish the intop conversion. 
llvm-svn: 23843
 2005-10-20 14:42:48 +00:00
Nate Begeman 60bbe2d1e5 Add some more patterns for i64 on ppc 
llvm-svn: 23842
 2005-10-20 07:51:08 +00:00
Chris Lattner 3cf40798ab add a new method, play around with some code. 
Fix a *bug* in the extendIntervalEndTo method.  In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do.  Now produce [0:30).

llvm-svn: 23841
 2005-10-20 07:39:25 +00:00
Chris Lattner 8816353040 Refactor some code, pulling it out into a function. No functionality change. 
llvm-svn: 23839
 2005-10-20 06:06:30 +00:00
Chris Lattner 0c0b38bb4c Do NOT touch FP ops with LSR. This fixes a testcase Nate sent me from an 
inner loop like this:

LBB_RateConvertMono8AltiVec_2:  ; no_exit
        lis r2, ha16(.CPI_RateConvertMono8AltiVec_0)
        lfs f3, lo16(.CPI_RateConvertMono8AltiVec_0)(r2)
        fmr f3, f3
        fadd f0, f2, f0
        fadd f3, f0, f3
        fcmpu cr0, f3, f1
        bge cr0, LBB_RateConvertMono8AltiVec_2  ; no_exit

to an inner loop like this:

LBB_RateConvertMono8AltiVec_1:  ; no_exit
        fsub f2, f2, f1
        fcmpu cr0, f2, f1
        fmr f0, f2
        bge cr0, LBB_RateConvertMono8AltiVec_1  ; no_exit

Doh! good catch!

llvm-svn: 23838
 2005-10-20 04:47:10 +00:00
Chris Lattner fd07fcda67 Add some pattern fragments to simplify the repetitive parts of the patterns 
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.

llvm-svn: 23837
 2005-10-20 04:21:06 +00:00
Chris Lattner cd4be8798f simplify this a bit by using immediates 
llvm-svn: 23836
 2005-10-20 03:57:03 +00:00
Nate Begeman c6f067a8c4 Move the target constant divide optimization up into the dag combiner, so 
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.

llvm-svn: 23835
 2005-10-20 02:15:44 +00:00
Andrew Lenharth 794f15868a forgot this one 
llvm-svn: 23833
 2005-10-20 00:29:02 +00:00
Andrew Lenharth 7b69867052 ret 0; works, not much else 
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.

llvm-svn: 23832
 2005-10-20 00:28:31 +00:00
John Criswell 196e8c1f58 This fixes PR638: 
Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx

llvm-svn: 23831
 2005-10-19 20:07:15 +00:00
Jim Laskey 74ab9960f2 Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830
 2005-10-19 19:51:16 +00:00
Nate Begeman 9f3c26c4ea Write patterns for the various shl and srl patterns that don't involve 
doing something clever.

llvm-svn: 23824
 2005-10-19 18:42:01 +00:00
Jim Laskey 9761100055 Push processor descriptions to the top of target and add command line info. 
llvm-svn: 23820
 2005-10-19 13:34:52 +00:00
Chris Lattner c16b0c387f now that tblgen is smarter, use integers directly. This should help Andrew too 
llvm-svn: 23818
 2005-10-19 04:32:04 +00:00
Chris Lattner 5f37623218 teach ppc backend these are copies 
llvm-svn: 23813
 2005-10-19 01:50:36 +00:00
Chris Lattner 5b6f4dc623 Convert these cases to patterns 
llvm-svn: 23811
 2005-10-19 01:38:02 +00:00
Nate Begeman 9eaa6bac06 Woo, it kinda works. We now generate this atrociously bad, but correct, 
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr

llvm-svn: 23809
 2005-10-19 01:12:32 +00:00
Chris Lattner ecdf842311 apply some tblgen majik to simplify the X register definitions 
llvm-svn: 23805
 2005-10-19 00:17:55 +00:00
Nate Begeman 5172ce641e Teach Legalize how to do something with EXTRACT_ELEMENT when the type of 
the pair of elements is a legal type.

llvm-svn: 23804
 2005-10-19 00:06:56 +00:00
Nate Begeman 92e77502f3 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This 
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.

llvm-svn: 23803
 2005-10-19 00:05:37 +00:00
Nate Begeman 78afac2ddd Add the ability to lower return instructions to TargetLowering. This 
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802
 2005-10-18 23:23:37 +00:00
Chris Lattner 0a71a9ac86 Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero 
sized stack object if either the array size or the type size is zero.

llvm-svn: 23801
 2005-10-18 22:14:06 +00:00
Chris Lattner 8396a308a7 remove hack 
llvm-svn: 23797
 2005-10-18 22:11:42 +00:00
Jim Laskey d812a2e449 Simple edits; remove unimplimented cases and clarify long haul SLU cases. 
llvm-svn: 23788
 2005-10-18 16:59:23 +00:00
Chris Lattner 5a2fb9787b Fix the JIT encoding of LWA, LD, STD, and STDU. 
llvm-svn: 23787
 2005-10-18 16:51:22 +00:00
Jim Laskey c6533006c8 Checking in first round of scheduling tablegen files. Not tied in as yet. 
llvm-svn: 23786
 2005-10-18 16:23:40 +00:00
Chris Lattner 53b9c3ad4c add a case 
llvm-svn: 23785
 2005-10-18 06:30:51 +00:00
Chris Lattner 45517baf9f Add an option to this pass. If it is set, we are allowed to internalize 
all but main.  If it's not set, we can still internalize, but only if an
explicit symbol list is provided.

llvm-svn: 23783
 2005-10-18 06:29:22 +00:00
Chris Lattner 6c14c35bd7 Fold (select C, load A, load B) -> load (select C, A, B). This happens quite 
a lot throughout many programs.  In particular, specfp triggers it a bunch for
constant FP nodes when you have code like  cond ? 1.0 : -1.0.

If the PPC ISel exposed the loads implicit in pic references to external globals,
we would be able to eliminate a load in cases like this as well:

%X = external global int
%Y = external global int
int* %test4(bool %C) {
        %G = select bool %C, int* %X, int* %Y
        ret int* %G
}

Note that this breaks things that use SrcValue's (see the fixme), but since nothing
uses them yet, this is ok.

Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly.

llvm-svn: 23781
 2005-10-18 06:04:22 +00:00
Nate Begeman e74dfbb9ce Do the right thing and enable 64 bit regs under the control of a subtarget 
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.

llvm-svn: 23779
 2005-10-18 00:56:42 +00:00
Nate Begeman 0b71e007ef First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is 
purely mechanical.

llvm-svn: 23778
 2005-10-18 00:28:58 +00:00
Nate Begeman 418c6e4045 Implement some feedback from Chris re: constant canonicalization 
llvm-svn: 23777
 2005-10-18 00:28:13 +00:00
Nate Begeman bd5f41a6a6 Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work. 
llvm-svn: 23776
 2005-10-18 00:27:41 +00:00
Nate Begeman ec48a1bfbd fold fmul X, +2.0 -> fadd X, X; 
llvm-svn: 23774
 2005-10-17 20:40:11 +00:00
Chris Lattner da1b152c43 Make this work for FP constantexprs 
llvm-svn: 23773
 2005-10-17 20:18:38 +00:00
Chris Lattner 7fde91e365 Oops, X+0.0 isn't foldable, but X+-0.0 is. 
llvm-svn: 23772
 2005-10-17 17:56:38 +00:00
Chris Lattner 32979336a7 relax this a bit, as we only support the default rounding mode 
llvm-svn: 23771
 2005-10-17 17:49:32 +00:00
Chris Lattner eeb2bda2fa add a trivial fold 
llvm-svn: 23764
 2005-10-17 01:07:11 +00:00
Nate Begeman 6cca84e43c More PPC32 -> PPC changes, as well as merging some classes that were 
redundant after the change.

llvm-svn: 23759
 2005-10-16 05:39:50 +00:00
Chris Lattner e540800d5a Fix this logic. 
llvm-svn: 23756
 2005-10-15 22:35:40 +00:00
Chris Lattner 17cc9edd33 Add a case we were missing that was causing us to fail CodeGen/PowerPC/rlwinm.ll:test3 
llvm-svn: 23755
 2005-10-15 22:18:08 +00:00
Nate Begeman c0896117d3 Remove some dead code now that the dag combiner exists. 
llvm-svn: 23754
 2005-10-15 22:08:02 +00:00
Chris Lattner d869bec4fe Remove some dead code: the ORI/ORIS cases are autogen'd. This makes 
SelectIntImmediateExpr dead.

llvm-svn: 23753
 2005-10-15 22:06:18 +00:00
Chris Lattner 03354280eb prune #includes 
llvm-svn: 23752
 2005-10-15 21:58:54 +00:00
Chris Lattner a52969c8d6 These instructions are now autogenerated 
llvm-svn: 23751
 2005-10-15 21:44:56 +00:00
Chris Lattner 286c1d7cfa Add a pattern for FSQRTS 
llvm-svn: 23750
 2005-10-15 21:44:15 +00:00
Chris Lattner efa382616b remove dead code 
llvm-svn: 23749
 2005-10-15 21:40:12 +00:00
Chris Lattner b986f471be Use getExtLoad here instead of getNode, as extloads produce two values. This 
fixes a legalize failure on SPASS for itanium.

llvm-svn: 23747
 2005-10-15 20:24:07 +00:00
Chris Lattner e33870d154 remove broken SRA/rlwimi case 
llvm-svn: 23746
 2005-10-15 19:04:48 +00:00
Chris Lattner 6f3b954662 Rename PPC32*.h to PPC*.h 
This completes the grand PPC file renaming

llvm-svn: 23745
 2005-10-14 23:59:06 +00:00
Chris Lattner 0aa794ba5b Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo 
and PPC32JITInfo classes should be merged.

llvm-svn: 23744
 2005-10-14 23:53:41 +00:00
Chris Lattner bfca1ab79d Rename PowerPC*.h to PPC*.h 
llvm-svn: 23743
 2005-10-14 23:51:18 +00:00
Chris Lattner e80bf1b33a Rename PowerPCInstrBuilder.h -> PPC* 
llvm-svn: 23742
 2005-10-14 23:45:43 +00:00
Chris Lattner 2ed745a905 Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine 
still should be merged into the PPC32TargetMachine class

llvm-svn: 23741
 2005-10-14 23:44:05 +00:00
Chris Lattner 7503d46feb Rename PowerPC*.td -> PPC*.td 
llvm-svn: 23740
 2005-10-14 23:40:39 +00:00
Chris Lattner f3b97f53b9 These are dead 
llvm-svn: 23739
 2005-10-14 23:38:51 +00:00
Chris Lattner 0921e3bfc1 Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td 
llvm-svn: 23738
 2005-10-14 23:37:35 +00:00
Chris Lattner 09cd9e7661 Like the comment says... 
llvm-svn: 23737
 2005-10-14 22:48:24 +00:00
Chris Lattner 2121f3ca50 Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions 
from the .td file that correspond to it

llvm-svn: 23736
 2005-10-14 22:44:13 +00:00
Nate Begeman 9d7008b08d Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery

llvm-svn: 23735
 2005-10-14 22:06:00 +00:00
Nate Begeman c41e1be2e8 Remove an unnecsesary file. PPC32 and PPC64 share architected registers. 
We will decide with subtarget support whether we ever use an i64 register
class.

llvm-svn: 23734
 2005-10-14 18:58:46 +00:00
Chris Lattner 56f31f5408 add the integer truncate/extension operations 
llvm-svn: 23733
 2005-10-14 06:40:20 +00:00
Chris Lattner 7d9f719d42 These are now autogenerated 
llvm-svn: 23731
 2005-10-14 06:26:29 +00:00
Chris Lattner 9c0d3c5932 Add patterns for FP round/extend 
llvm-svn: 23727
 2005-10-14 04:55:50 +00:00
Chris Lattner 6e83cbf7f3 add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it 
llvm-svn: 23726
 2005-10-14 04:55:10 +00:00
Nate Begeman 6e673b24d3 fold sext_in_reg, sext_in_reg where both have the same VT. This was 
popping up in Fourinarow.

llvm-svn: 23722
 2005-10-14 01:29:07 +00:00
Chris Lattner e3870fbe4a Allow $ 
llvm-svn: 23721
 2005-10-14 01:28:34 +00:00
Nate Begeman d59e5a7abb Relax the checking on zextload generation a bit, since as sabre pointed out 
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.

Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants.  Woot!

llvm-svn: 23720
 2005-10-14 01:12:21 +00:00
Chris Lattner b8282987f4 Fix the trunc(load) case, finally allowing crafty and povray to pass 
llvm-svn: 23718
 2005-10-13 22:10:05 +00:00
Chris Lattner dbc5ae3109 Fix some bugs in (sext (load x)) 
llvm-svn: 23717
 2005-10-13 21:52:31 +00:00
Chris Lattner 258521d7ea When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chain 
is also legal.  Add support for ExpandOp'ing raw EXTLOADs too.

llvm-svn: 23716
 2005-10-13 21:44:47 +00:00
Chris Lattner d23f4b7411 Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to Legalize 
llvm-svn: 23715
 2005-10-13 20:07:41 +00:00
Nate Begeman 8e022b3d89 Fix the remaining DAGCombiner issues pointed out by sabre. This should fix 
the remainder of the failures introduced by my patch last night.

llvm-svn: 23714
 2005-10-13 18:34:58 +00:00
Chris Lattner a80f1f6e72 Fix a minor bug in the dag combiner that broke pcompress2 and some other 
tests.

llvm-svn: 23713
 2005-10-13 18:16:34 +00:00
Nate Begeman c3a89c5259 Add support to Legalize for expanding i64 sextload/zextload into hi and lo 
parts. This should fix the crafty and signed long long unit test failure
on x86 last night.

llvm-svn: 23711
 2005-10-13 17:15:37 +00:00
Jim Laskey 5d7a50ac44 Inhibit instructions from being pushed before function calls. This will 
minimize unnecessary spilling.

llvm-svn: 23710
 2005-10-13 16:44:00 +00:00
Nate Begeman 02b23c6065 Move some Legalize functionality over to the DAGCombiner where it belongs. 
Kill some dead code.

llvm-svn: 23706
 2005-10-13 03:11:28 +00:00
Nate Begeman 70d28c5e32 Fix a potential bug with two combine-to's back to back that chris pointed 
out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.

Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.

llvm-svn: 23704
 2005-10-12 23:18:53 +00:00
Nate Begeman 8caf81d617 More cool stuff for the dag combiner. We can now finally handle things 
like turning:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

into
_foo:
        fctiwz f0,f1
        stfd f0,-8(r1)
        lhz r3,-2(r1)
        blr

Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.

llvm-svn: 23703
 2005-10-12 20:40:40 +00:00
Jim Laskey 63b1419b74 Finally committing to the new scheduler. Still -sched=none by default. 
llvm-svn: 23702
 2005-10-12 18:29:35 +00:00
Jim Laskey d00db257c7 Added graphviz/gv support for MF. 
llvm-svn: 23700
 2005-10-12 12:09:05 +00:00