The DAGCombiner created illegal BUILD_VECTOR operations.
The patch added a check that either illegal operations are
allowed or that the created operation is legal.
llvm-svn: 125435
Temporarily set the first (canonical) declaration as the previous one, which is the one that
matters, and mark the real previous DeclID to be loaded & attached later on.
Fixes rdar://8956193.
llvm-svn: 125434
are supported by the remote GDB target. We can also now deal with the lack of
vCont support and send packets that the remote GDB stub can use. We also error
out of the continue if LLDB tries to do something too complex when vCont isn't
supported.
llvm-svn: 125433
Teach the AsmMatcher handling to distinguish between an error custom-parsing
an operand and a failure to match. The former should propogate the error
upwards, while the latter should continue attempting to parse with
alternative matchers.
Update the ARM asm parser accordingly.
llvm-svn: 125426
eContextAdjustBaseRegister, eContextRegisterStore and
eContextWriteMemoryRandomBits.
- Implement a version of WriteBits32UnknownToMemory for writing to memory.
- Modify EmulateLDM, EmulateLDMDA, EmulateLDMDB and EmulateLDMIB to use the
eContextAdjustBaseRegister context when appropriate.
- Add code to emulate the STM/STMIA/STMEA Arm instruction.
llvm-svn: 125414
unsigned overflow (e.g. "gep P, -1"), and while they can have
signed wrap in theoretical situations, modelling an AddRec as
not having signed wrap is going enough for any case we can
think of today. In the future if this isn't enough, we can
revisit this. Modeling them as having NUW isn't causing any
known problems either FWIW.
llvm-svn: 125410
The bug happens when the DAGCombiner attempts to optimize one of the patterns
of the SUB opcode. It tries to create a zero of type v2i64. This type is legal
on 32bit machines, but the initializer of this vector (i64) is target dependent.
Currently, the initializer attempts to create an i64 zero constant, which fails.
Added a flag to tell the DAGCombiner to create a legal zero, if we require that
the pass would generate legal types.
llvm-svn: 125391
Change the method name from *LDRRdPCRelative to *LDRRtPCRelative to be compliant
with the ARM Arch Manual which uses Rt for the destination register.
llvm-svn: 125390
is unqualified but its initialized is qualified.
This is for c only and fixes the imm. problem.
c++ is more involved and is wip.
// rdar://8979379
llvm-svn: 125386
This patch contains:
- making some of the existing comments more accurate in the presence
of virtual files/directories.
- renaming some private data members of FileManager to match their roles better.
- creating 'DirectorEntry's for the parent directories of virtual
files, such that we can tell whether two virtual files are from the
same directory. This is useful for injecting virtual files whose
directories don't exist in the real file system.
- minor clean-ups and adding comments for class
FileManager::UniqueDirContainer and FileManager::UniqueFileContainer.
- adding statistics on virtual files to FileManager::PrintStats().
- adding unit tests to verify the existing and new behavior of FileManager.
llvm-svn: 125384
Add new utility function, WriteBits32Unknown
Modify the LDM* instruction emulation functions to call WriteBits32Unknown.
Add missing overview comments to the LDM* instruction emulation functions.
Add code to emulate LDMDA Arm instruction.
llvm-svn: 125377
Nadav Rotem