Krzysztof Parzyszek
952d951418
[Hexagon] Some cleanup of instruction selection code
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llvm-svn: 235552
2015-04-22 21:17:00 +00:00
Colin LeMahieu
0f850bde0e
[Hexagon] Removing old variants of instructions and updating references.
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llvm-svn: 224612
2014-12-19 20:29:29 +00:00
Colin LeMahieu
5ccbb1298b
[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
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llvm-svn: 224556
2014-12-19 00:06:53 +00:00
Colin LeMahieu
174476ed96
Reverting 224550, was not ready for commit.
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llvm-svn: 224552
2014-12-18 23:36:15 +00:00
Colin LeMahieu
9000481cda
[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
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llvm-svn: 224550
2014-12-18 23:27:51 +00:00
Colin LeMahieu
4af437fee5
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
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llvm-svn: 223821
2014-12-09 20:23:30 +00:00
Eric Christopher
fc6de428c8
Have MachineFunction cache a pointer to the subtarget to make lookups
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shorter/easier and have the DAG use that to do the same lookup. This
can be used in the future for TargetMachine based caching lookups from
the MachineFunction easily.
Update the MIPS subtarget switching machinery to update this pointer
at the same time it runs.
llvm-svn: 214838
2014-08-05 02:39:49 +00:00
Eric Christopher
d913448b38
Remove the TargetMachine forwards for TargetSubtargetInfo based
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information and update all callers. No functional change.
llvm-svn: 214781
2014-08-04 21:25:23 +00:00
Craig Topper
906c2cd2e6
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition
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llvm-svn: 207508
2014-04-29 07:58:16 +00:00
Chandler Carruth
8a8cd2bab9
Re-sort all of the includes with ./utils/sort_includes.py so that
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subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.
Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.
llvm-svn: 198685
2014-01-07 11:48:04 +00:00
Krzysztof Parzyszek
9a278f108a
Extend Hexagon hardware loop generation to handle various additional cases:
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- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.
llvm-svn: 174904
2013-02-11 21:37:55 +00:00