Commit Graph

260 Commits

Author SHA1 Message Date
Dan Gohman bcb44baa57 Manage MachineFunctions with an analysis Pass instead of the Annotable
mechanism. To support this, make MachineFunctionPass a little more
complete.

llvm-svn: 77654
2009-07-31 01:52:50 +00:00
Chris Lattner f3239532cc 1. Introduce a new TargetOperandInfo::getRegClass() helper method
and convert code to using it, instead of having lots of things
   poke the isLookupPtrRegClass() method directly.

2. Make PointerLikeRegClass contain a 'kind' int, and store it in
   the existing regclass field of TargetOperandInfo when the
   isLookupPtrRegClass() predicate is set.  Make getRegClass pass
   this into TargetRegisterInfo::getPointerRegClass(), allowing
   targets to have multiple ptr_rc things.

llvm-svn: 77504
2009-07-29 21:10:12 +00:00
Daniel Dunbar 0dd5e1ed39 More migration to raw_ostream, the water has dried up around the iostream hole.
- Some clients which used DOUT have moved to DEBUG. We are deprecating the
   "magic" DOUT behavior which avoided calling printing functions when the
   statement was disabled. In addition to being unnecessary magic, it had the
   downside of leaving code in -Asserts builds, and of hiding potentially
   unnecessary computations.

llvm-svn: 77019
2009-07-25 00:23:56 +00:00
Jakob Stoklund Olesen a385d01cae Verify that there is no kill flag on tied operands on two-address instructions.
This extra check is not trigged when runnning "make check" on top-of-tree.

Change error message to better match llvm_unreachable() grammar.

Don't call llvm_unreachable() when writing error messages to a file, but keep going.

llvm-svn: 75860
2009-07-15 23:37:26 +00:00
Torok Edwin ccb29cd290 Convert more assert(0)+abort() -> LLVM_UNREACHABLE,
and abort()/exit() -> llvm_report_error().

llvm-svn: 75363
2009-07-11 13:10:19 +00:00
Jakob Stoklund Olesen 1c3da3a94b Rename MachineVerifier pass to avoid command line collision.
llvm-svn: 71987
2009-05-17 19:37:14 +00:00
Jakob Stoklund Olesen e61c7a3958 Verify that explicit definitions in the TargetInstrDesc are matched by
explicit register define operands.

llvm-svn: 71933
2009-05-16 07:25:20 +00:00
Jakob Stoklund Olesen c482d14565 Allow redefinition of reserved registers.
llvm-svn: 71932
2009-05-16 07:24:54 +00:00
Duncan Sands bdbc98f3ef Pacify gcc-4.3, which suggests explicit braces here
to avoid an ambiguous else.

llvm-svn: 71924
2009-05-16 03:28:54 +00:00
Jakob Stoklund Olesen 36c027ab18 Pass to verify generated machine code.
The following is checked:

* Operand counts: All explicit operands must be present.

* Register classes: All physical and virtual register operands must be
  compatible with the register class required by the instruction descriptor.

* Register live intervals: Registers must be defined only once, and must be
  defined before use.

The machine code verifier is enabled with the command-line option
'-verify-machineinstrs', or by defining the environment variable
LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive all the
verifier errors.

llvm-svn: 71918
2009-05-16 00:33:53 +00:00