Nadav Rotem
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fdce33a495
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The LIT tests below do not specify the exact cpu model and fail on AVX2 machines, because we select different instructions such as vbroadcast, new shuffles, etc.
Patch by Michael Liao.
llvm-svn: 160129
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2012-07-12 13:45:15 +00:00 |
Evan Cheng
|
648e48d02e
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Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it was generating poor code for some SSE builtins.
llvm-svn: 145448
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2011-11-29 22:48:34 +00:00 |
NAKAMURA Takumi
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ac9ef21f02
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test/CodeGen/X86/vec_shuffle-38.ll: Relax expression for Win32 x64.
llvm-svn: 144067
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2011-11-08 03:46:32 +00:00 |
Evan Cheng
|
91b56e0390
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Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222
llvm-svn: 144052
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2011-11-08 00:31:58 +00:00 |
Bruno Cardoso Lopes
|
333a59eced
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Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss".
llvm-svn: 139686
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2011-09-14 02:36:14 +00:00 |
Evan Cheng
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cb1e5bae4c
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Fix (movhps load) lowering / pattern to match more cases. rdar://10050549
llvm-svn: 138848
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2011-08-31 02:05:24 +00:00 |
Rafael Espindola
|
77242dd537
|
Turn shuffles into unpacks for VT == MVT::v2i64 and MVT::v2f64
too. Patch by Jeff Muizelaar.
llvm-svn: 135789
|
2011-07-22 18:56:05 +00:00 |