Commit Graph

176 Commits

Author SHA1 Message Date
Torok Edwin fbcc663cbf llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640
2009-07-14 16:55:14 +00:00
Torok Edwin 56d0659726 assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379
2009-07-11 20:10:48 +00:00
Bill Wendling 026e5d7667 Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
2009-04-29 23:29:43 +00:00
Bill Wendling 084669a1c9 Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
2009-04-29 00:15:41 +00:00
Bill Wendling 56f2987a87 r70270 isn't ready yet. Back this out. Sorry for the noise.
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
Bill Wendling d0ae15946c Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270
2009-04-28 00:21:31 +00:00
Dan Gohman eefba6bbe0 In the list-burr's pseudo two-addr dependency heuristics, don't
add dependencies on nodes with exactly one successor which is a
COPY_TO_REGCLASS node. In the case that the copy is coalesced
away, the dependence should be on the user of the copy, rather
than the copy itself.

llvm-svn: 69309
2009-04-16 20:59:02 +00:00
Dan Gohman 3027bb6953 Handle SUBREG_TO_REG instructions with the same heuristics
as INSERT_SUBREG instructions in the list-burr scheduler.

llvm-svn: 69308
2009-04-16 20:57:10 +00:00
Dan Gohman f3746cbc56 Minor compile-time optimization; don't bother checking
canClobberPhysRegDefs if the successor node doesn't
clobber any physical registers.

llvm-svn: 67587
2009-03-24 00:50:07 +00:00
Dan Gohman 9a658d72db Add a pre-pass to the burr-list scheduler which makes adjustments to
help out the register pressure reduction heuristics in the case of
nodes with multiple uses. Currently this uses very conservative
heuristics, so it doesn't have a broad impact, but in cases where it
does help it can make a big difference.

llvm-svn: 67586
2009-03-24 00:49:12 +00:00
Dan Gohman ed0e8d44ce When unfolding a load during scheduling, the new operator node has
a data dependency on the load node, so it really needs a
data-dependence edge to the load node, even if the load previously
existed.

And add a few comments.

llvm-svn: 67554
2009-03-23 20:20:43 +00:00
Dan Gohman a366da1bf7 Fix canClobberPhysRegDefs to check all SDNodes grouped together
in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.

llvm-svn: 67531
2009-03-23 16:23:01 +00:00
Evan Cheng 2e55923fba For inline asm output operand that matches an input. Encode the input operand index in the high bits.
llvm-svn: 67387
2009-03-20 18:03:34 +00:00
Dan Gohman a19c662a83 Fix a typo in a comment.
llvm-svn: 66843
2009-03-12 23:55:10 +00:00
Dan Gohman 15af5524a4 Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodes
with multiple chain operands. This can occur when the scheduler
has added chain operands to a node that already has a chain
operand, in order to handle physical register dependencies.

This fixes an llvm-gcc bootstrap failure on x86-64 introduced
in r66058.

llvm-svn: 66240
2009-03-06 02:23:01 +00:00
Evan Cheng b8905c4e2c Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.
llvm-svn: 65996
2009-03-04 01:41:49 +00:00
Evan Cheng b570499c25 Oops. Last second clean up messed things up.
llvm-svn: 64373
2009-02-12 09:52:13 +00:00
Evan Cheng 3a14efacb6 Replace one of burr scheduling heuristic with something more sensible. Now calcMaxScratches simply compute the number of true data dependencies. This actually improve a couple of tests in dejagnu suite as many tests in llvm nightly test suite.
llvm-svn: 64369
2009-02-12 08:59:45 +00:00
Dan Gohman 45889d24fe Fix a comment.
llvm-svn: 64328
2009-02-11 21:32:08 +00:00
Dan Gohman 6571ef3577 Don't use special heuristics for nodes with no data predecessors
unless they actually have data successors, and likewise for nodes
with no data successors unless they actually have data precessors.

llvm-svn: 64327
2009-02-11 21:29:39 +00:00
Dan Gohman 298a2946f1 Delete the heuristic for non-livein CopyFromReg nodes. Non-liveinness
is determined by whether the node has a Flag operand. However, if the
node does have a Flag operand, it will be glued to its register's
def, so the heuristic would end up spuriously applying to whatever
node is the def.

llvm-svn: 64319
2009-02-11 20:25:59 +00:00
Dan Gohman dfaf646c34 When scheduling a block in parts, keep track of the overall
instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.

Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.

llvm-svn: 64288
2009-02-11 04:27:20 +00:00
Dan Gohman b95434356c Factor out more code for computing register live-range informationfor
scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.

In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.

llvm-svn: 64254
2009-02-10 23:27:53 +00:00
Evan Cheng ce3bbe515b Fix PR3457: Ignore control successors when looking for closest scheduled successor. A control successor doesn't read result(s) produced by the scheduling unit being evaluated.
llvm-svn: 64210
2009-02-10 08:30:11 +00:00
Dan Gohman 483377c639 Move ScheduleDAGSDNodes.h to be a private header. Front-ends
that previously included this header should include
SchedulerRegistry.h instead.

llvm-svn: 63937
2009-02-06 17:22:58 +00:00
Dan Gohman 60d6844aa8 Make a few things const, fix some comments, and simplify
some assertions.

llvm-svn: 63328
2009-01-29 19:49:27 +00:00
Dan Gohman 619ef48a52 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.

llvm-svn: 62275
2009-01-15 19:20:50 +00:00
Dan Gohman 1407484178 The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch
this.

It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.

llvm-svn: 62177
2009-01-13 20:24:13 +00:00
Evan Cheng b2c42c648d Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.

llvm-svn: 62074
2009-01-12 03:19:55 +00:00
Evan Cheng 0c4fe2600a Minor debug output tweak.
llvm-svn: 62005
2009-01-09 20:42:34 +00:00
Dan Gohman 261ee6be57 Remove redundant 'else's. No functionality change.
llvm-svn: 61891
2009-01-07 22:30:55 +00:00
Dan Gohman bf8e5204d1 Update these argument lists for the isNormalMemory
argument. This doesn't affect current functionality.

llvm-svn: 61779
2009-01-06 01:28:56 +00:00
Dan Gohman 79c3516912 Use a latency value of 0 for the artificial edges inserted by
AddPseudoTwoAddrDeps. This lets the scheduling infrastructure
avoid recalculating node heights. In very large testcases this
was a major bottleneck. Thanks to Roman Levenstein for finding
this!

As a side effect, fold-pcmpeqd-0.ll is now scheduled better
and it no longer requires spilling on x86-32.

llvm-svn: 61778
2009-01-06 01:19:04 +00:00
Dan Gohman 906152a20f Tidy up #includes, deleting a bunch of unnecessary #includes.
llvm-svn: 61715
2009-01-05 17:59:02 +00:00
Dan Gohman 4d41fdf4ca CommuteNodesToReducePressure() is now removed.
llvm-svn: 61612
2009-01-03 19:19:30 +00:00
Dan Gohman 1be2e9650e Remove the code from the scheduler that commuted two-address
instructions to avoid copies, because TwoAddressInstructionPass
also does this optimization.  The scheduler's version didn't
account for live-out values, which resulted in spurious commutes
and missed opportunities.

Now, TwoAddressInstructionPass handles all the opportunities,
instead of just those that the scheduler missed. The result is
usually the same, though there are occasional trivial differences
resulting from the avoidance of spurious commutes.

llvm-svn: 61611
2009-01-03 18:01:46 +00:00
Dan Gohman 04543e719e Rename BuildSchedUnits to BuildSchedGraph, and refactor the
code in ScheduleDAGSDNodes' BuildSchedGraph into separate functions.

llvm-svn: 61376
2008-12-23 18:36:58 +00:00
Dan Gohman dddc1ac7ea Fix some register-alias-related bugs in the post-RA scheduler liveness
computation code. Also, avoid adding output-depenency edges when both
defs are dead, which frequently happens with EFLAGS defs.

Compute Depth and Height lazily, and always in terms of edge latency
values. For the schedulers that don't care about latency, edge latencies
are set to 1.

Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array.
These are all subsumed by the Depth and Height fields.

llvm-svn: 61073
2008-12-16 03:25:46 +00:00
Dan Gohman 17214e633d Make addPred and removePred return void, since the return value is not
currently used by anything.

llvm-svn: 61066
2008-12-16 01:00:55 +00:00
Dan Gohman 2d170896ee Rewrite the SDep class, and simplify some of the related code.
The Cost field is removed. It was only being used in a very limited way,
to indicate when the scheduler should attempt to protect a live register,
and it isn't really needed to do that. If we ever want the scheduler to
start inserting copies in non-prohibitive situations, we'll have to
rethink some things anyway.

A Latency field is added. Instead of giving each node a single
fixed latency, each edge can have its own latency. This will eventually
be used to model various micro-architecture properties more accurately.

The PointerIntPair class and an internal union are now used, which
reduce the overall size.

llvm-svn: 60806
2008-12-09 22:54:47 +00:00
Dan Gohman 30cad9c192 Make debug output more informative.
llvm-svn: 60524
2008-12-04 02:14:57 +00:00
Dan Gohman ad2134d45d Initial support for anti-dependence breaking. Currently this code does not
introduce any new spilling; it just uses unused registers.

Refactor the SUnit topological sort code out of the RRList scheduler and
make use of it to help with the post-pass scheduler.

llvm-svn: 59999
2008-11-25 00:52:40 +00:00
Dan Gohman 5cc12a8e31 Check in the rest of this change. The isAntiDep flag needs to be passed
to removePred because an SUnit can both data-depend and anti-depend
on the same SUnit.

llvm-svn: 59969
2008-11-24 17:33:52 +00:00
Dan Gohman f00cef4491 Add a flag to SDep for tracking which edges are anti-dependence edges.
llvm-svn: 59785
2008-11-21 02:27:52 +00:00
Dan Gohman 67b35bd4d1 Rename SDep's isSpecial to isArtificial, to make this field a little
less mysterious.

llvm-svn: 59782
2008-11-21 02:18:56 +00:00
Dan Gohman 63be531e09 Remove the CycleBound computation code from the ScheduleDAGRRList
schedulers. This doesn't have much immediate impact because
targets that use these schedulers by default don't yet provide
pipeline information.

This code also didn't have the benefit of register pressure
information. Also, removing it will avoid problems with list-burr
suddenly starting to do latency-oriented scheduling on x86 when we
start providing pipeline data, which would increase spilling.

llvm-svn: 59775
2008-11-21 01:30:54 +00:00
Dan Gohman c602dd407c Change these schedulers to not emit no-ops. It turns out that
the RR scheduler actually does look at latency values, but it
doesn't use a hazard recognizer so it has no way to know when
a no-op is needed, as opposed to just stalling and incrementing
the cycle count.

llvm-svn: 59759
2008-11-21 00:10:42 +00:00
Dan Gohman 8e066a1349 Remove a remnant of list-burr's fast mode.
llvm-svn: 59702
2008-11-20 03:32:45 +00:00
Dan Gohman 186f65d275 Factor out the SethiUllman numbering logic from the list-burr and
list-tdrr schedulers into a common base class.

llvm-svn: 59701
2008-11-20 03:30:37 +00:00
Dan Gohman fd08af4ee7 Remove the "fast" form of the list-burr scheduler, and use the
dedicated "fast" scheduler in -fast mode instead, which is
faster. This speeds up llc -fast by a few percent on some
testcases -- the speedup only happens for code not handled by
fast-isel.

llvm-svn: 59700
2008-11-20 03:11:19 +00:00