Commit Graph

245383 Commits

Author SHA1 Message Date
Simon Pilgrim 0109bf116f [X86][AVX512] Added support for combining target shuffles to AVX512 vpermpd/vpermq/vpermps/vpermd/vpermw
llvm-svn: 284858
2016-10-21 19:18:09 +00:00
Krzysztof Parzyszek 6e7fa99d3a [RDF] Use RegisterId typedef more consistently, NFC
llvm-svn: 284857
2016-10-21 19:12:13 +00:00
Benjamin Kramer 33e9760376 Remove move constructors that are identical to the generated default move ctor.
llvm-svn: 284856
2016-10-21 18:55:07 +00:00
Anna Thomas 0860259434 [StripGCRelocates] New pass to remove gc.relocates added by RS4GC
Summary:
Utility pass to remove gc.relocates created by rewrite statepoints for GC.
With respect to safepoint verification, the IR generated would be incorrect, and cannot run
as such.

This would be a single transformation on the final optimized IR.
The benefit of the pass is for easy analysis when the IRs are 'polluted' by too
many gc.relocates.
Added tests.

test run: All RS4GC tests with -verify option. Local downstream tests on large
IR files. This also works when the pointer being gc.relocated is another
gc.relocate.

Reviewers: sanjoy, reames

Subscribers: beanz, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D25096

llvm-svn: 284855
2016-10-21 18:43:16 +00:00
Chris Bieneman 1bd5f52e68 [CMake] Fix standalone build
not and FileCheck targets may not be defined in standalone builds.

llvm-svn: 284854
2016-10-21 18:38:44 +00:00
Kevin Enderby 41c9c00bf0 For llvm-objdump for Mach-O files add printing of
the ARM_THREAD_STATE in the same format as
otool-classic(1) on darwin.

Also remove an extra space in printing the initprot to make
the output match otool-classic(1) on darwin.

rdar://28851457

llvm-svn: 284852
2016-10-21 18:22:35 +00:00
Jim Ingham e3b7ba2ffe Add the new stdcpp formatters to the Xcode project.
llvm-svn: 284851
2016-10-21 18:18:25 +00:00
Eli Friedman 286c5a76ba [SCEVAffinator] Make precise modular math more correct.
Integer math in LLVM IR is modular. Integer math in isl is
arbitrary-precision. Modeling LLVM IR math correctly in isl requires
either adding assumptions that math doesn't actually overflow, or
explicitly wrapping the math. However, expressions with the "nsw" flag
are special; we can pretend they're arbitrary-precision because it's
undefined behavior if the result wraps. SCEV expressions based on IR
instructions with an nsw flag also carry an nsw flag (roughly; actually,
the real rule is a bit more complicated, but the details don't matter
here).

Before this patch, SCEV flags were also overloaded with an additional
function: the ZExt code was mutating SCEV expressions as a hack to
indicate to checkForWrapping that we don't need to add assumptions to
the operand of a ZExt; it'll add explicit wrapping itself. This kind of
works... the problem is that if anything else ever touches that SCEV
expression, it'll get confused by the incorrect flags.

Instead, with this patch, we make the decision about whether to
explicitly wrap the math a bit earlier, basing the decision purely on
the SCEV expression itself, and not its users.

Differential Revision: https://reviews.llvm.org/D25287

llvm-svn: 284848
2016-10-21 18:08:02 +00:00
Enrico Granata 5a75a0d8f5 I hadn't fixed all the instances of the old marker for scripted format strings; do so now
llvm-svn: 284847
2016-10-21 18:03:55 +00:00
Rui Ueyama fe4c9f96c6 Use FileCheck's -strict-whitespace option instead of sed.
llvm-svn: 284846
2016-10-21 17:50:26 +00:00
Mandeep Singh Grang 48e7add80f [polly] Change SmallPtrSet which are being iterated into SmallSetVector
Summary: Otherwise the lack of an iteration order results in non-determinism in codegen.

Reviewers: _jdoerfert, zinob, grosser

Tags: #polly

Differential Revision: https://reviews.llvm.org/D25863

llvm-svn: 284845
2016-10-21 17:29:10 +00:00
Sanjay Patel 81029f6a76 [DAG] fold negation of sign-bit
0 - X --> 0, if the sub is NUW
0 - X --> 0, if X is 0 or the minimum signed value and the sub is NSW
0 - X --> X, if X is 0 or the minimum signed value

This is the DAG equivalent of:
https://reviews.llvm.org/rL284649

plus the fold for the NUW case which already existed in InstSimplify.

Note that we miss a vector fold because of a deficiency in the DAG version of
computeKnownBits().

llvm-svn: 284844
2016-10-21 17:24:26 +00:00
Artem Belevich 9fb40e3bbd Removed unused function argument. NFC.
Differential Revision: https://reviews.llvm.org/D25839

llvm-svn: 284843
2016-10-21 17:15:46 +00:00
Sanjay Patel 97de8a4c3a [x86] add tests for potential negation folds
These are the backend equivalents for the tests added in r284627.
The patterns may emerge late, so we should have folds for these in the DAG too.

llvm-svn: 284842
2016-10-21 16:56:29 +00:00
Krzysztof Parzyszek b71085b547 [Hexagon] Handle spills of partially defined double vector registers
After register allocation it is possible to have a spill of a register
that is only partially defined. That in itself it fine, but creates a
problem for double vector registers. Stores of such registers are pseudo
instructions that are expanded into pairs of individual vector stores,
and in case of a partially defined source, one of the stores may use
an entirely undefined register. To avoid this, track the defined parts
and only generate actual stores for those.

llvm-svn: 284841
2016-10-21 16:38:29 +00:00
Derek Schuff 6f69783f1f [WebAssembly] Fix for 0xc call_indirect changes
Summary:
Need to reorder the operands to have the callee as the last argument.
Adds a pseudo-instruction, and a pass to lower it into a real
call_indirect.

This is the first of two options for how to fix the problem.

Reviewers: dschuff, sunfish

Subscribers: jfb, beanz, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D25708

llvm-svn: 284840
2016-10-21 16:38:07 +00:00
Abderrazek Zaafrani 9daf8110c8 Set the vectorizer MaxInterleaveFactor for Exynos.
llvm-svn: 284839
2016-10-21 16:28:27 +00:00
Reid Kleckner ac2a2a86e4 Fix -Wunused-variable warning in libFuzzer
llvm-svn: 284838
2016-10-21 16:26:27 +00:00
Simon Pilgrim 372e916a3f [X86][SSE] Regenerated sext/zext constant folding tests and added i686 tests
llvm-svn: 284837
2016-10-21 16:22:16 +00:00
Reid Kleckner 7a2037151c Remove unnecessary x86 backend requirements from OpenMP tests
Clang can generate LLVM IR for x86 without a registered x86 backend.

llvm-svn: 284836
2016-10-21 16:09:20 +00:00
Simon Pilgrim 2d96daa885 [X86] Use DAG::getBuildVector helper wrapper where possible. NFCI.
llvm-svn: 284835
2016-10-21 16:07:51 +00:00
Konstantin Zhuravlyov 0ff17b627d [MachineMemOperand][AtomicSDNode] Remove getSuccessOrdering()
Differential Revision: https://reviews.llvm.org/D25786

llvm-svn: 284834
2016-10-21 16:02:35 +00:00
Simon Pilgrim 098bd72804 [X86][SSE] Regenerated chained pmovsx store tests and added i686 tests
llvm-svn: 284833
2016-10-21 15:51:24 +00:00
Abderrazek Zaafrani 9f382f53d1 Test commit
llvm-svn: 284832
2016-10-21 15:24:08 +00:00
Tamas Berghammer de2cc6e4b4 Fix incorrect header order introduced in rL284830
llvm-svn: 284831
2016-10-21 15:05:03 +00:00
Tamas Berghammer d161b2147b Add data formatter for libstdc++ unique_ptr
Differential revision: https://reviews.llvm.org/D25734

llvm-svn: 284830
2016-10-21 15:02:44 +00:00
Tamas Berghammer 7f15dba16d Add data formatter for libstdc++ tuple
Differential revision: https://reviews.llvm.org/D25733

llvm-svn: 284829
2016-10-21 15:02:38 +00:00
Tamas Berghammer 0789722d85 Improve the libstdc++ smart pointer formatters
* Display the strong/weak count in the summary
* Display the pointed object as a synthetic member
* Create synthetic children for weak/strong count

Differential revision: https://reviews.llvm.org/D25726

llvm-svn: 284828
2016-10-21 15:02:32 +00:00
Artur Pilipenko 47dc098c06 [LVI] Fix a bug with a guard being the very first instruction in a BB not taken into account
While looking for guards use reverse iterator and scan up to rend() not to begin()

llvm-svn: 284827
2016-10-21 15:02:21 +00:00
Sanjay Patel 501be9b3d7 fix variable names; NFCI
Because we're just 'or-ing' these 2 variables later in the code, I
don't think there's a logical bug here, but of course the string with
"no size" is the one that should have the size suffix stripped off.

llvm-svn: 284826
2016-10-21 14:58:30 +00:00
Artem Tamazov 751985a757 [AMDGPU][mc] Fix ds_min/max[_rtn]_f32 - extra source operand removed.
Fixes Bug 28215. Lit tests updated.

Differential Revision: https://reviews.llvm.org/D25837

llvm-svn: 284825
2016-10-21 14:49:22 +00:00
Sanjay Patel cbaba93ce8 [DAG] use SDNode flags 'nsz' to enable fadd/fsub with zero folds
As discussed in D24815, let's start the process of killing off the broken fast-math global
state housed in TargetOptions and eliminate the need for function-level fast-math attributes.

Here we enable two similar folds that are possible when we don't care about signed-zero:
fadd nsz x, 0 --> x
fsub nsz 0, x --> -x

Note that although the test cases include a 'sin' function call, I'm side-stepping the 
FMF-on-calls question (and lack of support in the DAG) for now. It's not needed for these
tests - isNegatibleForFree/GetNegatedExpression just look through a ISD::FSIN node.

Also, when we create an FNEG node and propagate the Flags of the FSUB to it, this doesn't
actually do anything today because Flags are silently dropped for any node that is not a
binary operator.

Differential Revision: https://reviews.llvm.org/D25297

llvm-svn: 284824
2016-10-21 14:36:58 +00:00
Simon Pilgrim c98d99a600 [X86][AVX2] Begun generalizing lowering to VPERMD/VPERMPS in preparation for AVX512 support.
llvm-svn: 284823
2016-10-21 13:00:47 +00:00
Simon Pilgrim f3e9ddbf77 Wdocumentation fix
llvm-svn: 284822
2016-10-21 12:51:16 +00:00
Simon Pilgrim 32b06235da [X86][AVX512] Add mask/maskz writemask support to subvector broadcast shuffle decode comments
llvm-svn: 284821
2016-10-21 12:14:24 +00:00
Peter Smith 580ba95b16 [ELF] Add sh_link field to .ARM.exidx sections for relocatable links
When doing a relocatable link the .ARM.exidx sections with the
SHF_LINK_ORDER flag set need to set the sh_link field to the executable
section they describe. We find the appropriate OutputSection by
following the sh_link field of the .ARM.exidx InputSections.
    
The getOutputSectionName() function rules make sure that when there are
multiple .ARM.exidx InputSections in an OutputSection they all have the
same sh_link field.

Differential revision: https://reviews.llvm.org/D25825

llvm-svn: 284820
2016-10-21 11:25:33 +00:00
Pavel Labath eb01a169c2 Add TestMultipleHits.py
This tests that lldb handles the situation when a single instruction triggers
multiple watchpoint hits. It currently fails on arm due to what appears to be a
lldb-server bug (pr30758).

llvm-svn: 284819
2016-10-21 11:14:04 +00:00
John Brawn 84b21835f1 [LoopUnroll] Keep the loop test only on the first iteration of max-or-zero loops
When we have a loop with a known upper bound on the number of iterations, and
furthermore know that either the number of iterations will be either exactly
that upper bound or zero, then we can fully unroll up to that upper bound
keeping only the first loop test to check for the zero iteration case.

Most of the work here is in plumbing this 'max-or-zero' information from the
part of scalar evolution where it's detected through to loop unrolling. I've
also gone for the safe default of 'false' everywhere but howManyLessThans which
could probably be improved.

Differential Revision: https://reviews.llvm.org/D25682

llvm-svn: 284818
2016-10-21 11:08:48 +00:00
Pavel Labath 2e8fe80447 Revert "Fix a race condition between "ephemeral watchpoint disable/enable" and continue in commands."
This reverts commit r284795, as it breaks watchpoint handling on arm (and
presumable all architectures that report watchpoint hits without executing the
tripping instruction).

There seems to be something fundamentally wrong with this patch: it uses
process_sp->AddPreResumeAction to re-enable the watchpoint, but the whole point
of the step-over-watchpoint logic (which AFAIK is the only user of this class) is
to disable the watchpoint *after* we resume to do the single step.

I have no idea how to fix this except by reverting the offending patch.

llvm-svn: 284817
2016-10-21 10:52:11 +00:00
Simon Pilgrim f447fbf913 [X86][AVX] Add 32-bit target tests for vector lzcnt/tzcnt to demonstrate missed folding opportunities
llvm-svn: 284816
2016-10-21 10:50:52 +00:00
Benjamin Kramer ae8de9bc75 Remove non-existing file from modulemap.
This picked up a builtin header if it happened to be available.

llvm-svn: 284815
2016-10-21 10:19:37 +00:00
Bjorn Pettersson 9fcd605d1e [AArch64] Corrected spill size for DDD register class. NFCI
Summary:
The spill size was incorrectly set to 196 bits,
which isn't a multiple of 8. This problem was detected when
experimenting with asserts that the spill size should be a
multiple of the byte size.

New corrected value for the spill size is set to 192 bits.

Note that tablegen (RegisterInfoEmitter) will divide the
size set in the RegisterClass definition by 8. So this
change should not have any impact on the tablegen output
(trunc(192/8) == trunc(196/8) == 24 bytes).

Reviewers: t.p.northover

Subscribers: llvm-commits, aemerson, rengolin

Differential Revision: https://reviews.llvm.org/D25818

llvm-svn: 284814
2016-10-21 09:53:42 +00:00
Benjamin Kramer 0d41eb8cd1 Fix WebAssembly test after r284757.
The change to MachineSink shuffles code around, disable it.

llvm-svn: 284813
2016-10-21 09:51:41 +00:00
Benjamin Kramer aa48572b9d [Support] Fix AlignOf test on i386-linux.
On i386 alignof(double) = 8 is not the same as alignof(struct { double
}) = 4. This used to be not an issue because the old implementation
always measured alignment inside of structs. Wrap a dummy struct around
the test to avoid this issue.

llvm-svn: 284812
2016-10-21 09:15:57 +00:00
Renato Golin 41189656ed Revert "DR583, DR1512: Implement a rewrite to C++'s 'composite pointer type' rules."
This reverts commit r284800, as it failed all ARM/AArch64 bots.

llvm-svn: 284811
2016-10-21 08:03:49 +00:00
George Rimar 032fa65606 [ELF] Add DebugInfoDWARF dependency
rL284708 introduces a link error when building with BUILD_SHARED_LIBS:

undefined reference to `llvm::DWARFContext::parseCompileUnits()'
undefined reference to `llvm::DWARFContextInMemory::DWARFContextInMemory(
                            llvm::object::ObjectFile const&,
                            llvm::LoadedObjectInfo const*)'
The functions are available in libDebugInfoDWARF, from llvm.

Patch by Visoiu Mistrih Francis

Differential revision: https://reviews.llvm.org/D25843

llvm-svn: 284810
2016-10-21 07:46:24 +00:00
Simon Atanasyan bed04bf1df [ELF][MIPS] Put local GOT entries accessed via a 16-bit index first
Some MIPS relocations used to access GOT entries are able to manipulate
16-bit index. The other ones like R_MIPS_CALL_HI16/LO16 can handle
32-bit indexes. 16-bit relocations are generated by default. The 32-bit
relocations are generated by -mxgot flag passed to compiler. Usually
these relocation are not mixed in the same code but files like crt*.o
contain 16-bit relocations so even if all "user's" code compiled with
-mxgot flag a few 16-bit relocations might come to the linking phase.

Now LLD does not differentiate local GOT entries accessed via a 16-bit
and 32-bit indexes. That might lead to relocation's overflow if 16-bit
entries are allocated to far from the beginning of the GOT.

The patch introduces new "part" of MIPS GOT dedicated to the local GOT
entries accessed by 32-bit relocations. That allows to put local GOT
entries accessed via a 16-bit index first and escape relocation's overflow.

Differential revision: https://reviews.llvm.org/D25833

llvm-svn: 284809
2016-10-21 07:22:30 +00:00
Craig Topper c1db0db864 [AVX-512] Add tests to show opportunities for commuting vpermi2/vpermt2 instructions.
Commuting will be added in a future commit.

llvm-svn: 284808
2016-10-21 05:55:40 +00:00
Martin Probst 717f6dcddc clang-format: [JS] Fix template string ASI.
Summary:
Previously, automatic semicolon insertion would add an unwrapped line
when a template string contained a line break.

    var x = `foo${
        bar}`;

Would be formatted with `bar...` on a separate line and no indent.

Reviewers: djasper

Subscribers: cfe-commits, klimek

Differential Revision: https://reviews.llvm.org/D25675

llvm-svn: 284807
2016-10-21 05:11:38 +00:00
Rui Ueyama 34b411f077 Simplify. NFC.
llvm-svn: 284806
2016-10-21 04:52:13 +00:00