Commit Graph

414670 Commits

Author SHA1 Message Date
Roman Lebedev 418604fd90
[SCEV] Recognize `cond ? i1 x : i1 1` as `~umin_seq cond, ~x`
By definition, `umin_seq` has the exact same
poison stopping properties the original `select` had:
https://alive2.llvm.org/ce/z/aqe9GK
2022-02-10 17:42:55 +03:00
Roman Lebedev 49d9acc242
[SCEV] Recognize logical `or` as `not umin_seq (not, not)`
By definition, `umin_seq` has the exact same
poison stopping properties the original `select` had:
https://alive2.llvm.org/ce/z/MUfbTL
2022-02-10 17:42:55 +03:00
Roman Lebedev 16bc24e7be
[SCEV] Recognize logical `and` as `umin_seq`
By definition, `umin_seq` has the exact same
poison stopping properties the original `select` had:
https://alive2.llvm.org/ce/z/59KuZZ
2022-02-10 17:42:55 +03:00
Roman Lebedev 1c69444863
[SCEV] `createNodeForSelectOrPHI()`: try constant-folding even if not an Instruction
We'd catch the tautological select pattern later anyways
due to constant folding, so that leaves PHI-like select,
but it does not appear to fire there.
2022-02-10 17:42:55 +03:00
Roman Lebedev 97930f85af
[NFC][SCEV] Prepare `createNodeForSelectOrPHI()` for gaining additional strategy
Currently `createNodeForSelectOrPHI()` takes an Instruction,
and only works on the Cond that is an ICmpInst,
but that can be relaxed somewhat.

For now, simply rename the existing function,
and add a thin wrapper ontop that still does
the same thing as it used to.
2022-02-10 17:42:55 +03:00
Roman Lebedev 73990ff8a7
[SCEV] Recognize binary `xor` as bit-wise `add`
https://alive2.llvm.org/ce/z/ULuZxB

We could transparently handle wider bitwidths,
by effectively casting iN to <N x i1> and performing the `add`
bit/element -wise, the expression will be rather large,
so let's not do that for now.
2022-02-10 17:42:55 +03:00
Roman Lebedev 503541fa93
[SCEV] Recognize binary `and` as bit-wise `umin`
https://alive2.llvm.org/ce/z/aKAr94

We could transparently handle wider bitwidths,
by effectively casting iN to <N x i1> and performing the `umin`
bit/element -wise, the expression will be rather large,
so let's not do that for now.
2022-02-10 17:42:54 +03:00
Roman Lebedev e7e0834f07
[SCEV] Recognize binary `or` as bit-wise `umax`
https://alive2.llvm.org/ce/z/SMEaoc

We could transparently handle wider bitwidths,
by effectively casting iN to <N x i1> and performing the `umax`
bit/element -wise, the expression will be rather large,
so let's not do that for now.
2022-02-10 17:42:54 +03:00
Roman Lebedev 0e6e559bf7
[NFC][SCEV] Add some tests with logical operations and whatnot 2022-02-10 17:42:54 +03:00
Paul Walker c58be85720 [SVE] Prefer zero-extending loads when lowering ISD::EXTLOAD.
The decision is perhaps arbitrary but I figure zeroing has no
dependency on the value being loaded.

Differential Revision: https://reviews.llvm.org/D119327
2022-02-10 14:30:28 +00:00
David Sherwood a57a7f3de5 [SVE][CodeGen] Bail out for scalable vectors in AArch64TargetLowering::ReconstructShuffle
Previously the code in AArch64TargetLowering::ReconstructShuffle assumed
the input vectors were always fixed-width, however this is not always
the case since you can extract elements from scalable vectors and insert
into fixed-width ones. We were hitting crashes here for two different
cases:

1. When lowering a fixed-length vector extract from a scalable vector
with i1 element types. This happens due to the fact the i1 elements
get promoted to larger integer types for fixed-width vectors and leads
to sequences of INSERT_VECTOR_ELT and EXTRACT_VECTOR_ELT nodes. In this
case AArch64TargetLowering::ReconstructShuffle will still fail to make
a transformation, but at least it no longer crashes.
2. When lowering a sequence of extractelement/insertelement operations
on mixed fixed-width/scalable vectors.

For now, I've just changed AArch64TargetLowering::ReconstructShuffle to
bail out if it finds a scalable vector.

Tests for both instances described above have been added here:

  (1) CodeGen/AArch64/sve-extract-fixed-vector.ll
  (2) CodeGen/AArch64/sve-fixed-length-reshuffle.ll

Differential Revision: https://reviews.llvm.org/D116602
2022-02-10 14:18:49 +00:00
Marius Brehler 44c1582265 [mlir] Add missing dep to new cf dialect 2022-02-10 14:15:20 +00:00
OCHyams 48326df4b5 [cross-project-tests] REQUIRES: system-darwin in llgdb-tests/asan-deque.cpp
Some configurations of gdb pretty print std::deque and some don't. Make
this test run only on system-darwin (which uses lldb instead), otherwise
it will fail on some non-darwin machines and not others.
2022-02-10 13:53:52 +00:00
Timm Bäder ef2c8274df [clang] Add test for C++ DR2390
DR2390 clarifies that the argument to __has_cpp_attribute() needs to be
macro-expanded. Clang already supports this and tests it explicitly in
clang/test/Preprocessor/has_attribute.cpp.

Copy the test over to clang/test/CXX/drs/ so the make_cxx_drs script
picks it up.

Differential Revision: https://reviews.llvm.org/D119230
2022-02-10 14:52:30 +01:00
Timm Bäder ce07de234b [clang][tests] Add test for C++ DR2406
Clang already handles this fine, so add a test case to let the
make_cxx_dr_status script pick it up.

Differential Revision: https://reviews.llvm.org/D119224
2022-02-10 14:52:30 +01:00
Lei Zhang 06a0385142 [mlir][linalg] Fold tensor.pad(linalg.fill) with the same value
Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D119160
2022-02-10 08:39:35 -05:00
Matthias Springer 9b5a3d14b2 [mlir][vector] Add helper that builds a scalar reduction according to CombiningKind
Differential Revision: https://reviews.llvm.org/D119433
2022-02-10 22:35:43 +09:00
Greg Miller d038faea46 [clang-tidy] add option performance-move-const-arg.CheckMoveToConstRef
This option allows callers to disable the warning from
https://clang.llvm.org/extra/clang-tidy/checks/performance-move-const-arg.html
that would warn on the following

```
void f(const string &s);
string s;
f(std::move(s));  // ALLOWED if performance-move-const-arg.CheckMoveToConstRef=false
```

The reason people might want to disable this check, is because it allows
callers to use `std::move()` or not based on local reasoning about the
argument, and without having to care about how the function `f` accepts
the argument. Indeed, `f` might accept the argument by const-ref today,
but change to by-value tomorrow, and if the caller had moved the
argument that they were finished with, the code would work as
efficiently as possible regardless of how `f` accepted the parameter.

Reviewed By: ymandel

Differential Revision: https://reviews.llvm.org/D119370
2022-02-10 13:31:07 +00:00
Simon Pilgrim aca355a3bb [InstCombine] Extend fold (icmp sgt smin(PosA, B) 0) -> (icmp sgt B 0) to support smin intrinsic
Replace matchSelectPattern pattern match with the more general m_SMin so that it can handle smin intrinsics as well as the icmp+select pattern

Noticed while reviewing regressions from D98152
2022-02-10 13:28:15 +00:00
Simon Pilgrim 4b1525b964 [InstCombine] Add test showing failure to fold (icmp sgt smin(PosA, B) 0) -> (icmp sgt B 0) with smin intrinsic
Noticed while reviewing regressions from D98152
2022-02-10 13:21:06 +00:00
Sanjay Patel 995d400f3a [InstCombine] reduce mul operands based on undemanded high bits
We already do this in SDAG, but mul was left out of the fold
for unused high bits in IR.

The high bits of a mul's operands do not change the low bits
of the result:
https://alive2.llvm.org/ce/z/XRj5Ek

Verify some test diffs to confirm that they are correct:
https://alive2.llvm.org/ce/z/y_W8DW
https://alive2.llvm.org/ce/z/7DM5uf
https://alive2.llvm.org/ce/z/GDiHCK

This gets a fold that was presumed not possible in D114272:
https://alive2.llvm.org/ce/z/tAN-WY

Removing nsw/nuw is needed for general correctness (and is
also done in the codegen version), but we might be able to
recover more of those with better analysis.

Differential Revision: https://reviews.llvm.org/D119369
2022-02-10 08:10:22 -05:00
Nikita Popov 6241f7dee0 [FastISel] Remove redundant reg class check (NFC)
SrcVT and DstVT are the same in this branch, as such their register
classes will also be the same.
2022-02-10 14:10:00 +01:00
Nikita Popov ff5a9c3c65 [CodeGen] Regenerate test checks (NFC) 2022-02-10 14:10:00 +01:00
Groverkss 4807587cf2 [MLIR][Presburger] Factor out space information to PresburgerSpace
This patch factors out space information from IntegerPolyhedron, PresburgerSet
and PWMAFunction to PresburgerSpace and its extension with local variables,
PresburgerLocalSpace.

Generally any new data structure additions in Presburger library will require
space information. This patch removes the need to duplicate the space
information.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D119280
2022-02-10 18:24:40 +05:30
Nathan Sidwell 815446cd3e [clang][NFC] Standard substitution checking cleanup
In preparing for module mangling changes I noticed some issues with
the way we check for std::basic_string instantiations and friends.

*) there's a single routine for std::basic_{i,o,io}stream but it is
 templatized on the length of the name.  Really?  just use a
 StringRef, rather than clone the entire routine just for
 'basic_iostream'.

*) We have a helper routine to check for char type, and call it from
 several places.  But given all the instantiations are of the form
 TPL<char, Other<char> ...> we could just check the first arg is char
 and the later templated args are instantiating that same type.  A
 simpler type comparison.

*) Because basic_string has a third allocator parameter, it is open
 coded, which I found a little confusing.  But otherwise it's exactly
 the same pattern as the iostream ones.  Just tell that checker about
 whether there's an expected allocator argument.[*]

*) We may as well return in each block of mangleStandardSubstitution
 once we determine it is not one of the entities of interest -- it
 certainly cannot be one of the other kinds of entities.

FWIW this shaves about 500 bytes off the executable.

[*] I suppose we could also have this routine a tri-value, with one to
indicat 'it is this name, but it's not the one you're looking for', to
avoid later calls trying different names?

Reviewd By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D119333
2022-02-10 04:44:48 -08:00
Nikolas Klauser c77de9490e [libc++][NFC] Reformat and modernize compressed_pair.h
Reviewed By: Quuxplusone, ldionne, Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D119335
2022-02-10 13:41:14 +01:00
Nathan Sidwell 9d283634f7 [demangler] Fix new/delete demangling
I discovered some demangler problems:

a) parsing of new expressions was broken, ignoring any 'gs' prefix
b) (when #a is fixed) badly formatted global new expressions
c) formatting of new and delete failed to correctly add whitespace

(a) happens as parseExpr swallows the 'gs' prefix but doesn't pass it
 to 'parseNewExpr'.  It seems simpler to me to just code the new
 expression parsing directly in parseExpr, as is done for delete
 expressions.

(b) global new should be rendered something like '::new T' not
 '::operator new T'

(c) is resolved by being a bit more careful with whitespace.

Best shown with some examples (don't worry that these symbols are for
impossible instantiations, that's not the point):

Old behaviour:
build/bin/llvm-cxxfilt _ZN2FnIXgsnw_iEEXna_ipiLi4EEEEEvv _ZN2FnIXnwLj4E_iEEXgsnaLj4E_ipiLi4EEEEEvv _ZN2FnIXgsdlLi4EEXdaLi4EEEEvv _ZN2FnIXdlLj4EEXgsdaLj4EEEEvv
void Fn<new int, new[] int(4)>()   // No ::new
void Fn<new (4u)int, new[] (4u)int(4)>() // No ::new, poor whitespace
void Fn<::delete4, delete[] 4>()  // missing necessary space
void Fn<delete4u, ::delete[] 4u>() // missing necessary space

New behaviour:
build/bin/llvm-cxxfilt _ZN2FnIXgsnw_iEEXna_ipiLi4EEEEEvv _ZN2FnIXnwLj4E_iEEXgsnaLj4E_ipiLi4EEEEEvv _ZN2FnIXgsdlLi4EEXdaLi4EEEEvv _ZN2FnIXdlLj4EEXgsdaLj4EEEEvv
void Fn<::new int, new[] int(4)>()
void Fn<new(4u) int, ::new[](4u) int(4)>()
void Fn<::delete 4, delete[] 4>()
void Fn<delete 4u, ::delete[] 4u>()

Binutils' behaviour:
c++filt _ZN2FnIXgsnw_iEEXna_ipiLi4EEEEEvv _ZN2FnIXnwLj4E_iEEXgsnaLj4E_ipiLi4EEEEEvv _ZN2FnIXgsdlLi4EEXdaLi4EEEEvv _ZN2FnIXdlLj4EEXgsdaLj4EEEEvv
void Fn<::new int, new int(4)>()
void Fn<new (4u) int, ::new (4u) int(4)>()
void Fn<::delete (4), delete[] (4)>()
void Fn<delete (4u), ::delete[] (4u)>()

The new and binutils demanglings are the same modulo some whitespace and optional parens.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D118476
2022-02-10 04:33:02 -08:00
Florian Hahn 80eea38d8d
[ConstraintElimination] Remove unnecessary recursion (NFC).
Perform predicate normalization in a single switch, rather then going
through recursions.
2022-02-10 12:26:35 +00:00
Bradley Smith 98936aee7d [AArch64][SVE] Fix selection failure during lowering of shuffle_vector
The lowering code for shuffle_vector has a code path that looks through
extract_subvector, this code path did not properly account for the
potential presense of larger than Neon vector types and could produce
unselectable DAG nodes.

Differential Revision: https://reviews.llvm.org/D119252
2022-02-10 12:07:51 +00:00
Simon Pilgrim 4517488eb7 [LoopVectorize] Regenerate reduction-predselect.ll test checks 2022-02-10 12:03:10 +00:00
Rainer Orth a6afa9e6b0 [Driver] Use libatomic for 32-bit SPARC atomics support
Even after D86621 <https://reviews.llvm.org/D86621>, `clang -m32` on
Solaris/sparcv9 doesn't inline atomics with 8-byte operands, unlike `gcc`.
This leads to many link failures in the testsuite (undefined references to
`__atomic_load_8` and `__sync_val_compare_and_swap_8`.  Until a proper
codegen fix can be implemented, this patch works around the first of those
by linking with `-latomic`.

Tested on `sparcv9-sun-solaris2.11`.

Differential Revision: https://reviews.llvm.org/D118021
2022-02-10 12:40:32 +01:00
Jeremy Morse be5734ddaa [DebugInfo][InstrRef] Don't fire assertions if debug-info is faulty
It's inevitable that optimisation passes will fail to update debug-info:
when that happens, it's best if the compiler doesn't crash as a result.
Therefore, downgrade a few assertions / failure modes that would crash
when illegal debug-info was seen, to instead drop variable locations. In
practice this means that an instruction reference to a nonexistant or
illegal operand should be tolerated.

Differential Revision: https://reviews.llvm.org/D118998
2022-02-10 11:25:08 +00:00
Nikita Popov 8fa45b826a [LLParser][OpaquePtr] Support forward reference to unnamed function
With opaque pointers, we always create forward references as i8
globals, so it will not be Function here.
2022-02-10 12:20:34 +01:00
Nikita Popov 1c729d719a [NVPTX] Use align attribute for kernel pointer arg alignment
Instead of determining the alignment based on the pointer element
type (which is incompatible with opaque pointers), make use of
alignment annotations added by the frontend.

In particular, clang will add alignment attributes to OpenCL kernels
since D118894. Other frontends might need to be adjusted to add
the attribute as well.

Differential Revision: https://reviews.llvm.org/D119247
2022-02-10 11:56:48 +01:00
OCHyams ac0f32970d [cross-project-tests] Add REQUIRES: compiler-rt to tests that use asan
And XFAIL debuginfo-tests/llgdb-tests/asan-deque.cpp on !system-darwin.
On non-darwin systems these tests use gdb and this one fails because gdb
doesn't pretty-print std::deque (the elements of the deque are not printed so
the CHECK lines fail).

Differential Revision: https://reviews.llvm.org/D118760
2022-02-10 10:48:03 +00:00
David Spickett 2937b28218 Reland "[lldb] Remove non address bits when looking up memory regions"
This reverts commit 0df522969a.

Additional checks are added to fix the detection of the last memory region
in GetMemoryRegions or repeating the "memory region" command when the
target has non-address bits.

Normally you keep reading from address 0, looking up each region's end
address until you get LLDB_INVALID_ADDR as the region end address.
(0xffffffffffffffff)

This is what the remote will return once you go beyond the last mapped region:
[0x0000fffffffdf000-0x0001000000000000) rw- [stack]
[0x0001000000000000-0xffffffffffffffff) ---

Problem is that when we "fix" the lookup address, we remove some bits
from it. On an AArch64 system we have 48 bit virtual addresses, so when
we fix the end address of the [stack] region the result is 0.
So we loop back to the start.

[0x0000fffffffdf000-0x0001000000000000) rw- [stack]
[0x0000000000000000-0x0000000000400000) ---

To fix this I added an additional check for the last range.
If the end address of the region is different once you apply
FixDataAddress, we are at the last region.

Since the end of the last region will be the last valid mappable
address, plus 1. That 1 will be removed by the ABI plugin.

The only side effect is that on systems with non-address bits, you
won't get that last catch all unmapped region from the max virtual
address up to 0xf...f.

[0x0000fffff8000000-0x0000fffffffdf000) ---
[0x0000fffffffdf000-0x0001000000000000) rw- [stack]
<ends here>

Though in some way this is more correct because that region is not
just unmapped, it's not mappable at all.

No extra testing is needed because this is already covered by
TestMemoryRegion.py, I simply forgot to run it on system that had
both top byte ignore and pointer authentication.

This change has been tested on a qemu VM with top byte ignore,
memory tagging and pointer authentication enabled.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D115508
2022-02-10 10:42:49 +00:00
Valentin Clement 6da728ad99
[flang] Add FIRInlinerInterface
This patch introduces the FIRInlinerInterface.
This class defines the interface for handling inlining of FIR calls.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D119340

Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-02-10 11:38:34 +01:00
Nikita Popov 8018d6be34 [ArgPromotion] Transfer metadata to promoted loads
Also transfer selected non-AA metadata to the promoted load.
Only metadata from guaranteed to execute loads is transferred.
2022-02-10 11:28:07 +01:00
Nikita Popov e76c697106 [ArgPromotion] Add test for metadata on promoted loads (NFC) 2022-02-10 11:28:07 +01:00
Lu Weining af3bc0d762 [LoongArch][test] (6/6) Add encoding and mnemonics tests
With the benefit of D88392, instruction encoding and mnemonic testing can be
achieved within MIR files before AsmParser is ready. This patch adds such
tests which cover all basic integer instructions we defined in previous patch.
Similarly those tests will be rewrote by .s and moved to test/MC/LoongArch.

Differential revision: https://reviews.llvm.org/D115862
2022-02-10 10:23:34 +00:00
Lu Weining 6caee48909 [Utils][LoongArch](5/6) Add a --bits-endian option to extract-section.py
This is a split patch of D115862 which adds a --bits-endian option to
extract-section to make it possible to print bits in specified endianness.
It means that we can print instruction encoding of some targets like LoongArch
as bits[0] to bits[31] from right to left by specifing --bits-endian little.

Differential revision: https://reviews.llvm.org/D116100
2022-02-10 10:23:34 +00:00
Lu Weining 33388ae866 [LoongArch 4/6] Add basic tablegen infra for LoongArch
This patch introduces basic tablegen infra such as
LoongArch{InstrFormats,InstrInfo,RegisterInfo,CallingConv,}.td.

For now, only add instruction definitions for LoongArch basic integer
operations.
Our initial target is a working MC layer rather than codegen,
so appropriate SelectionDAG patterns will come later.

Differential revision: https://reviews.llvm.org/D115861
2022-02-10 10:23:34 +00:00
Lu Weining 444c6d261a [LoongArch 3/6] Add target stub for LoongArch
This patch registers the 'loongarch32' and 'loongarch64' targets. Also adds a
simple testcase to check the output of llc --vesion containing the targets.

Differential revision: https://reviews.llvm.org/D115860
2022-02-10 10:23:34 +00:00
Lu Weining e53e6ec6ef [LoongArch 2/6] Add ELF machine flag and relocs for upcoming LoongArch target
This patch adds necessary definitions for LoongArch ELF files, including
relocation types. Also adds initial support to ELFYaml, llvm-objdump,
and llvm-readobj in order to work with LoongArch ELFs.

Differential revision: https://reviews.llvm.org/D115859
2022-02-10 10:23:34 +00:00
Lu Weining 42fd2bfc90 [LoongArch 1/6] Add triples loongarch{32,64} for the upcoming LoongArch target
This is the first patch to incrementally add an MC layer for LoongArch to LLVM.
This patch also adds unit testcases for these new triples.

RFC for adding this new backend:
https://lists.llvm.org/pipermail/llvm-dev/2021-December/154371.html

Differential revision: https://reviews.llvm.org/D115857
2022-02-10 10:23:34 +00:00
Matthias Springer fe0bf7d469 [mlir][vector][NFC] Use CombiningKindAttr instead of StringAttr
This makes the op consistent with other ops in vector dialect.

Differential Revision: https://reviews.llvm.org/D119343
2022-02-10 19:13:29 +09:00
Fraser Cormack fd43d99c93 [RISCV] Pre-process FP SPLAT_VECTOR to RISCVISD::VFMV_V_F_VL
This patch builds on top of D119197 to canonicalize floating-point
SPLAT_VECTOR as RISCVISD::VFMV_V_F_VL as a pre-process ISel step.

This primarily benefits scalable-vector VP code, where our VP patterns
only match VFMV_V_F_VL to reduce the burden on our ISel patterns, but
where at the same time, scalable-vector code doesn't custom-legalize
SPLAT_VECTOR.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117670
2022-02-10 09:56:00 +00:00
Oliver Stannard a76620143c [ARM] Patterns for vector conversion between half and float
These patterns were omitted because clang only allows converting between
these types using intrinsics, but other front-ends or optimisation
passes may want to use them.

Differential revision: https://reviews.llvm.org/D119354
2022-02-10 09:51:55 +00:00
Marek Kurdej 4efde1e554 [clang-format] Move FormatToken::opensBlockOrBlockTypeList to source file. NFC. 2022-02-10 10:51:03 +01:00
Tres Popp 34ff99a0b7 Revert "[MLIR] Fix fold-memref-subview-ops for affine.load/store"
This reverts commit ac6cb41303.

This code has a stack-use-after-scope error that can be seen with asan.
2022-02-10 10:46:59 +01:00