Commit Graph

34 Commits

Author SHA1 Message Date
Evan Cheng 47c9750f04 Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
%RAX<def> = ...
%RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
The first def is defining RAX, not EAX so the top bits were not zero-extended.

llvm-svn: 67511
2009-03-23 07:19:58 +00:00
Dan Gohman 9abd04bf3f Teach LowerSubregs to preserve kill/dead information when lowering
subreg instructions.

llvm-svn: 61220
2008-12-18 22:14:08 +00:00
Dan Gohman c4ce336205 Make LowerSubregs' debug output for EXTRACT_SUBREG consistent with
that of INSERT_SUBREG and SUBREG_TO_REG.

llvm-svn: 61218
2008-12-18 22:11:34 +00:00
Dan Gohman d38c00c85b Fix a copy+pasto in an assertion message.
llvm-svn: 61217
2008-12-18 22:07:25 +00:00
Dan Gohman 451afdd9fe Fix indentation level.
llvm-svn: 61216
2008-12-18 22:06:01 +00:00
Devang Patel cb181bb203 Silence unused variable warnings.
llvm-svn: 59841
2008-11-21 20:00:59 +00:00
Dan Gohman 0d1e9a8e04 Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Dan Gohman 382e2ec6b7 Give LowerSubregs.cpp a top-level description.
llvm-svn: 56596
2008-09-24 23:44:12 +00:00
Evan Cheng 962c2cf17a Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators.
llvm-svn: 56475
2008-09-22 22:21:38 +00:00
Evan Cheng 168f8f3916 Mark several codegen passes as preserving all analysis.
llvm-svn: 56469
2008-09-22 20:58:04 +00:00
Dan Gohman a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t.
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Dan Gohman 1ed0681284 Fix indentation.
llvm-svn: 55049
2008-08-20 13:50:12 +00:00
Dan Gohman 527ca7e253 Re-enable elimination of unnecessary SUBREG_TO_REG instructions in
LowerSubregs, and fix an x86-64 isel bug that this exposed.

SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.

llvm-svn: 54444
2008-08-07 02:54:50 +00:00
Dan Gohman 0ece943845 Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.
Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.

llvm-svn: 53746
2008-07-17 23:49:46 +00:00
Evan Cheng 5e4188f1ac It's not safe to remove SUBREG_TO_REG that looks like identity copies, e.g. movl %eax, %eax on x86-64 actually does a zero-extend.
llvm-svn: 52421
2008-06-17 17:59:16 +00:00
Evan Cheng 1cde1f8d5e Do not issue identity copies.
llvm-svn: 52373
2008-06-16 22:52:53 +00:00
Evan Cheng 805cde4fbf Revert this.
llvm-svn: 51949
2008-06-04 17:21:44 +00:00
Evan Cheng a15e7eb29b LowerSubregs should not clobber any analysis.
llvm-svn: 51933
2008-06-04 09:17:16 +00:00
Christopher Lamb d3d0ad3f58 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
Christopher Lamb dd55d3f1b2 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
Christopher Lamb aa7c2105de Recommitting parts of r48130. These do not appear to cause the observed failures.
llvm-svn: 48223
2008-03-11 10:09:17 +00:00
Evan Cheng d54660aeed Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.
llvm-svn: 48221
2008-03-11 07:55:13 +00:00
Evan Cheng d4e1d9eeb2 Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
llvm-svn: 48167
2008-03-10 19:31:26 +00:00
Christopher Lamb 4ba3f0430b Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

llvm-svn: 48130
2008-03-10 06:12:08 +00:00
Dan Gohman 3a4be0fdef Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Owen Anderson 7a73ae9a86 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
2007-12-31 06:32:00 +00:00
Chris Lattner a10fff51d9 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
2007-12-31 04:13:23 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng 847d42a85c isSubRegOf() is a dup of isSubRegister.
llvm-svn: 43249
2007-10-23 06:51:50 +00:00
Evan Cheng c1e4e3743b Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!

llvm-svn: 42346
2007-09-26 06:25:56 +00:00
Dan Gohman 9da02f5ee2 Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
2007-09-14 20:33:02 +00:00
Christopher Lamb e081928f49 Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in LowerSubregs and add more debugging output there.
llvm-svn: 41005
2007-08-10 21:11:55 +00:00
Christopher Lamb 2e5fb9f71e Implement review feedback. No functionality change.
llvm-svn: 40863
2007-08-06 16:33:56 +00:00
Christopher Lamb e9d738cefc Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.
llvm-svn: 40521
2007-07-26 08:18:32 +00:00