3cd87cc5ee
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96233
2010-02-15 16:56:10 +00:00
cfa68983e8
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96232
2010-02-15 16:55:58 +00:00
af2931d7bf
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96231
2010-02-15 16:55:37 +00:00
0d0149f5ac
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96230
2010-02-15 16:55:24 +00:00
e2e2073303
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96229
2010-02-15 16:55:07 +00:00
ff34702b04
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96228
2010-02-15 16:53:33 +00:00
68ea4da8cb
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96227
2010-02-15 16:49:52 +00:00
3a0412f122
Add non-temporal flags to MachineMemOperand.
...
llvm-svn: 96226
2010-02-15 16:48:31 +00:00
9dff9bec31
Uniformize the names of type predicates: rather than having isFloatTy and
...
isInteger, we now have isFloatTy and isIntegerTy. Requested by Chris!
llvm-svn: 96223
2010-02-15 16:12:20 +00:00
37b3c48ef7
CMake: Fixed syntax in conditional.
...
llvm-svn: 96221
2010-02-15 15:17:05 +00:00
6b5e62fb0b
Fix changes from r75027
...
llvm-svn: 96220
2010-02-15 15:00:44 +00:00
fefbff9cd8
When testing whether a given SCEV depends on a temporary symbolic
...
name, test whether the SCEV itself is that temporary symbolic name,
in addition to checking whether the symbolic name appears as a
possibly-indirect operand.
llvm-svn: 96216
2010-02-15 10:28:37 +00:00
b02cdaaa9c
Check in the first big step of rewriting DAGISelEmitter to
...
produce a table based matcher instead of gobs of C++ Code.
Though it's not done yet, the shrinkage seems promising,
the table for the X86 ISel is 75K and still has a lot of
optimization to come (compare to the ~1.5M of .o generated
the old way, much of which will go away).
The code is currently disabled by default (the #if 0 in
DAGISelEmitter.cpp). When enabled it generates a dead
SelectCode2 function in the DAGISel Header which will
eventually replace SelectCode.
There is still a lot of stuff left to do, which are
documented with a trail of FIXMEs.
llvm-svn: 96215
2010-02-15 08:04:42 +00:00
8fd1fe1612
give SDValue an operator->, allowing V->isTargetOpcode() and
...
many other natural things.
llvm-svn: 96214
2010-02-15 07:11:34 +00:00
f0520da7a1
don't make insanely large node numbers for no reason,
...
packing somewhat densely is better than not.
llvm-svn: 96213
2010-02-15 06:39:31 +00:00
d4df64d15f
no need to add the instruction count anymore.
...
llvm-svn: 96212
2010-02-15 06:38:41 +00:00
5352f07f2c
Revert r96130 ("Forward parameter options as '-option=param'").
...
This behaviour must be configurable.
llvm-svn: 96210
2010-02-15 03:17:06 +00:00
115158fa4f
enhance raw_svector_ostream::write_impl to work with unbuffered streams,
...
which may call write_impl on things that are not the usual buffer.
llvm-svn: 96209
2010-02-15 02:18:26 +00:00
f733d75892
make PadToColumn return the stream so you can use:
...
OS.PadToColumn(42) << "foo";
llvm-svn: 96208
2010-02-15 02:17:50 +00:00
c704ea1c51
Ignore DBG_VALUE in a couple more places.
...
llvm-svn: 96207
2010-02-15 01:45:47 +00:00
4d8feb11dd
When restoring a saved insert location, check to see if the saved
...
insert location has become an "inserted" instruction since the time
it was saved. If so, advance to the first non-"inserted" instruction.
llvm-svn: 96203
2010-02-15 00:21:43 +00:00
450d50467c
constize
...
llvm-svn: 96199
2010-02-14 22:33:49 +00:00
53c39ba3c1
clean up a bunch of code, move some random predicates
...
on TreePatternNode to be methods on TreePatternNode.
llvm-svn: 96197
2010-02-14 22:22:58 +00:00
4aa57ba3ef
mark "addr" as having type "iPTR", eliminating some type comparisons
...
in hte generated dag isel fil.
llvm-svn: 96193
2010-02-14 21:53:19 +00:00
b3d9942c51
remove the DisablePatternForFastISel predicate, which is a check
...
that predated -fast-isel which attempted to speed up the dag pattern
matchers at -O0. Since fast-isel is around, this is basically
obsolete and removing it shrinks the generated dag isels.
llvm-svn: 96188
2010-02-14 21:11:53 +00:00
dd2ec58276
add an insertion operator.
...
llvm-svn: 96187
2010-02-14 21:10:33 +00:00
78291e3be8
tidy up
...
llvm-svn: 96186
2010-02-14 21:10:15 +00:00
e4e51a63da
Fix whitespace.
...
llvm-svn: 96179
2010-02-14 18:51:39 +00:00
e7f74bb16c
Fix a comment.
...
llvm-svn: 96178
2010-02-14 18:51:20 +00:00
bb7d52213c
When complicated expressions are broken down into subexpressions
...
with multiplication by constants distributed through, occasionally
those subexpressions can include both x and -x. For now, if this
condition is discovered within LSR, just prune such cases away,
as they won't be profitable. This fixes a "zero allocated in a
base register" assertion failure.
llvm-svn: 96177
2010-02-14 18:50:49 +00:00
d6cbe9f23f
fixes to pagesel/banksel inserter.
...
1. restore these across direct/indirect calls.
2. restore pagesel for any macros with gotos.
llvm-svn: 96175
2010-02-14 18:27:42 +00:00
0a5e0371b0
Forgot to commit the header
...
llvm-svn: 96174
2010-02-14 18:25:41 +00:00
3b38fd6488
follow-on to PR6280
...
llvm-svn: 96172
2010-02-14 18:20:09 +00:00
ce77ce3072
Drop winmcasminfo and use normal AT&T COFF for all windows targets.
...
Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.
llvm-svn: 96165
2010-02-14 15:19:54 +00:00
c95a814ec3
Try to factorize the specification of saturating add/subtract operations a bit,
...
as suggested by Bob Wilson.
llvm-svn: 96153
2010-02-14 06:32:20 +00:00
2d0f96d49a
Actually, this code doesn't have to be quite so conservative in
...
the no-TLI case. But it should still default to declining the
transformation.
llvm-svn: 96152
2010-02-14 03:21:49 +00:00
6b7517342e
In rememberInstruction, if the value being remembered is the
...
current insertion point, advance the current insertion point.
This avoids a use-before-def situation in a testcase extracted
from clang which is difficult to reduce to a reasonable-sized
regression test.
llvm-svn: 96151
2010-02-14 03:12:47 +00:00
f446713fd0
Simplify this code; no need for a custom subclass if it doesn't need
...
to override anything from the parent class.
llvm-svn: 96150
2010-02-14 02:48:58 +00:00
6fafffb635
Remove a 'protected' keyword, now that SCEVExpander is no longer
...
intended to be subclassed.
llvm-svn: 96149
2010-02-14 02:47:26 +00:00
cb76a806f0
Don't attempt aggressive post-inc uses if TargetLowering is not available,
...
because profitability can't be sufficiently approximated.
llvm-svn: 96148
2010-02-14 02:45:21 +00:00
3e255dae88
2.7: Note that DataTypes.h moved.
...
llvm-svn: 96143
2010-02-14 01:47:19 +00:00
0daaf13b97
Make LSR not crash if invoked without target lowering info, e.g. if invoked
...
from opt.
llvm-svn: 96135
2010-02-13 23:40:16 +00:00
843a4cc43c
Fix a problem where we had bitcasted operands that gave us
...
odd offsets since the bitcasted pointer size and the offset pointer
size are going to be different types for the GEP vs base object.
llvm-svn: 96134
2010-02-13 23:38:01 +00:00
32fa169648
Forward parameter options as '-option=parameter'.
...
Some tools do not like the '-option parameter' form. Should this be
configurable?
llvm-svn: 96130
2010-02-13 22:37:28 +00:00
bbbf4977c7
Support some more Darwin-only options.
...
We really need a conditional compilation mechanism...
llvm-svn: 96129
2010-02-13 22:37:13 +00:00
b0afb6cbe4
Support -mfix-and-continue properly.
...
llvm-svn: 96128
2010-02-13 22:37:00 +00:00
67f061d85c
Revert r94752, turns out we don't need to touch these options.
...
llvm-svn: 96127
2010-02-13 22:36:43 +00:00
299beb8c0f
Trim trailing spaces (aka, trigger rebuild).
...
llvm-svn: 96126
2010-02-13 22:23:47 +00:00
3dc137d8ed
pull a bunch of huge inline methods in the PatternCodeEmitter
...
class out of line.
llvm-svn: 96113
2010-02-13 20:06:50 +00:00
406cd61828
teach the encoder to handle pseudo instructions like FP_REG_KILL,
...
encoding them into nothing.
llvm-svn: 96110
2010-02-13 19:16:53 +00:00
b8639bc2d1
remove dead code.
...
llvm-svn: 96109
2010-02-13 19:07:06 +00:00
8408c126c1
MCAssembler: Fix pcrel relocations. Oh and,
...
--
ddunbar@ozzy:tmp$ clang -m32 -integrated-as hello.c && ./a.out
hello world!
--
llvm-svn: 96096
2010-02-13 09:45:59 +00:00
1e2fad3de8
MC/Mach-O: Start emitting fixups/relocations for instructions.
...
llvm-svn: 96095
2010-02-13 09:29:02 +00:00
3374835b46
MCAssembler: Switch MCAsmFixup to storing MCFixupKind instead of just a size.
...
llvm-svn: 96094
2010-02-13 09:28:54 +00:00
97867a9cfc
MCAssembler: Sink fixup list into MCDataFragment.
...
llvm-svn: 96093
2010-02-13 09:28:43 +00:00
056bc60336
MCAssembler: Switch MCFillFragment to only taking constant values. Symbolic expressions can always be emitted as data + fixups.
...
llvm-svn: 96092
2010-02-13 09:28:32 +00:00
1a1fbb50fc
MC/Mach-O: Implement EmitValue using data fragments + fixups instead of fill fragment.
...
llvm-svn: 96091
2010-02-13 09:28:22 +00:00
8e53203154
MCAssembler: Start applying fixups in the data section.
...
llvm-svn: 96090
2010-02-13 09:28:15 +00:00
bedf1d4a41
MCAssembler: Add assorted dump() methods.
...
llvm-svn: 96089
2010-02-13 09:28:03 +00:00
2610a34b15
X86: Move extended MCFixupKinds into X86FixupKinds.h
...
llvm-svn: 96088
2010-02-13 09:27:52 +00:00
42c66b7270
Split some code out to a helper function (FindReusablePredBB)
...
and add a doxygen comment.
Cache the phi entry to avoid doing tons of
PHINode::getBasicBlockIndex calls in the common case.
On my insane testcase from re2c, this speeds up CGP from
617.4s to 7.9s (78x).
llvm-svn: 96083
2010-02-13 05:35:08 +00:00
5e7f705934
Speed up codegen prepare from 3.58s to 0.488s.
...
llvm-svn: 96081
2010-02-13 05:01:14 +00:00
72c4dce884
PHINode::getBasicBlockIndex is O(n) in the number of inputs
...
to a PHI, avoid it in the common case where the BB occurs
in the same index for multiple phis. This speeds up CGP on
an insane testcase from 8.35 to 3.58s.
llvm-svn: 96080
2010-02-13 04:24:19 +00:00
b0ebb65ab0
iterate over preds using PHI information when available instead of
...
using pred_begin/end. It is much faster.
llvm-svn: 96079
2010-02-13 04:15:26 +00:00
96b8826542
speed up CGP a bit by scanning predecessors through phi operands
...
instead of with pred_begin/end.
llvm-svn: 96078
2010-02-13 04:04:42 +00:00
f83726f6ba
add encoder support and tests for rdtscp
...
llvm-svn: 96076
2010-02-13 03:42:24 +00:00
52a6ab3ba7
Add SETEND and BXJ instructions for disassembly only.
...
llvm-svn: 96075
2010-02-13 02:51:09 +00:00
4d804d794f
Added the rdtscp instruction to the x86 instruction
...
tables.
llvm-svn: 96073
2010-02-13 02:06:11 +00:00
b659c76c77
Fix PR6283.
...
When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.
Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.
llvm-svn: 96072
2010-02-13 02:06:10 +00:00
5b18f039eb
Fix a pruning heuristic which implicitly assumed that SmallPtrSet is
...
deterministically sorted.
llvm-svn: 96071
2010-02-13 02:06:02 +00:00
3b065cdb64
Teach MachineFrameInfo to track maximum alignment while stack objects are being
...
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.
llvm-svn: 96069
2010-02-13 01:56:41 +00:00
492b8b42cd
Enable the inlinehint attribute in the Inliner.
...
Functions explicitly marked inline will get an inlining threshold slightly
more aggressive than the default for -O3. This means than -O3 builds are
mostly unaffected while -Os builds will be a bit bigger and faster.
The difference depends entirely on how many 'inline's are sprinkled on the
source.
In the CINT2006 suite, only these tests are significantly affected under -Os:
Size Time
471.omnetpp +1.63% -1.85%
473.astar +4.01% -6.02%
483.xalancbmk +4.60% 0.00%
Note that 483.xalancbmk runs too quickly to give useful timing results.
llvm-svn: 96066
2010-02-13 01:51:53 +00:00
44232af55a
Fixed encodings for invlpg, invept, and invvpid.
...
llvm-svn: 96065
2010-02-13 01:48:34 +00:00
d0c6d361fe
MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
...
llvm-svn: 96064
2010-02-13 01:28:07 +00:00
b0208d2a06
Added a bunch of saturating add/subtract instructions for disassembly only.
...
llvm-svn: 96063
2010-02-13 01:21:01 +00:00
509154e0f9
rip out the 'heinous' x86 MCCodeEmitter implementation.
...
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
llvm-svn: 96059
2010-02-13 00:49:29 +00:00
140caa7240
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
...
fix swapgs to be spelled right.
llvm-svn: 96058
2010-02-13 00:41:14 +00:00
01abf8fc2f
Besides removing phi cycles that reduce to a single value, also remove dead
...
phi cycles. Adjust a few tests to keep dead instructions from being optimized
away. This (together with my previous change for phi cycles) fixes Apple
radar 7627077.
llvm-svn: 96057
2010-02-13 00:31:44 +00:00
fe873e7c10
Override dominates and properlyDominates for SCEVAddRecExpr, as a
...
SCEVAddRecExpr doesn't necessarily dominate blocks merely dominated
by all of its operands. This fixes an abort compiling 403.gcc.
llvm-svn: 96056
2010-02-13 00:19:39 +00:00
224340cabe
MC/X86: Push immediate operands as immediates not expressions when possible.
...
llvm-svn: 96055
2010-02-13 00:17:21 +00:00
01f88a96c5
Make PassRegistrar thread-safe since it can be modified by code running in
...
separate LLVMContexts.
llvm-svn: 96051
2010-02-13 00:03:17 +00:00
064e926362
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
...
encoder and decoder by using new MRM_ forms.
llvm-svn: 96048
2010-02-12 23:54:57 +00:00
34749d879d
add some disassemble testcases for weird instructions
...
llvm-svn: 96045
2010-02-12 23:46:48 +00:00
dde9c12307
Reworked the Intel disassembler to support instructions
...
whose opcodes extend into the ModR/M field using the
Form field of the instruction rather than by special
casing each instruction. Commented out the special
casing of VMCALL, which is the first instruction to use
this special form. While I was in the neighborhood,
added a few comments for people modifying the Intel
disassembler.
llvm-svn: 96043
2010-02-12 23:39:46 +00:00
1e827fd8ca
implement the rest of correct x86-64 encoder support for
...
rip-relative addresses, and add a testcase.
llvm-svn: 96040
2010-02-12 23:24:09 +00:00
626b79d6a6
Add the problem I just hacked around in 96015/96020.
...
The solution there produces correct code, but is seriously
deficient in several ways.
llvm-svn: 96039
2010-02-12 23:16:24 +00:00
741580a5bd
give MCCodeEmitters access to the current MCContext.
...
llvm-svn: 96038
2010-02-12 23:12:47 +00:00
2d36eb6e18
Make JIT::runFunction clean up the generated stub function.
...
Patch by Shivram K!
llvm-svn: 96037
2010-02-12 23:05:31 +00:00
4ad96055fb
implement infrastructure to support fixups for rip-rel
...
addressing. This isn't complete because I need an MCContext
to generate new MCExprs.
llvm-svn: 96036
2010-02-12 23:00:36 +00:00
29a9103ee6
Add YIELD, WFE, WFI, and SEV instructions for disassembly only.
...
Plus add two formats: MiscFrm and ThumbMiscFrm. Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.
llvm-svn: 96032
2010-02-12 22:53:19 +00:00
d18320361f
pull the rip-relative addressing mode case up early.
...
llvm-svn: 96031
2010-02-12 22:47:55 +00:00
6c1c0141be
fixme resolved!
...
llvm-svn: 96029
2010-02-12 22:39:06 +00:00
0055e75249
start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.
...
llvm-svn: 96028
2010-02-12 22:36:47 +00:00
e464c658ce
Fix a comment typo.
...
llvm-svn: 96027
2010-02-12 22:34:54 +00:00
12455ca03d
enhance the immediate field encoding to know whether the immediate
...
is pc relative or not, mark call and branches as pcrel.
llvm-svn: 96026
2010-02-12 22:27:07 +00:00
439bda9d3f
Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.
...
llvm-svn: 96023
2010-02-12 22:17:21 +00:00
cb39340b81
This should have gone in with 26015, see comments there.
...
llvm-svn: 96020
2010-02-12 22:00:40 +00:00
dc2051c802
Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.
...
llvm-svn: 96019
2010-02-12 21:59:23 +00:00
486483ac95
doxygenize some comments, patch by Peter Collingbourne!
...
llvm-svn: 96018
2010-02-12 21:54:28 +00:00
26062150fa
When save/restoring CR at prolog/epilog, in a large
...
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot. Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.
SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.
Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.
llvm-svn: 96015
2010-02-12 21:35:34 +00:00
David Greene