Commit Graph

380429 Commits

Author SHA1 Message Date
Qiu Chaofan d7d4dca15f [llvm-exegesis] [PowerPC] Add basic LIT test
Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D94897
2021-02-19 17:01:05 +08:00
OCHyams 54b6d01685 [debuginfo-tests] Recommit test sret.cpp
This test was accidently removed when the directory structure was shuffled
around for dexter in f78c236efd.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D96968
2021-02-19 08:45:15 +00:00
David Green c141c6551b [NPM][LTO] Do not enable MemorySSA with LoopFullUnrollPass
As with the standard opt pipeline, we disable the MemorySSA dependency
in the LTO LPM pipeline as not all passes preserve MemorySSA.
2021-02-19 08:35:11 +00:00
Nicolas Vasilache b3c227a25a [mlir] Better support for rank-reducing subview / subtensor type inference.
Differential Revision: https://reviews.llvm.org/D96995
2021-02-19 08:30:50 +00:00
Djordje Todorovic 1a2b3536ef Reland "[Debugify] Make the debugify aware of the original (-g) Debug Info"
As discussed on the RFC [0], I am sharing the set of patches that
    enables checking of original Debug Info metadata preservation in
    optimizations. The proof-of-concept/proposal can be found at [1].

    The implementation from the [1] was full of duplicated code,
    so this set of patches tries to merge this approach into the existing
    debugify utility.

    For example, the utility pass in the original-debuginfo-check
    mode could be invoked as follows:

      $ opt -verify-debuginfo-preserve -pass-to-test sample.ll

    Since this is very initial stage of the implementation,
    there is a space for improvements such as:
      - Add support for the new pass manager
      - Add support for metadata other than DILocations and DISubprograms

    [0] https://groups.google.com/forum/#!msg/llvm-dev/QOyF-38YPlE/G213uiuwCAAJ
    [1] https://github.com/djolertrk/llvm-di-checker

    Differential Revision: https://reviews.llvm.org/D82545

The test that was failing is now forced to use the old PM.
2021-02-18 23:29:22 -08:00
Jason Molenda d82ecb0ac7 LanguageRuntime can provide an UnwindPlan for special occasions
Add a facility in the LanguageRuntime to provide a special
UnwindPlan based on the register values in a RegisterContext,
instead of using the return-pc to find a function and use its
normal UnwindPlans.

Needed when the runtime has special stack frames that we want
to show the user, but aren't actually on the real stack.
Specifically for Swift asynchronous functions.

With feedback from Greg Clayton, Jonas Devlieghere, Dave Lee

<rdar://problem/70398009>

Differential Revision: https://reviews.llvm.org/D96839
2021-02-18 23:23:15 -08:00
Aart Bik 2556d62282 [mlir][sparse] assert fail on mismatch between rank and annotations array
Rationale:
Providing the wrong number of sparse/dense annotations was silently
ignored or caused unrelated crashes. This minor change verifies that
the provided number matches the rank.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D97034
2021-02-18 23:22:14 -08:00
Craig Topper cd4051ac80 [RISCV] Prune unneeded indexed load/store pseudo instructions.
We were creating more combinations of value and index lmul than
we needed.

I've copied the loop structure used here from VPseudoAMOEI with
all data sew values instead of just 32/64.

Similar can be done for segment loads/store.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D97008
2021-02-18 23:08:39 -08:00
Kazu Hirata fd04f3a30c [CodeGen] Use range-based for loops (NFC) 2021-02-18 22:46:43 -08:00
Kazu Hirata 2d5eb67235 [Support] Use static_assert instead of assert (NFC)
Identified with misc-static-assert.
2021-02-18 22:46:41 -08:00
Kazu Hirata 744a96afed [TableGen] Use ListSeparator (NFC) 2021-02-18 22:46:39 -08:00
Christian Sigg c86c96a710 [mlir] Load dynamic libraries in JitRunner from absolute paths so that GDB can find the symbol tables.
Reviewed By: mehdi_amini, ftynse

Differential Revision: https://reviews.llvm.org/D96759
2021-02-19 07:33:35 +01:00
Serge Pavlov 2c4f60e45b [FPEnv][AArch64] Implement lowering of llvm.set.rounding
Differential Revision: https://reviews.llvm.org/D96836
2021-02-19 13:16:51 +07:00
zoecarver 6a328c66d3 [libc++] shared_ptr deleter requirements (LWG 2802).
This patch implements 2802. Requires _Deleter to have call operator and be move constructible. Based on D62233.

Refs PR37637.

Differential Revision: https://reviews.llvm.org/D62274
2021-02-18 21:31:07 -08:00
zoecarver 82b82b9430 Mark 2534 as Complete.
c90dee1 fixed LWG 1203 which supresses LWG 2534 as well.

Refs D62889.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D96885
2021-02-18 21:28:49 -08:00
Yaxun (Sam) Liu 51ade31e67 [HIP] Support device sanitizer
Add option -fgpu-sanitize to enable sanitizer for AMDGPU target.

Since it is experimental, it is off by default.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D96835
2021-02-18 23:30:25 -05:00
Lang Hames 0469256d35 [ORC] Print CPU feature string in JITTargetMachineBuilder debugging output. 2021-02-19 15:18:19 +11:00
Hsiangkai Wang 0ab3558b25 [RISCV] Remove redundant test cases for index segment store (8/8).
Differential Revision: https://reviews.llvm.org/D97026
2021-02-19 11:56:08 +08:00
Hsiangkai Wang c2f27da7e7 [RISCV] Remove redundant test cases for index segment store (7/8).
Differential Revision: https://reviews.llvm.org/D97025
2021-02-19 11:56:08 +08:00
Hsiangkai Wang b0168a3896 [RISCV] Remove redundant test cases for index segment store (6/8).
Differential Revision: https://reviews.llvm.org/D97024
2021-02-19 11:56:08 +08:00
Hsiangkai Wang de6d640f6d [RISCV] Remove redundant test cases for index segment store (5/8).
Differential Revision: https://reviews.llvm.org/D97023
2021-02-19 11:56:08 +08:00
Hsiangkai Wang 3b4b1c845a [RISCV] Remove redundant test cases for index segment load (4/8). 2021-02-19 11:56:08 +08:00
Hsiangkai Wang 8cc0b1cbea [RISCV] Remove redundant test cases for index segment load (3/8).
Differential Revision: https://reviews.llvm.org/D97022
2021-02-19 11:56:08 +08:00
Hsiangkai Wang 320250e486 [RISCV] Remove redundant test cases for index segment load (2/8). 2021-02-19 11:56:08 +08:00
Hsiangkai Wang a32c79ce2c [RISCV] Remove redundant test cases for index segment load (1/8).
Differential Revision: https://reviews.llvm.org/D97020
2021-02-19 11:56:08 +08:00
Xun Li 3bf8f162a0 [Coroutine] Relax CoroElide musttail check
As discussed in D94834, we don't really need to do complicated analysis. It's safe to just drop the tail call attribute.

Differential Revision: https://reviews.llvm.org/D96926
2021-02-18 19:36:11 -08:00
Craig Topper 8ed3bbbcc3 [RISCV] Split zvlsseg searchable table into 4 separate tables. Index by properties rather than intrinsic ID.
Intrinsic ID is a 32-bit value which made each row of the table 4
byte aligned. The remaining fields used 5 bytes. This meant 3 bytes
of padding per row.

This patch breaks the table into 4 separate tables and indexes them
by properties we know about the intrinsic. NF, masked,
strided, ordered, etc. The indexed load/store tables have no
padding in their rows now.

All together this reduces the size of llc binary by ~28K.

I'm considering adding similar tables for isel of non-segment
load/store as well to cut down the size of the isel table and
probably improve our isel performance. Those tables would need to
indexed from intrinsics, IR loads/stores, gathers/scatters, and
RISCVISD opcodes. So having a table that can be indexed without using
intrinsic ID is more flexible.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D96894
2021-02-18 19:00:49 -08:00
Craig Topper cf34559104 [RISCV] Enable PrimaryKeyEarlyOut on RISCVVPseudosTable.
This table is queried in RISCVMCInstLower without knowing
whether the instruction is a vector pseudo. Due to the way the
binary search works, we have to do log2(tablesize) checks just
to determine a non-vector instruction isn't in the table.

Conveniently, all the vector pseudos are pretty tightly
packed within the internal instruction enum. By enabling the
PrimaryKeyEarlyOut, tablegen will emit a check against the
beginning and end of the table before doing the binary search.
This gives a quick early out on the search for the majority
of non-vector instructions.

Differential Revision: https://reviews.llvm.org/D97016
2021-02-18 18:59:32 -08:00
Adrian Prantl c4ad878acb Reset the EntryValue location flag in finalizeEntryValue.
This fixes an assertion error when entry values are combined with
DW_OP_LLVM_fragment.
2021-02-18 18:36:36 -08:00
Richard Smith bdf6fbc939 PR49239: Don't take shortcuts when constant evaluating in 'warn on UB'
mode.

We use that mode when evaluating ICEs in C, and those shortcuts could
result in ICE evaluation producing the wrong answer, specifically if we
evaluate a statement-expression as part of evaluating the ICE.
2021-02-18 18:31:08 -08:00
Shafik Yaghmour 9068dab1fd Revert "Modify TypePrinter to differentiate between anonymous struct and unnamed struct"
I missed clangd test suite and may need some time to get those working, so reverting for now.

This reverts commit ecb90b5545.
2021-02-18 18:17:24 -08:00
Shafik Yaghmour 080ba851c6 Revert "Fix for Modify TypePrinter to differentiate between anonymous struct and unnamed struct"
I missed clangd test suite and may need some time to get those working, so reverting for now.

This reverts commit 1e08193956.
2021-02-18 18:17:24 -08:00
Geoffrey Martin-Noble db011775e4 Reland "[MLIR] Make structured op tests permutation invariant"
Relands with fix swapping DEPENDS for LINK_LIBS.

This reverts commit cd8cc00b9e.

Differential Revision: https://reviews.llvm.org/D97011
2021-02-18 18:09:49 -08:00
Shilei Tian 89827fd404 [OpenMP][NVPTX] Add the support for CUDA 11.2 and CUDA 11.1
CUDA 11.2 and CUDA 11.1 are all available now.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D97004
2021-02-18 21:04:39 -05:00
Shafik Yaghmour 1e08193956 Fix for Modify TypePrinter to differentiate between anonymous struct and unnamed struct
One of the lldb tests needed additional fixes.
2021-02-18 17:57:40 -08:00
Mehdi Amini ae15b1e7ad Fix MLIR Toy tutorial JIT example and add a test to cover it 2021-02-19 01:53:36 +00:00
Christopher Di Bella 9f4f6ac94b [libcxx] adds concept `std::uniform_random_bit_generator`
Implements parts of:
    - P0898R3 Standard Library Concepts
    - P1754 Rename concepts to standard_case for C++20, while we still can

Differential Revision: https://reviews.llvm.org/D96577
2021-02-19 01:47:29 +00:00
Konstantin Zhuravlyov 71d1f785a5 AMDGPU/ELF: Sort MACHs by value and add missing reserved MACHs
- Sort MACHs by its value
  - Add missing reserved MACHs
    - EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3D
    - EF_AMDGPU_MACH_AMDGCN_RESERVED_0X3E

Differential Revision: https://reviews.llvm.org/D97010
2021-02-18 20:46:27 -05:00
Shafik Yaghmour ecb90b5545 Modify TypePrinter to differentiate between anonymous struct and unnamed struct
Currently TypePrinter lumps anonymous classes and unnamed classes in one group "anonymous" this is not correct and can be confusing in some contexts.

Differential Revision: https://reviews.llvm.org/D96807
2021-02-18 17:44:45 -08:00
Vitaly Buka df2940aa85 [android] Fix testing adb call
Looks like some debug leftover which force another retry.
2021-02-18 17:24:07 -08:00
Richard Smith e0589d70fb Switch to using LEB encoding for key and data lengths in on-disk hash
tables.

This gives a modest AST file size reduction, while also fixing crashes
in cases where the key or data length doesn't fit into 16 bits.
Unfortunately, such situations tend to require huge test cases (such as
more than 16K modules or an overload set with 16K entries), and I
couldn't get a testcase to finish in a reasonable amount of time, so no
test is included for that bugfix.

No functionality change intended (other than the bugfix).
2021-02-18 17:19:01 -08:00
Richard Smith 3cd70fc59d Detect diagnostic groups that are defined in multiple 'def's.
Remove the three such groups that we've accumulated. These were causing
duplicated output to appear in generated the diagnostic reference.
2021-02-18 17:19:01 -08:00
Wei Mi 5fb65c02ca [SampleFDO] Stop repeated indirect call promotion for the same target.
Found a problem in indirect call promotion in sample loader pass. Currently
if an indirect call is promoted for a target, and if the parent function is
inlined into some other function, the indirect call can be promoted for the
same target again. That is redundent which can harm performance and can cause
excessive compile time in some extreme case.

The patch fixes the issue. If a target is promoted for an indirect call, the
patch will write ICP metadata with the target call count being set to 0.
In the later ICP in sample profile loader, if it sees a target has 0 count
for an indirect call, it knows the target has been promoted and won't do
indirect call promotion for the indirect call.

The fix brings 0.1~0.2% performance on our search benchmark.

Differential Revision: https://reviews.llvm.org/D96806
2021-02-18 17:01:32 -08:00
Jing Pu d690cbf821 Add DivOp to the Shape dialect
Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D96907
2021-02-18 16:58:47 -08:00
Mehdi Amini cd8cc00b9e Revert "[MLIR] Make structured op tests permutation invariant"
This reverts commit b9ff67099a.
The build is broken with -DBUILD_SHARED_LIBS=ON
2021-02-19 00:16:45 +00:00
Jonas Devlieghere 31fa76fd24 [lldb] Check that files exists before handing them off to FileCollector
The FileCollector asserts that paths passed to addDirectory are indeed
directories. For that to work, the file needs to actually exist. In the
downstream Swift fork we have tests that remove files during testing,
which resulted in this assertion getting triggered.
2021-02-18 16:16:15 -08:00
Matt Arsenault 2d3d2e78d0 MIR: Fix parser crash on syntax error on first character
This was calling the diagnostic printer before the context member was
initialized.
2021-02-18 18:59:08 -05:00
Michael Kruse ea37ee5bc4 [Polly] Update IslAstInfo::getNodePayload to use isl C++ interface. NFC. 2021-02-18 17:53:32 -06:00
Jianzhou Zhao 7e658b2fdc [dfsan] Instrument origin variable and function definitions
This is a part of https://reviews.llvm.org/D95835.

Reviewed-by: morehouse, gbalats

Differential Revision: https://reviews.llvm.org/D96977
2021-02-18 23:50:05 +00:00
Leonard Chan c77659e549 [llvm][IR] Do not place constants with static relocations in a mergeable section
This patch provides two major changes:

1. Add getRelocationInfo to check if a constant will have static, dynamic, or
   no relocations. (Also rename the original needsRelocation to needsDynamicRelocation.)
2. Only allow a constant with no relocations (static or dynamic) to be placed
   in a mergeable section.

This will allow unused symbols that contain static relocations and happen to
fit in mergeable constant sections (.rodata.cstN) to instead be placed in
unique-named sections if -fdata-sections is used and subsequently garbage collected
by --gc-sections.

See https://lists.llvm.org/pipermail/llvm-dev/2021-February/148281.html.

Differential Revision: https://reviews.llvm.org/D95960
2021-02-18 15:39:00 -08:00