70cb67fcf4
Expand api out in the usual inserter way, though, I do have a
...
question, can we get rid of the BasicBlock versions of all inserters
and use Head == 0 to indicate the old case when GetInsertBlock == 0?
llvm-svn: 83216
2009-10-01 22:08:58 +00:00
9a051a5922
Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.
...
llvm-svn: 83215
2009-10-01 21:46:35 +00:00
6f012d83f2
ARM::tPOP and tPOP_RET each has an extra writeback operand now.
...
llvm-svn: 83214
2009-10-01 20:54:53 +00:00
75cc16c0f2
Add support to extract lexical scope information from DebugLoc attached with an machine instruction.
...
This is not yet enabled.
llvm-svn: 83210
2009-10-01 20:31:14 +00:00
be3039e776
Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup.
...
llvm-svn: 83208
2009-10-01 19:45:32 +00:00
787f94c28d
Record first and last instruction of a scope in DbgScope.
...
llvm-svn: 83207
2009-10-01 18:25:23 +00:00
4fb2891396
Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change
...
operands of instructions with these properties while breaking anti-dep.
llvm-svn: 83198
2009-10-01 08:26:23 +00:00
1b2b64f618
Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple,
...
ld / st pairs, etc.
llvm-svn: 83197
2009-10-01 08:22:27 +00:00
d846fbf20d
Remove GVNPRE.cpp from the CMake makefile
...
llvm-svn: 83194
2009-10-01 05:30:05 +00:00
5f3cc06cd2
remove the GVNPRE pass. It has been subsumed by the GVN pass.
...
Ok'd by Owen.
llvm-svn: 83193
2009-10-01 02:18:36 +00:00
4bcd523acb
Update ARM JIT emitter to account for ld/st multiple changes.
...
llvm-svn: 83192
2009-10-01 01:39:21 +00:00
3bbc6c3ae6
Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions.
...
llvm-svn: 83191
2009-10-01 01:33:39 +00:00
34986f12e6
Add another MDNode into DebugLocTuple. This will be used to keep track of inlined functions.
...
llvm-svn: 83190
2009-10-01 01:15:28 +00:00
4dbca6dfd4
If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.
...
llvm-svn: 83189
2009-10-01 01:03:26 +00:00
e0709cfc92
Use MachineInstr as an processDebugLoc() argument.
...
This will allow processDebugLoc() to handle scopes for DWARF debug info.
llvm-svn: 83183
2009-09-30 23:12:50 +00:00
3256c751f5
Use MDNode * directly as an RecordSourceLine() argument.
...
llvm-svn: 83182
2009-09-30 22:51:28 +00:00
5c13c2d392
Remove dead code.
...
llvm-svn: 83181
2009-09-30 22:43:52 +00:00
a49be76f43
Add isFOO() helpers. Fix getDirectory() and getFilename() for DIScope.
...
llvm-svn: 83180
2009-09-30 22:34:41 +00:00
b2120755a2
Use OutStreamer.SwitchSection instead of writing out textual section directives.
...
Add a new TargetLoweringObjectFileMachO::getConstTextCoalSection method to
get access to that section.
llvm-svn: 83178
2009-09-30 22:25:37 +00:00
b633d7a665
Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use this
...
to emit target-specific things at the beginning of the asm output. This
fixes a problem for PPC, where the text sections are not being kept together
as expected. The base class doInitialization code calls DW->BeginModule()
which emits a bunch of DWARF section directives. The PPC doInitialization
code then emits all the TEXT section directives, with the intention that they
will be kept together. But as I understand it, the Darwin assembler treats
the default TEXT section as a special case and moves it to the beginning of
the file, which means that all those DWARF sections are in the middle of
the text. With this change, the EmitStartOfAsmFile hook is called before
the DWARF section directives are emitted, so that all the PPC text section
directives come out right at the beginning of the file.
llvm-svn: 83176
2009-09-30 22:06:26 +00:00
64c8d5a004
Fix a comment typo.
...
llvm-svn: 83174
2009-09-30 21:44:42 +00:00
48575e3f2e
Check for null MDNode element while printing comment.
...
llvm-svn: 83172
2009-09-30 21:26:51 +00:00
53904987ae
Fix a comment.
...
llvm-svn: 83171
2009-09-30 21:26:13 +00:00
699702e0a8
The AsmPrinter base class contains a DwarfWriter member, so there's no need
...
for derived AsmPrinters to add another one. In some cases, fixing this
removes the need to override the doInitialization method.
llvm-svn: 83170
2009-09-30 21:24:45 +00:00
8ce67f83bc
Assert that ConstantArrays are created with correctly-typed elements.
...
llvm-svn: 83168
2009-09-30 21:08:08 +00:00
ea0bb8f555
Fix this code so that it doesn't try to iterate through a std::vector
...
while calling changeImmediateDominator, which removes elements from the
vector. This fixes PR5097.
llvm-svn: 83166
2009-09-30 20:54:16 +00:00
cea8dab1d1
Silence comparison always false warning in -Asserts mode.
...
llvm-svn: 83164
2009-09-30 20:43:07 +00:00
c87197784a
Add additional assert() to verify no extraneous use of a scavenged register.
...
llvm-svn: 83163
2009-09-30 20:35:36 +00:00
711ab5b8ec
Print tag name for MDNodes that are used to encode debug info.
...
llvm-svn: 83160
2009-09-30 20:16:54 +00:00
8ff5c19ebd
Fix integer overflow in instruction scheduling. This can happen if we have
...
basic blocks that are so long that their size overflows a short.
Also assert that overflow does not happen in the future, as requested by Evan.
This fixes PR4401.
llvm-svn: 83159
2009-09-30 20:15:38 +00:00
a2fe1a6811
Clarify comment phrasing.
...
llvm-svn: 83148
2009-09-30 15:23:38 +00:00
ce5a8ca3ef
Add a option which would move ld/st multiple pass before post-alloc scheduling.
...
llvm-svn: 83145
2009-09-30 08:53:01 +00:00
f305ead1cc
Add a target hook to add pre- post-regalloc scheduling passes.
...
llvm-svn: 83144
2009-09-30 08:49:50 +00:00
6d59690c3e
Fix compile error as debug interface changed.
...
By the way, this code is buggy. You can't keep a map<MDNode *, something>
because the MDNode may be destroyed and reused for something else.
llvm-svn: 83141
2009-09-30 04:50:26 +00:00
882f4c11ed
replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()
...
per customary usage
llvm-svn: 83137
2009-09-30 01:47:59 +00:00
70ce8a03b1
When checking whether we need to reserve a register for the scavenger,
...
the size of the saved frame pointer needs to be taken into account.
llvm-svn: 83136
2009-09-30 01:43:29 +00:00
bcad0c8421
Add "isBarrier = 1" to return instructions.
...
Patch by Sylvere Teissier.
llvm-svn: 83135
2009-09-30 01:35:11 +00:00
cdd3e35005
fix compiler warning
...
llvm-svn: 83132
2009-09-30 00:37:40 +00:00
20e5f5ed79
For Darwin, emit all the text section directives together before the dwarf
...
section directives. This causes the assembler to put the text sections at
the beginning of the object file, which helps work around a limitation of the
Darwin ARM relocations. Radar 7255355.
llvm-svn: 83127
2009-09-30 00:23:42 +00:00
c2105298cc
Simplify.
...
llvm-svn: 83123
2009-09-30 00:14:40 +00:00
17199b56b0
Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.
...
llvm-svn: 83122
2009-09-30 00:10:16 +00:00
14cf8ecf0b
Add a way for a frontend to generate more complex dwarf location
...
information. This allows arbitrary code involving DW_OP_plus_uconst
and DW_OP_deref. The scheme allows for easy extention to include,
any, or all of the DW_OP_ opcodes. I thought about just exposing all
of them, but, wasn't sure if people wanted the dwarf opcodes exposed
in the api. Is that a layering violation?
With this scheme, the entire existing block scheme used by llvm-gcc
can be switched over to the new scheme. I think that would be
cleaner, as then the compiler specific bits are not present in llvm
proper. Before the old code can be yanked however, similar code in
clang would have to be removed.
Next up, more testing.
llvm-svn: 83120
2009-09-30 00:08:22 +00:00
fa6847f099
minor cleanup and add clarifying comment
...
llvm-svn: 83117
2009-09-29 23:17:20 +00:00
7b4d52b170
Lookup handler name only when assertions are enabled.
...
llvm-svn: 83114
2009-09-29 22:05:52 +00:00
b4034364d6
Add removeMD().
...
llvm-svn: 83107
2009-09-29 20:42:25 +00:00
5bf7a49fd7
Only one custom meadata of each kind can be attached with an instruction.
...
llvm-svn: 83105
2009-09-29 20:30:57 +00:00
3ea3fe6594
Additional check for regno==0
...
llvm-svn: 83103
2009-09-29 20:11:10 +00:00
561977940c
Use assertion instead of early exit to catch malformed custom metadata store.
...
llvm-svn: 83102
2009-09-29 20:01:19 +00:00
5d58383ea9
Remove unnecessary cast.
...
llvm-svn: 83100
2009-09-29 19:56:13 +00:00
b296942f6d
Remove std::string uses from DebugInfo interface.
...
llvm-svn: 83083
2009-09-29 18:40:58 +00:00
a4a7f44cb5
Simplify the tracking of virtual frame index registers. Ranges cannot overlap,
...
so a simple "current register" will suffice. Also add some additional
sanity-checking assertions to make sure things are as we expect.
llvm-svn: 83081
2009-09-29 18:23:15 +00:00
8fc22227bb
Moving register scavenging to a post pass results in virtual registers in
...
the instruction we're scavenging for. The scavenger needs to know to avoid
them when analyzing register usage.
llvm-svn: 83077
2009-09-29 17:24:37 +00:00
139c3dba53
Fix PR4687. Pre ARMv5te does not support ldrd / strd. Patch by John Tytgat.
...
llvm-svn: 83058
2009-09-29 07:07:30 +00:00
ba4a6fdd17
Parse custom metadata attached with an instruction.
...
llvm-svn: 83033
2009-09-29 00:01:14 +00:00
5264202a38
Adjust processFunctionBeforeCalleeSavedScan() to correctly reserve a stack
...
slot for the register scavenger when compiling Thumb1 functions.
llvm-svn: 83023
2009-09-28 22:08:06 +00:00
f919bd6651
Add C API calls for building FNeg operations. Patch by KS Sreeram!
...
llvm-svn: 83021
2009-09-28 21:51:41 +00:00
2d85eef974
s/class Metadata/class MetadataContext/g
...
llvm-svn: 83019
2009-09-28 21:41:20 +00:00
b1a4477f1f
Do not use global typedef for MDKindID.
...
llvm-svn: 83016
2009-09-28 21:14:55 +00:00
f230656a02
When extending the operands of an addrec, iterate through all
...
the operands, rather than trying to partition them into a start
and a step. This handles non-affine add recurrences correctly.
llvm-svn: 83011
2009-09-28 21:01:47 +00:00
565371b4c9
Do not hardcode metadata names.
...
llvm-svn: 83010
2009-09-28 20:56:00 +00:00
4854ef0023
Fix Thumb2 IT block pass bug. t2MOVi32imm may not be the start of a IT block.
...
llvm-svn: 83008
2009-09-28 20:47:15 +00:00
0bb5af345a
Use KILL instead of IMPLICIT_DEF in LowerSubregs pass.
...
llvm-svn: 83007
2009-09-28 20:32:46 +00:00
dc9efe8078
Introduce the TargetInstrInfo::KILL machine instruction and get rid of the
...
unused DECLARE instruction.
KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.
llvm-svn: 83006
2009-09-28 20:32:26 +00:00
d1415a8e56
Create a README.txt for lib/Analysis, and add an entry.
...
llvm-svn: 83001
2009-09-28 18:38:53 +00:00
59c0c1388f
Remove dead code.
...
llvm-svn: 82999
2009-09-28 18:31:56 +00:00
6905f15256
Use VerifySchedule instead of doing the work manually.
...
llvm-svn: 82995
2009-09-28 16:09:41 +00:00
86dc886584
Fix this debug output to handle the case where the loop has been deleted.
...
llvm-svn: 82994
2009-09-28 15:40:01 +00:00
0bd312afd8
Include the name of the loop header in debug messages.
...
llvm-svn: 82993
2009-09-28 15:07:18 +00:00
7d3b0be05b
Remove a redundant #ifndef and add an assertion string.
...
llvm-svn: 82991
2009-09-28 14:38:19 +00:00
9a7320c711
Convert LoopSimplify and LoopExtractor from FunctionPass to LoopPass.
...
llvm-svn: 82990
2009-09-28 14:37:51 +00:00
2dd957fff6
Pass the optimization level when constructing the ARM instruction selector.
...
Otherwise, it is always set to "default", which prevents debug info from
even being generated during isel. Radar 7250345.
llvm-svn: 82988
2009-09-28 14:30:20 +00:00
83e0d481ae
Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo
...
instruction. This makes it re-materializable.
Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.
llvm-svn: 82982
2009-09-28 09:14:39 +00:00
c30d816d7a
Fix thinko in my recent movt commit: it's not safe to remat movt, since it has input reg argument.
...
Disable rematting of it for now.
llvm-svn: 82975
2009-09-28 07:26:46 +00:00
0261b5d2d2
The select instruction is not neccesarily in the same block as the
...
phi nodes. Make sure to phi translate from the right block.
This fixes a llvm-building-llvm failure on GVN-PRE.cpp
llvm-svn: 82970
2009-09-28 06:49:44 +00:00
e0c5313493
Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of
...
physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.
llvm-svn: 82968
2009-09-28 05:28:43 +00:00
08d86dac71
Remove temporary debugging hack.
...
llvm-svn: 82953
2009-09-28 00:44:15 +00:00
4dbb301f17
Move the dominator verification code out of special code embedded within
...
the PassManager code into a regular verifyAnalysis method.
Also, reorganize loop verification. Make the LoopPass infrastructure
call verifyLoop as needed instead of having LoopInfo::verifyAnalysis
check every loop in the function after each looop pass. Add a new
command-line argument, -verify-loop-info, to enable the expensive
full checking.
llvm-svn: 82952
2009-09-28 00:27:48 +00:00
2963777d0c
Move this assert to check the condition as soon as it is known.
...
llvm-svn: 82951
2009-09-28 00:10:28 +00:00
277e767578
Extend the StartPassTimer and StopPassTimer functions so that the
...
code that stops the timer doesn't have to search to find the timer
object before it stops the timer. This avoids a lock acquisition
and a few other things done with the timer running.
llvm-svn: 82949
2009-09-28 00:07:05 +00:00
7c2b1e71c1
Use movt/movw pair to materialize 32 bit constants on ARMv6T2+.
...
This should be better than single load from constpool.
llvm-svn: 82948
2009-09-27 23:52:58 +00:00
b0934cdd1c
Fix an old copy+pasto.
...
llvm-svn: 82947
2009-09-27 23:52:07 +00:00
adde5dfde2
Extract the code for inserting a loop into the loop queue into
...
a separate function.
llvm-svn: 82946
2009-09-27 23:49:43 +00:00
37a99664ff
When a loop is deleted, immediately release all of the active
...
LoopPasses for that loop. This avoids trouble with the PassManager
trying to call verifyAnalysis on them, and frees up some memory
sooner rather than later.
llvm-svn: 82945
2009-09-27 23:43:07 +00:00
5e8ba5d514
Extract the code for releasing a pass into a separate function, and
...
tidy it up a little.
llvm-svn: 82944
2009-09-27 23:38:27 +00:00
93e06a57c9
Remove the "metadata*" type and simplify the code it complicated. This was only
...
used to support GlobalVariables storing MDNodes, back when they were derived
from Constant before the introduction of NamedMDNode, but never removed.
llvm-svn: 82943
2009-09-27 23:27:42 +00:00
a5fc03562f
LBRX no longer has an explicit SrcValueSDNode operand, so the type
...
operand is now at index 2, rather than 3. This fixes the
"Invalid child # of SDNode!" failures on PowerPC.
llvm-svn: 82942
2009-09-27 23:17:47 +00:00
4425660b1f
simplify some code.
...
llvm-svn: 82936
2009-09-27 21:46:50 +00:00
b2e88cd01c
The bitcast case is not needed here: instcombine turns icmp(bitcast(x), null) -> icmp(x, null) already.
...
llvm-svn: 82935
2009-09-27 21:42:46 +00:00
8b4d3dfbbf
calls are already unmovable, malloc doesn't need a special case.
...
llvm-svn: 82933
2009-09-27 21:36:19 +00:00
f9e0c7f84b
calls to external functions are already marked overdefined, special casing
...
malloc isn't needed.
llvm-svn: 82932
2009-09-27 21:35:11 +00:00
5abb1e4cd2
calls are already handled, malloc doesn't need a special case.
...
llvm-svn: 82931
2009-09-27 21:33:46 +00:00
28a5f25d87
Round out the API for the new optimization flags.
...
llvm-svn: 82930
2009-09-27 21:33:04 +00:00
466d57f6c1
calls are rejected above, no need to special case malloc here.
...
llvm-svn: 82929
2009-09-27 21:31:39 +00:00
43d0db70ac
remove special handling of bitcast(malloc), it will be handled
...
when the loop inspects the bitcast operand.
llvm-svn: 82928
2009-09-27 21:29:28 +00:00
a8627272c1
unlike the malloc instruction, "malloc" calls do not claim to be readonly, just nounwind.
...
llvm-svn: 82927
2009-09-27 21:23:38 +00:00
b391e87263
allow pushing icmps through phis with multiple uses and across critical edges.
...
These are important to push up to encourage jump threading. This shrinks 176.gcc a bit.
llvm-svn: 82923
2009-09-27 20:46:36 +00:00
ae289632ef
Enhance the previous fix for PR4895 to allow more values than just
...
simple constants for the true/false value of the select. We now
do phi translation etc. This really fixes PR4895 :)
llvm-svn: 82917
2009-09-27 20:18:49 +00:00
facb867af3
implement PR4895, by making FoldOpIntoPhi handle select conditions
...
that are phi nodes. Also tighten up FoldOpIntoPhi to treat constantexpr
operands to phis just like other variables, avoiding moving constantexpr
computations around.
Patch by Daniel Dunbar.
llvm-svn: 82913
2009-09-27 19:57:57 +00:00
336e2bd91b
Use explicit structs instead of std::pair to map callee saved regs to spill slots.
...
llvm-svn: 82909
2009-09-27 17:58:47 +00:00
cb663d749d
Delete a bogus comment.
...
llvm-svn: 82908
2009-09-27 17:50:44 +00:00
Mike Stump