447762da85
Merge System into Support.
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llvm-svn: 120298
2010-11-29 18:16:10 +00:00
db9820ecaa
Use rip-rel addressing on win64 by default. For this we just
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defaults to small pic code model.
llvm-svn: 111741
2010-08-21 17:21:11 +00:00
09dc24beac
Add x86 CLMUL (Carry-less multiplication) cpu feature
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llvm-svn: 109206
2010-07-23 01:17:51 +00:00
d429846eca
Have the X86 backend use Triple instead of a string and some enums.
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llvm-svn: 107625
2010-07-05 19:26:33 +00:00
faa7bdccbf
fix a nasty bug where we were not treating available_externally
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symbols as declarations in the X86 backend. This would manifest
on darwin x86-32 as errors like this with -fvisibility=hidden:
symbol '__ZNSbIcED1Ev' can not be undefined in a subtraction expression
This fixes PR7353.
llvm-svn: 105954
2010-06-14 20:11:56 +00:00
dc53f1cb5c
FastISel doesn't yet handle callee-pop functions.
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To support this, move IsCalleePop from X86ISelLowering to X86Subtarget.
llvm-svn: 104866
2010-05-27 18:43:40 +00:00
050df1b8de
Enable i16 to i32 promotion by default.
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llvm-svn: 102493
2010-04-28 08:30:49 +00:00
9c8cd8c061
isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.
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llvm-svn: 101979
2010-04-21 01:47:12 +00:00
2ef63183a5
Separate out the AES-NI instructions from the SSE4.2 instructions. Add
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a new subtarget option for AES and check for the support. Add "westmere"
line of processors and add AES-NI support to the core i7.
Add a couple of TODOs for information I couldn't verify.
llvm-svn: 100231
2010-04-02 21:54:27 +00:00
738b0f9ec7
Nehalem unaligned memory access is fast.
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llvm-svn: 100089
2010-04-01 05:58:17 +00:00
bf724b9ee0
Turning off post-ra scheduling for x86. It isn't a consistent win.
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llvm-svn: 98810
2010-03-18 06:55:42 +00:00
402d6442c5
no really, all 64-bit cpu's have cmov support. This should
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fix the rest of the buildbot failures on non-x86 hosts.
llvm-svn: 98522
2010-03-14 22:39:35 +00:00
091217be6f
Kill ModuleProvider and ghost linkage by inverting the relationship between
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Modules and ModuleProviders. Because the "ModuleProvider" simply materializes
GlobalValues now, and doesn't provide modules, it's renamed to
"GVMaterializer". Code that used to need a ModuleProvider to materialize
Functions can now materialize the Functions directly. Functions no longer use a
magic linkage to record that they're materializable; they simply ask the
GVMaterializer.
Because the C ABI must never change, we can't remove LLVMModuleProviderRef or
the functions that refer to it. Instead, because Module now exposes the same
functionality ModuleProvider used to, we store a Module* in any
LLVMModuleProviderRef and translate in the wrapper methods. The bindings to
other languages still use the ModuleProvider concept. It would probably be
worth some time to update them to follow the C++ more closely, but I don't
intend to do it.
Fixes http://llvm.org/PR5737 and http://llvm.org/PR5735 .
llvm-svn: 94686
2010-01-27 20:34:15 +00:00
206351a1ff
Implement a feature (-vector-unaligned-mem) to allow targets to
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ignore alignment requirements for SIMD memory operands. This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.
llvm-svn: 93151
2010-01-11 16:29:42 +00:00
0041181684
Change errs() to dbgs().
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llvm-svn: 92648
2010-01-05 01:29:13 +00:00
71d7eaa87e
Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size.
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llvm-svn: 91910
2009-12-22 17:47:23 +00:00
4cf30b72bf
On recent Intel u-arch's, folding loads into some unary SSE instructions can
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be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.
movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0
instead of
cvtss2sd (%rdi), %xmm0
An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0
llvm-svn: 91672
2009-12-18 07:40:29 +00:00
9528ccdd77
Don't enable the post-RA scheduler on x86 except at -O3. In its
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current form, it is too expensive in compile time.
llvm-svn: 90781
2009-12-07 19:04:31 +00:00
7a6611793f
Target-independent support for TargetFlags on BlockAddress operands,
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and support for blockaddresses in x86-32 PIC mode.
llvm-svn: 89506
2009-11-20 23:18:13 +00:00
241d01b590
Add llvm::sys::getHostCPUName, for detecting the LLVM name for the host CPU.
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- This is an initial step towards -march=native support in Clang, and towards
eliminating host dependencies in the targets. See PR5389.
- Patch by Roman Divacky!
llvm-svn: 88768
2009-11-14 10:09:12 +00:00
b9fe5d5d02
Allow target to specify regclass for which antideps will only be broken along the critical path.
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llvm-svn: 88682
2009-11-13 19:52:48 +00:00
0d412c2528
Fixed to address code review. No functional changes.
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llvm-svn: 86634
2009-11-10 00:48:55 +00:00
e4a2117161
Remove X86Subtarget::IsLinux. It's no longer being used.
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llvm-svn: 84200
2009-10-15 20:23:21 +00:00
1b38952c99
Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172.
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llvm-svn: 80904
2009-09-03 07:04:02 +00:00
c3a0aba120
Make these functions static and local.
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llvm-svn: 80892
2009-09-03 05:47:34 +00:00
47455a79ae
X86JITInfo::getLazyResolverFunction() should not read cpu id to determine whether sse is available. Just use consult subtarget.
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No functionality changes.
llvm-svn: 80880
2009-09-03 04:37:05 +00:00
cc8c581a5b
Add support for modeling whether or not the processor has support for
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conditional moves as a subtarget feature. This is the easy part of
PR4841.
llvm-svn: 80763
2009-09-02 05:53:04 +00:00
f43ab91486
Short-term workaround for frame-related weirdness on win64.
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Some other minor win64 fixes as well.
Patch by Michael Beck!
llvm-svn: 80370
2009-08-28 16:06:41 +00:00
1e9097e36a
change the -x86-asm-syntax=intel/att flag to be in X86TAI
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instead of X86 Subtarget. This elimianates dependencies on
X86Subtarget from X86TAI.
llvm-svn: 78746
2009-08-11 23:01:09 +00:00
4cc1feff4f
Remove some dead code.
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llvm-svn: 78219
2009-08-05 18:12:37 +00:00
6eecd56efc
- s/DOUT/DEBUG(errs()/g
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- Tidy up some headers.
llvm-svn: 77929
2009-08-03 00:11:34 +00:00
31b44e8f6c
Normalize Subtarget constructors to take a target triple string instead of
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Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
llvm-svn: 77918
2009-08-02 22:11:08 +00:00
ac0ca9241a
Fix some minor MSVC compiler warnings.
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llvm-svn: 76356
2009-07-19 01:38:38 +00:00
02a765280f
GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll.
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llvm-svn: 76121
2009-07-16 22:53:10 +00:00
7dce9919e1
fix indentation
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llvm-svn: 75277
2009-07-10 21:01:59 +00:00
21c2940553
remove the now-dead TM argument to these methods.
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llvm-svn: 75276
2009-07-10 21:00:45 +00:00
ba4d73310a
make PIC vs DynamicNoPIC be explicit in PICStyles.
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llvm-svn: 75275
2009-07-10 20:58:47 +00:00
bd3e560f1a
some minor simplifications.
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llvm-svn: 75274
2009-07-10 20:53:38 +00:00
e2f524f176
add a couple of predicates to test for "stub style pic in PIC mode" and "stub style pic in dynamic-no-pic" mode.
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llvm-svn: 75273
2009-07-10 20:47:30 +00:00
20073edf67
simplify fast isel by using ClassifyGlobalReference. This
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elimiantes the last use of GVRequiresExtraLoad, so delete it.
llvm-svn: 75244
2009-07-10 07:48:51 +00:00
93f0f79178
eliminate GVRequiresRegister, replacing it with predicates we
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need for other purposes.
llvm-svn: 75243
2009-07-10 07:38:24 +00:00
dc842c06c2
move some classification logic around. Now GVRequiresExtraLoad
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is just a trivial wrapper around "ClassifyGlobalReference", which
stole a ton of logic from LowerGlobalAddress.
llvm-svn: 75237
2009-07-10 07:20:05 +00:00
b9af63a4d2
GVRequiresExtraLoad is now never used for calls, simplify it based on this.
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llvm-svn: 75232
2009-07-10 05:52:02 +00:00
ace6ec26d9
actually, just eliminate PCRelGVRequiresExtraLoad. It makes the code
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more complex and slow than just directly testing what we care about.
llvm-svn: 75231
2009-07-10 05:48:03 +00:00
7277a807f0
There is only one case where GVRequiresExtraLoad returns true for calls:
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split its handling out to PCRelGVRequiresExtraLoad, and simplify code
based on this.
llvm-svn: 75230
2009-07-10 05:45:15 +00:00
1cc7ae7c3b
the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.
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llvm-svn: 75229
2009-07-10 05:37:11 +00:00
fef11d6e77
simplify some code based on the fact that picstyles != none are only valid
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in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot.
llvm-svn: 75101
2009-07-09 04:39:06 +00:00
821084a356
Reduce indentation in GVRequiresExtraLoad. Return true for windows
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with DLLImport symbols even when in -static mode.
llvm-svn: 75093
2009-07-09 03:27:27 +00:00
8f6f72cc99
Add feature flags for AVX and FMA and fix some SSE4A feature flag
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initialization problems.
llvm-svn: 74350
2009-06-26 22:46:54 +00:00
77d1943637
The attached patches implement most of the ARM AAPCS-VFP hard float
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ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.
Patch by Sandeep Patel!
llvm-svn: 73095
2009-06-08 22:53:56 +00:00
Michael J. Spencer