Commit Graph

317787 Commits

Author SHA1 Message Date
Sjoerd Meijer d74c2131c3 Follow up of r362096
The new tests were failing, because I missed dependent patch D60697.
I have removed the failing cases for now, which I will restore once
D60697 is in.

llvm-svn: 362100
2019-05-30 15:04:06 +00:00
Fangrui Song bdaa39ea6c [ELF] De-template addUndefined() and addWrappedSymbols(). NFC
llvm-svn: 362099
2019-05-30 14:50:10 +00:00
Csaba Dabis 17604c3486 [analyzer] print() JSONify chain: Fix build-bot breaks
Summary:
Printing out a map structure different in different environments so that
this patch generalize the test-case to check for the 'no stmt'-case
anywhere in the Store.

llvm-svn: 362098
2019-05-30 14:48:43 +00:00
Sjoerd Meijer eb072b5a6a [ARM] Change the MC names for VMAXNM/VMINNM
Now the NEON ones have a prefix "NEON_", and the VFP ones have a
prefix "VFP_". This is so that the regex in ARMScheduleA57.td can be
made to match both of _those_ classes of VMAXNM without also matching
the MVE ones that are going to be introduced soon. NFCI.

Patch by Simon Tatham.

Differential Revision: https://reviews.llvm.org/D60700

llvm-svn: 362097
2019-05-30 14:34:29 +00:00
Sjoerd Meijer 24f12711ae [ARM] Add CLI support for Armv8.1-M and MVE
Given the existing infrastructure in LLVM side for +fp and +fp.dp,
this is more or less trivial, needing only one tiny source change and
a couple of tests.

Patch by Simon Tatham.

Differential Revision: https://reviews.llvm.org/D60699

llvm-svn: 362096
2019-05-30 14:22:26 +00:00
Fangrui Song 064ae08e86 [ELF][test] Update znotext-plt-relocations.s to emit R_X86_64_PC32
This is a leftover from r325379.

The intention of this test was to check in a non-pic link, R_X86_64_PC32
to a STT_FUNC created a PLT. However, after the llvm-mc change in
r325569, this code path is no longer exercised. Use the r325379 trick to
keep testing R_X86_64_PC32.

llvm-svn: 362095
2019-05-30 14:16:29 +00:00
Simon Pilgrim 5359bb4d31 [ARM] LowerVECTOR_SHUFFLE - fix uninitialized variable warnings. NFCI.
llvm-svn: 362094
2019-05-30 14:01:24 +00:00
Roman Lebedev 8f220a5d2c [NFC][Codegen] Add add+sub/sub+add constant-fold tests for from D62257
add+sub/sub+add when second operands are constants should be folded
into a single add, just like with add+add.

llvm-svn: 362093
2019-05-30 13:02:11 +00:00
Roman Lebedev e8578953ac [LoopIdiom] Basic OptimizationRemarkEmitter handling
Summary:
I'm adding ORE to memset/memcpy formation, with tests,
but mainly this is split off from D61144.

Reviewers: reames, anemet, thegameg, craig.topper

Reviewed By: thegameg

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62631

llvm-svn: 362092
2019-05-30 13:02:06 +00:00
Roman Lebedev fae2e46766 [LoopIdiomRecognize][NFC] Sort includes
Split off from D61144

llvm-svn: 362091
2019-05-30 13:01:53 +00:00
Sjoerd Meijer 930dee2c0b [ARM] add target arch definitions for 8.1-M and MVE
This adds:
- LLVM subtarget features to make all the new instructions conditional on,
- CPU and FPU names for use on clang's command line, with default FPUs set
  so that "armv8.1-m.main+fp" and "armv8.1-m.main+fp.dp" will select the right
  FPU features,
- architecture extension names "mve" and "mve.fp",
- ABI build attribute support for v8.1-M (a new value for Tag_CPU_arch) and MVE
  (a new actual tag).

Patch mostly by Simon Tatham.

Differential Revision: https://reviews.llvm.org/D60698

llvm-svn: 362090
2019-05-30 12:57:04 +00:00
George Rimar 31e6d8feea [llvm-readobj] - Rewrite reloc-types.test to use YAML. NFCI.
This change rewrites and splits reloc-types.test
to use yaml2obj instead of precompiled binaries.
That allowed to remove 7 precompiled objects from the inputs.

I took the existent objects, used obj2yaml on them, simplified the result and
used yaml2obj in the test case with the result.

Notes:
* I converted, but did not remove relocs.obj.elf-i386, relocs.obj.elf-x86_64 or relocs.obj.elf-mips objects
because found they are used in other tests. 
* I was unable to convert relocs.obj.elf-ppc64, because obj2yaml hangs on this file for me.
* I was unable to convert relocs.obj.macho-arm, relocs.obj.macho-i386 and relocs.obj.macho-x86_64
because the output produced by obj2yaml does not seem to be correct.
* Because of the above I did not remove the script for creating all
of those objects: test\tools\llvm-readobj\Inputs\relocs.py

Differential revision: https://reviews.llvm.org/D62594

llvm-svn: 362089
2019-05-30 12:39:05 +00:00
Sjoerd Meijer 7eb95d672d [ARM] Introduce separate features for FP registers
The MVE extension in Arm v8.1-M permits the use of some move, load and
store isntructions which access the FP registers, even if there's no
actual FP support in the processor (in particular, if you have the
integer-only version of MVE).

Therefore, we need separate subtarget features to condition those
instructions on, which are implied by both FP and MVE but are not part
of either.

Patch mostly by Simon Tatham.

Differential Revision: https://reviews.llvm.org/D60694

llvm-svn: 362088
2019-05-30 12:37:05 +00:00
Sven van Haastregt ce127bb60e [OpenCL] Support logical vector operators in C++ mode
Support logical operators on vectors in C++ for OpenCL mode, to
preserve backwards compatibility with OpenCL C.

Differential Revision: https://reviews.llvm.org/D62588

llvm-svn: 362087
2019-05-30 12:35:19 +00:00
Pavel Labath c767011329 DWARFASTParserClang: Delete dead code
This removes places where DW_AT_decl_file/line/column was being parsed,
but not used.

llvm-svn: 362086
2019-05-30 11:24:16 +00:00
Simon Pilgrim 9d1f8a9dd2 Fix Wdocumentation warning. NFCI.
llvm-svn: 362085
2019-05-30 10:44:36 +00:00
George Rimar 28e1ff2c3f [llvm-readobj] - An attemp to fix BB.
BB failed:
http://lab.llvm.org:8011/builders/clang-armv7-linux-build-cache/builds/15062/steps/build%20stage%201/logs/stdio

Error was:
/home/buildslave/buildslave/clang-armv7-linux-build-cache/llvm/tools/llvm-readobj/ELFDumper.cpp:3540:7:
error: non-constant-expression cannot be narrowed from type 'llvm::support::detail::packed_endian_specific_integral<unsigned long long,
llvm::support::endianness::little, 1>::value_type' (aka 'unsigned long long') to 'size_t' (aka 'unsigned int') in initializer list [-Wc++11-narrowing]
      StrTabSec->sh_size};

llvm-svn: 362084
2019-05-30 10:42:47 +00:00
Simon Pilgrim 9e7be9b745 [CostModel][X86] Add bool vector and/or/xor cost tests
llvm-svn: 362083
2019-05-30 10:41:04 +00:00
George Rimar c372f41c18 [llvm-readobj/llvm-readelf] - Implement GNU style dumper of the SHT_GNU_verdef section.
It was not implemented yet, we had only LLVM style dumper implemented.
Section description is here: https://refspecs.linuxfoundation.org/LSB_5.0.0/LSB-Core-generic/LSB-Core-generic/symversion.html

Differential revision: https://reviews.llvm.org/D62520

llvm-svn: 362082
2019-05-30 10:36:52 +00:00
Simon Pilgrim 32aac1727a [X86][SSE] Improve bool vector extload (PR26091)
We already have good codegen for (vXiY *ext(vXi1 bitcast(iX))) cases, this patch uses it for loads of vXi1 types as well - changing the load into a iX integer load, and bitcasting so that combineToExtendBoolVectorInReg can then use it.

Differential Revision: https://reviews.llvm.org/D62449

llvm-svn: 362081
2019-05-30 10:25:20 +00:00
George Rimar e3406c42a4 [llvm-readobj/llvm-readelf] - Implement GNU style dumper of the SHT_GNU_verneed section.
It was not implemented yet, we had only LLVM style dumper implemented.
Section description is here: https://refspecs.linuxfoundation.org/LSB_2.0.1/LSB-Core/LSB-Core/symverrqmts.html

Differential revision: https://reviews.llvm.org/D62516

llvm-svn: 362080
2019-05-30 10:14:41 +00:00
Fangrui Song 3a34bccd20 Revert "asm goto: fix out-of-bounds read of Constraints after rC362045"
It was fixed by rC362062.

llvm-svn: 362079
2019-05-30 10:05:52 +00:00
Fangrui Song 0526c0cd8e [ELF] Implement Local Dynamic style TLSDESC for x86-64
For the Local Dynamic case of TLSDESC, _TLS_MODULE_BASE_ is defined as a
special TLS symbol that makes:

1) Without relaxation: it produces a dynamic TLSDESC relocation that
computes 0. Adding @dtpoff to access a TLS symbol.
2) With LD->LE relaxation: _TLS_MODULE_BASE_@tpoff = 0 (lowest address in
the TLS block). Adding @tpoff to access a TLS symbol.

For 1), this saves dynamic relocations and GOT slots as otherwise
(General Dynamic) we would create an R_X86_64_TLSDESC and reserve two
GOT slots for each symbol.

Add ElfSym::TlsModuleBase and change the signature of getTlsTpOffset()
to special case _TLS_MODULE_BASE_.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D62577

llvm-svn: 362078
2019-05-30 10:00:20 +00:00
Simon Pilgrim 3475a46ec2 Fix sphinx warning about missing footnote.
llvm-svn: 362077
2019-05-30 09:40:35 +00:00
Simon Pilgrim df1fbbb4cc Fix MSVC "not all control paths return a value" warning.
llvm-svn: 362076
2019-05-30 09:39:45 +00:00
Pavel Labath 7e4d62a8dd DWARFASTParserClang: Move attribute parsing into a single function
Summary:
The ParseTypeFromDWARF function consists of a huge switch on the kind of
type being parsed. Each case in this switch starts with parsing the
attributes of the current DIE. A lot of these attributes are specific to
one kind of a type, but a lot of them are common too, leading to code
duplication.

This patch reduces the duplication (and the size of ParseTypeFromDWARF)
by moving the attribute parsing to a separate function. It creates a
struct (ParsedTypeAttributes), which contains a parsed form of all
attributes which are useful for parsing any kind of a type. The parsing
code for a specific type kind can then access the fields which are
relevant for that specific case.

Reviewers: JDevlieghere, clayborg, aprantl

Subscribers: jdoerfert, lldb-commits

Differential Revision: https://reviews.llvm.org/D62477

llvm-svn: 362075
2019-05-30 09:39:36 +00:00
Eugene Leviant fa147c97d6 [llvm-objcopy] Remove %p format specifiers
On 32-bit machines %p expects 32 bit values, however
addresses in llvm-objcopy are always 64 bits.

llvm-svn: 362074
2019-05-30 09:09:01 +00:00
Cullen Rhodes 7fad428931 [AArch64][SVE2] Asm: support SVE2 vector splice (constructive)
Summary:
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62530

llvm-svn: 362073
2019-05-30 08:51:39 +00:00
Cullen Rhodes ebe23041f0 [AArch64][SVE2] Asm: support SVE2 load instructions
Summary:
Patch adds support for the following instructions:
    * LDNT1SB, LDNT1B, LDNT1SH, LDNT1H, LDNT1SW, LDNT1W, LDNT1D

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62528

llvm-svn: 362072
2019-05-30 08:44:27 +00:00
Cullen Rhodes 455c529f77 [AArch64][SVE2] Asm: support FCVTX/FLOGB instructions
Summary:

Patch completes SVE2 support for:

    SVE Floating Point Unary Operations - Predicated Group

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62526

llvm-svn: 362071
2019-05-30 08:35:12 +00:00
Cullen Rhodes 028413f5ae [AArch64][SVE2] Asm: add ext (immediate offset, constructive) instruction
Summary:
The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D62518

llvm-svn: 362070
2019-05-30 08:25:17 +00:00
Pavel Labath 833dba01d9 Make CompileUnit::GetSupportFiles return a const list
There's no reason for anyone to modify a list from outside of a symbol
file (as that would break a lot of invariants that symbol files depend
on).

Make the function return a const FileSpecList and fix up a couple of
places that were needlessly binding non-const references to the result
of this function.

llvm-svn: 362069
2019-05-30 08:21:25 +00:00
Sjoerd Meijer 5857bf5d1e [ARM] Add an MVE execution domain
MVE architecturally specifies a 'beat' system in which a vector
instruction executed now will complete its actual operation over the
next four cycles, so it can overlap with the execution of the previous
and next MVE instruction.

This makes it generally an advantage to avoid moving values back and
forth between MVE registers and anywhere else, if there's any sensible
way to do the same processing in whatever register type the values
already occupied.

That's just what the 'execution domain' system is supposed to achieve.
So here we add a new execution domain which will contain all the MVE
vector instructions when they are added.

Patch by: Simon Tatham

Differential Revision: https://reviews.llvm.org/D60703

llvm-svn: 362068
2019-05-30 08:07:06 +00:00
Fangrui Song 9b8a0d7110 asm goto: fix out-of-bounds read of Constraints after rC362045
When parsing goto labels, Names and Exprs are expanded but Constraints
is not, this may cause a out-of-bounds read later in:

// GCCAsmStmt::GCCAsmStmt
// `constraints` has only `NumExprs - NumLabels` elements
  Constraints = new (C) StringLiteral*[NumExprs];
  std::copy(constraints, constraints + NumExprs, Constraints);

llvm-svn: 362067
2019-05-30 08:03:02 +00:00
Sjoerd Meijer bb4839d415 [TableGen] AsmMatcher: allow repeated input operands
If an assembly instruction has to mention an input operand name twice,
for example the MVE VMOV instruction that accesses two lanes of the
same vector by writing 'vmov r1, r2, q0[3], q0[1]', then the obvious
way to write its AsmString is to include the same operand (here $Qd)
twice. But this causes the AsmMatcher generator to omit that
instruction completely from the match table, on the basis that the
generator isn't clever enough to deal with the duplication.

But you need to have _some_ way of dealing with an instruction like
this - and in this case, where the mnemonic is shared with many other
instructions that the AsmMatcher does handle, it would be very painful
to take it out of the AsmMatcher system completely.

A nicer way is to add a custom AsmMatchConverter routine, and let that
deal with the problem if the autogenerated converter can't. But that
doesn't work, because TableGen leaves the instruction out of its table
_even_ if you provide a custom converter.

Solution: this change, which makes TableGen relax the restriction on
duplicated operands in the case where there's a custom converter.

Patch by: Simon Tatham

Differential Revision: https://reviews.llvm.org/D60695

llvm-svn: 362066
2019-05-30 07:38:09 +00:00
Petr Hosek 433a191683 [CMake] Use find_package(LLVM) instead of LLVMConfig
This addresses an issues introduced in r362047.

Differential Revision: https://reviews.llvm.org/D62640

llvm-svn: 362065
2019-05-30 07:34:39 +00:00
Sjoerd Meijer de234847e9 [TableGen] New default operand "undef_tied_input"
This is a new special identifier which you can use as a default in
OperandWithDefaultOps. The idea is that you use it for an input
operand of an instruction that's tied to an output operand, and its
semantics are that (in the default case) the input operand's value is
not used at all.

The detailed effect is that when instruction selection emits the
instruction in the form of a pre-regalloc MachineInstr, it creates an
IMPLICIT_DEF node to use as that input.

If you're creating an MCInst with explicit register names, then the
right handling would be to set the input operand to the same register
as the output one (honouring the tie) and to add the 'undef' flag
indicating that that register is deemed to acquire a new don't-care
definition just before we read it. But I haven't done that in this
commit, because there was no need to - no Tablegen backend seems to
autogenerate default fields in an MCInst.

Patch by: Simon Tatham

Differential Revision: https://reviews.llvm.org/D60696

llvm-svn: 362064
2019-05-30 07:30:37 +00:00
Pavel Labath f04b3635c4 [lldb-server] Support 'g' packets
Differential Revision: https://reviews.llvm.org/D62221
Patch by Guilherme Andrade <guiandrade@google.com>.

llvm-svn: 362063
2019-05-30 07:25:22 +00:00
Benjamin Kramer 851f57effa [AST] asm goto labels don't have constraints, don't try to copy them.
Found by asan.

llvm-svn: 362062
2019-05-30 07:21:08 +00:00
Petr Hosek b19977d5af [runtimes] Use _LIBCPP_HAS_COMMENT_LIB_PRAGMA in all relevant files
These two sources were omitted in r362055.

llvm-svn: 362061
2019-05-30 06:57:27 +00:00
Craig Topper a807495fd1 [LoopVectorize] Precommit tests for D62510. NFC
llvm-svn: 362060
2019-05-30 06:48:13 +00:00
Fangrui Song 54d3c3d436 Mark CodeGen/asm-goto.c as x86 specific after r362045
llvm-svn: 362059
2019-05-30 06:48:13 +00:00
Petr Hosek 0528726a69 [libcxx][libcxxabi] Remove the unused CMake checks
These seemed to have been used in the past but were since removed
by the add_compile_flags_if_supported functions that combine these
these checks and adding the flag, but the original checks were never
removed.

Differential Revision: https://reviews.llvm.org/D62566

llvm-svn: 362058
2019-05-30 06:08:56 +00:00
Petr Hosek f1ddf431b5 [runtimes] Use -Wunknown-pragmas for the pragma check
This is a follow up to r362055, we need -Wunknown-pragmas otherwise
the check is going to succeed it the pragma isn't supported.

llvm-svn: 362057
2019-05-30 05:38:06 +00:00
Florian Hahn e4cfa89915 [LV] Inform about exactly reason of loop illegality
Currently, only the following information is provided by LoopVectorizer
in the case when the CF of the loop is not legal for vectorization:

 LV: Can't vectorize the instructions or CFG
    LV: Not vectorizing: Cannot prove legality.

But this information is not enough for the root cause analysis; what is
exactly wrong with the loop should also be printed:

 LV: Not vectorizing: The exiting block is not the loop latch.

Patch by Pavel Samolysov.

Reviewers: mkuper, hsaito, rengolin, fhahn

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D62311

llvm-svn: 362056
2019-05-30 05:03:12 +00:00
Petr Hosek 789b7f0828 [runtimes] Check if pragma comment(lib, ...) is supported first
This fixes the issue introduced by r362048 where we always use
pragma comment(lib, ...) for dependent libraries when the compiler
is Clang, but older Clang versions don't support this pragma so
we need to check first if it's supported before using it.

llvm-svn: 362055
2019-05-30 04:40:21 +00:00
John McCall 2c91c3b7af Add the `objc_class_stub` attribute.
Swift requires certain classes to be not just initialized lazily on first
use, but actually allocated lazily using information that is only available
at runtime.  This is incompatible with ObjC class initialization, or at least
not efficiently compatible, because there is no meaningful class symbol
that can be put in a class-ref variable at load time.  This leaves ObjC
code unable to access such classes, which is undesirable.

objc_class_stub says that class references should be resolved by calling
a new ObjC runtime function with a pointer to a new "class stub" structure.
Non-ObjC compilers (like Swift) can simply emit this structure when ObjC
interop is required for a class that cannot be statically allocated,
then apply this attribute to the `@interface` in the generated ObjC header
for the class.

This attribute can be thought of as a generalization of the existing
`objc_runtime_visible` attribute which permits more efficient class
resolution as well as supporting the additon of categories to the class.
Subclassing these classes from ObjC is currently not allowed.

Patch by Slava Pestov!

llvm-svn: 362054
2019-05-30 04:09:01 +00:00
Pengfei Wang 1f67d94279 [X86] Add ENQCMD instructions
For more details about these instructions, please refer to the latest
ISE document:
https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.

Patch by Tianqing Wang (tianqing)

Differential Revision: https://reviews.llvm.org/D62281

llvm-svn: 362053
2019-05-30 03:59:16 +00:00
Fangrui Song 2632ebb551 [Driver] Render target options (e.g. -fuse-init-array) for -fembed-bitcode
Modern ELF platforms use -fuse-init-array to emit .init_array instead of
.ctors .  ld.bfd and gold --ctors-in-init-array merge .init_array and
.ctors into .init_array but lld doesn't do that.

If crtbegin*.o crtend*.o don't provide .ctors/.dtors, such .ctors in
user object files can lead to crash (see PR42002. The first and the last
elements in .ctors/.dtors are ignored - they are traditionally provided
by crtbegin*.o crtend*.o).

Call addClangTargetOptions() to ensure -fuse-init-array is rendered on
modern ELF platforms. On Hexagon, this renders -target-feature
+reserved-r19 for -ffixed-r19.

Reviewed By: compnerd

Differential Revision: https://reviews.llvm.org/D62509

llvm-svn: 362052
2019-05-30 02:30:04 +00:00
Fangrui Song d9e9701c4b [PowerPC] Set the default PLT mode on musl to Secure PLT
The musl libc only supports Secure PLT.

Patch by A. Wilcox!

Reviewed By: jhibbits

Differential Revision: https://reviews.llvm.org/D59185

llvm-svn: 362051
2019-05-30 02:13:15 +00:00