2e98ee31b3
Make the -verify-regalloc command line option available to base classes as
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RegAllocBase::VerifyEnabled.
Run the machine code verifier in a few interesting places during RegAllocGreedy.
llvm-svn: 122107
2010-12-17 23:16:35 +00:00
1740e00104
Enable loop splitting in RegAllocGreedy.
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The heuristics split around the largest loop where the current register may be
allocated without interference.
llvm-svn: 122106
2010-12-17 23:16:32 +00:00
e7601e97e1
Start using SplitKit and MachineLoopRanges in RegAllocGreedy in preparation of
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live range splitting around loops guided by register pressure.
So far, trySplit() simply prints a lot of debug output.
llvm-svn: 121918
2010-12-15 23:46:13 +00:00
0b7ca3a6a7
Simplify RegAllocGreedy's use of register aliases.
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llvm-svn: 121807
2010-12-14 23:38:19 +00:00
86a05d0bed
Move debugging code entirely within DEBUG(). Silences an unused variable
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warning in the opt build.
llvm-svn: 121791
2010-12-14 21:14:55 +00:00
5c3ad0d51e
Add LiveIntervalUnion print methods, RegAllocGreedy::trySplit debug spew.
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llvm-svn: 121783
2010-12-14 19:38:49 +00:00
e7ee72087e
Q.seenAllInterferences() must be called after Q.collectInterferingVRegs().
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llvm-svn: 121774
2010-12-14 17:47:36 +00:00
eba9095df2
Remove unused vector.
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llvm-svn: 121741
2010-12-14 00:58:47 +00:00
903b6d3261
Try reassigning all virtual register interferences, not just those with lower
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spill weight. Filter out fixed registers instead.
Add support for reassigning an interference that was assigned to an alias.
llvm-svn: 121737
2010-12-14 00:37:49 +00:00
3d7b8066aa
Add stub for RAGreedy::trySplit.
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llvm-svn: 121736
2010-12-14 00:37:44 +00:00
92da705261
Add named timer groups for the different stages of register allocation.
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llvm-svn: 121604
2010-12-11 00:19:56 +00:00
8de03d222f
Move MRI into RegAllocBase. Clean up debug output a bit.
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llvm-svn: 121599
2010-12-10 23:49:00 +00:00
bb8610635f
Remove extraneous close parenthesis.
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Fix build breakage.
llvm-svn: 121596
2010-12-10 23:14:35 +00:00
07a95f8f06
Move variable that's unused in an NDEBUG build inside the DEBUG() macro, fixing
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lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]
llvm-svn: 121594
2010-12-10 23:05:10 +00:00
adecb5e82c
Force the greedy register allocator to always use the inline spiller.
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Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.
llvm-svn: 121591
2010-12-10 22:54:44 +00:00
4d7432ebf1
Use AllocationOrder in RegAllocGreedy, fix a bug in the hint calculation.
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llvm-svn: 121584
2010-12-10 22:21:05 +00:00
1c6196228a
Fix miscompilation caused by trivial logic error in the reassignVReg()
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interference check.
llvm-svn: 121519
2010-12-10 20:45:04 +00:00
3413807913
Remember to filter out reserved rergisters from the allocation order.
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llvm-svn: 121411
2010-12-09 21:20:46 +00:00
ccef09888c
Added register reassignment prototype to RAGreedy. It's a simple
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heuristic to reshuffle register assignments when we can't find an
available reg.
llvm-svn: 121388
2010-12-09 18:15:21 +00:00
8c5f0c3115
Properly deal with empty intervals when checking for interference.
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llvm-svn: 121319
2010-12-08 23:51:35 +00:00
eaa650a945
Implement very primitive hinting support in RegAllocGreedy.
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The hint is simply tried first and then forgotten if it couldn't be allocated
immediately.
llvm-svn: 121306
2010-12-08 22:57:16 +00:00
e0df786c98
Store (priority,regnum) pairs in the priority queue instead of providing an
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abstract priority queue interface in subclasses that want to override the
priority calculations.
Subclasses must provide a getPriority() implementation instead.
This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.
It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.
Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.
When someone invents a stable spill weight representation, it can be reused for
allocation priorities.
llvm-svn: 121294
2010-12-08 22:22:41 +00:00
310916a22d
Trim includes.
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llvm-svn: 121283
2010-12-08 21:12:00 +00:00
b8812a1c15
Stub out RegAllocGreedy.
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This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.
RegAllocGreedy will eventually replace linear scan.
llvm-svn: 121234
2010-12-08 03:26:16 +00:00
Jakob Stoklund Olesen