Remove common instructions from rv64 tests since they are now
covered by the rv64 run lines in the rv32 tests.
Add rv32-only* tests for a few cases that aren't common between
r32 and rv64.
Addresses review feedback from D95150.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D95272
Add tests to make sure common instructions are accepted in RV64
and not just RV32.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D95150
Zext.h will need to come back to Zbb, but that only uses specific
encodings of pack.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94742
This adds the instruction encoding and mnenomics for the proposed
RISC-V Bit Manipulation extension (version 0.92). It is implemented with
each category of instruction as its own target feature, with the 'b'
extension feature enabling all options. Since this extension is not yet
ratified, all target features are prefixed with 'experimental-' to note
their status.
Differential Revision: https://reviews.llvm.org/D65649