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5 Commits

Author SHA1 Message Date
Zoran Jovanovic 6e6a2c9cd7 [mips][microMIPS] Implement PREFX, LHUE, LBE, LBUE, LHE, LWE, SBE, SHE and SWE instructions 
Differential Revision: http://reviews.llvm.org/D9189

llvm-svn: 247780
 2015-09-16 09:14:35 +00:00
Vasileios Kalintiris 238692beb9 [mips] Add support for COP1's Branch-On-Cond-Likely instructions 
Summary: Depends on D5782

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5802

llvm-svn: 220042
 2014-10-17 14:08:28 +00:00
Vasileios Kalintiris 6d1e64896d [mips] Add support for COP0's Branch-On-Cond-Likely instructions 
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5782

llvm-svn: 220036
 2014-10-17 12:38:35 +00:00
Toma Tabacu 65f1057191 [mips] Improve the error messages given by MipsAsmParser. 
Summary: Changed error messages to be more informative and to resemble other clang/llvm error messages (first letter is lower case, no ending punctuation) and updated corresponding tests.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D5065

llvm-svn: 217873
 2014-09-16 15:00:52 +00:00
Daniel Sanders 6c97d979df [mips][mips64r6] prefx is not available on MIPS32r6/MIPS64r6 
Summary: We haven't implemented this instruction so we only add a test case.

Reviewers: vmedic, zoran.jovanovic, jkolek

Reviewed By: jkolek

Differential Revision: http://reviews.llvm.org/D4004

llvm-svn: 210779
 2014-06-12 13:51:27 +00:00