Commit Graph

373353 Commits

Author SHA1 Message Date
Craig Topper f325b4bbce [RISCV] Replace sexti32/zexti32 in isel patterns where only one part of their PatFrags can match. NFCI
We had an zexti32 after a sign_extend_inreg. The AND X, 0xffffffff
part of the zexti32 should never occur since SimplifyDemandedBits
from the sign_extend_inreg would have removed it.

We also had sexti32 as the root node of a pattern, but SelectionDAGISel
matches assertsext early before the tablegen based patterns are
evaluated.
2020-11-27 11:37:25 -08:00
Krzysztof Parzyszek b7bde0e4f3 [Hexagon] Improve check for HVX types
Allow non-simple types, like <17 x i32> to be treated as HVX vector
types.
2020-11-27 13:33:10 -06:00
zoecarver b2943765e7 [libc++] Use std::move in numeric algorithms (P0616R0).
This patch updates algorithms in <numeric> to use std::move
based on p0616r0. Moving values instead of copying them
creates huge speed improvements (see the paper for details).

Differential Revision: https://reviews.llvm.org/D61170
2020-11-27 11:09:44 -08:00
diggerlin 851779652a [AIX][XCOFF][NFC] Change geNumberOfVRSaved function name to getNumberOfVRSaved.
SUMMARY:

  Change geNumberOfVRSaved function name to getNumberOfVRSaved of class TBVectorExt

Reviewers: hubert.reinterpretcast, Jason Liu
Differential Revision: https://reviews.llvm.org/D92225
2020-11-27 13:37:43 -05:00
Nico Weber a0994cbe27 lld-link: Let LLD_REPRODUCE control /reproduce:, like in ld.lld
Also sync help texts for the option between elf and coff ports.

Decisions:
- Do this even if /lldignoreenv is passed. /reproduce: does not affect
  the main output, and this makes the env var more convenient to use.
  (On the other hand, it's now possible to set this env var and forget
  about it, and all future builds in the same shell will be much slower.
  That's true for ld.lld, but posix shells have an easy way to set an
  env var for a single command; in cmd.exe this is not possible without
  contortions. Then again, lld-link runs in posix shells too.)

Original patch rebased across D68378 and D68381.

Differential Revision: https://reviews.llvm.org/D67707
2020-11-27 13:33:55 -05:00
Andre Vieira a4b80efea9 [AArch64] Define __ARM_FEATURE_{CRC32,ATOMICS}
This patch implements the definition of __ARM_FEATURE_ATOMICS and fixes the
missing definition of __ARM_FEATURE_CRC32 for Armv8.1-A.

Differential Revision: https://reviews.llvm.org/D91438
2020-11-27 17:42:43 +00:00
Sylvestre Ledru fa39b9eab1 TargetProcessControl.cpp - Remove warning: extra ‘;’ 2020-11-27 18:19:58 +01:00
Florian Hahn ae008798a4
[VPlan] Use VPTransformState::set in widenGEP.
This patch updates widenGEP to manage the resulting vector values using
the VPValue of VPWidenGEP recipe.
2020-11-27 17:01:55 +00:00
Louis Dionne 564628014c [libc++] Introduce an indirection to create threads in the test suite
We create threads using std::thread in various places in the test suite.
However, the usual std::thread constructor may not work on all platforms,
e.g. on platforms where passing a stack size is required to create a thread.

This commit introduces a simple indirection that makes it easier to tweak
how threads are created inside the test suite on various platforms. Note
that tests that are purposefully calling std::thread's constructor directly
(e.g. because that is what they're testing) were not modified.
2020-11-27 11:54:19 -05:00
Francesco Petrogalli 8e0148dff7 [AllocaInst] Update `getAllocationSizeInBits` to return `TypeSize`.
Reviewed By: peterwaller-arm, sdesmalen

Differential Revision: https://reviews.llvm.org/D92020
2020-11-27 16:39:10 +00:00
Simon Pilgrim 2ad2e91016 [X86] Add AVX2/AVX512 test coverage in sat-add.ll
Shows the failure to combine to uaddsat
2020-11-27 16:11:02 +00:00
Simon Pilgrim c4628460b7 [Hexagon] Add HVX support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns
Followup to D92112 now that I've learnt about HVX type splitting.

This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876.

Differential Revision: https://reviews.llvm.org/D92169
2020-11-27 15:46:11 +00:00
Jon Chesterfield 89a0f48c58 [libomptarget][cuda] Detect missing symbols in plugin at build time
[libomptarget][cuda] Detect missing symbols in plugin at build time

Passes -z,defs to the linker. Error on unresolved symbol references.

Otherwise, those unresolved symbols present as target code running on the host
as the plugin fails to load. This is significantly harder to debug than a link
time error. Flag matches that passed by amdgcn and ve plugins.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D92143
2020-11-27 15:39:41 +00:00
Louis Dionne da1b50d7df [libc++] Formalize what configurations are covered by the ABI lists
By encoding ABI-affecting properties in the name of the ABI list, it
makes it clear when an ABI list test should or should not be available,
and what results we should expect.

Note that we clearly don't encode all ABI-affecting parameters in the
name right now -- I just ported over what we supported in the code that
was there previously. As we encounter configurations that we wish to
support but produce different ABI lists, we can add those to the ABI
identifier and start supporting them.

This commit also starts checking the ABI list in the CI jobs that run
a supported configuration. Eventually, all configurations should have
a generated ABI list and the test should even run implicitly as part of
the Lit test suite.

Differential Revision: https://reviews.llvm.org/D92194
2020-11-27 10:01:07 -05:00
Bruce Mitchener 527a7fdfbd [libc++] Replace several uses of 0 by nullptr
Differential Revision: https://reviews.llvm.org/D43159
2020-11-27 10:00:21 -05:00
Evgeny Leviant 4c419c454a [TableGen][SchedModels] Get rid of hasVariant. NFC
Differential revision: https://reviews.llvm.org/D92026
2020-11-27 18:00:02 +03:00
Zarko Todorovski ff8e8c1b14 [AIX] Enabling vector type arguments and return for AIX
This patch enables vector type arguments on AIX.  All non-aggregate Altivec vector types are 16bytes in size and are 16byte aligned.

Reviewed By: Xiangling_L

Differential Revision: https://reviews.llvm.org/D92117
2020-11-27 09:55:52 -05:00
Tamas Berghammer e4c74fd9dd Don't elide splat attributes during printing
A splat attribute have a single element during printing so we should
treat it as such when we decide if we elide it or not based on the flag
intended to elide large attributes.

Reviewed By: rriddle, mehdi_amini

Differential Revision: https://reviews.llvm.org/D92165
2020-11-27 14:42:26 +00:00
Hans Wennborg 0ce32a7982 Revert "[ASTMatchers] Matcher macros with params move params instead of copying"
This broke some clang matcher tests in 32-bit MSVC builds; see PR46781.

> Summary: Use move semantics instead of copying for AST Matchers with parameters
>
> Reviewers: aaron.ballman, gribozavr2
>
> Reviewed By: gribozavr2
>
> Subscribers: cfe-commits
>
> Tags: #clang
>
> Differential Revision: https://reviews.llvm.org/D75096

This reverts commit 3e9a7b2ba4.
2020-11-27 14:51:27 +01:00
Sjoerd Meijer a2016dc887 [AArch64][SLP] Precommit tests which would be better not to SLP vectorize. NFC. 2020-11-27 13:43:16 +00:00
Erik Tomusk 7793db35ca [OpenCL] Check for extension string extension lookup
Calling any of the OpenCLOptions::is*() functions (except isKnown())
with an unknown extension string results in a seg fault. This patch
checks that the extension exists in the map before attempting to access
it.

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D90928
2020-11-27 13:16:39 +00:00
Felipe de Azevedo Piovezan 63d3198ced [mlir] Fix typos and broken links in LangRef
Many pages have had their titles renamed over time,
causing broken links to spread throughout the documentation.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D92093
2020-11-27 14:07:32 +01:00
Georgii Rymar ee9ffc7345 [obj2yaml] - Dump the `EShNum` key in some cases.
This patch starts emitting the `EShNum` key, when the `e_shnum = 0`
and the section header table exists.

`e_shnum` might be 0, when the the number of entries in the section header
table is larger than or equal to SHN_LORESERVE (0xff00).
In this case the real number of entries
in the section header table is held in the `sh_size`
member of the initial entry in section header table.

Currently, obj2yaml crashes when an object has `e_shoff != 0` and the `sh_size`
member of the initial entry in section header table is `0`.
This patch fixes it.

Differential revision: https://reviews.llvm.org/D92098
2020-11-27 15:56:10 +03:00
Marek Kurdej b215198bb0 [libc++] [docs] Exclude helper files from Sphinx configuration to avoid generating empty pages. 2020-11-27 13:47:20 +01:00
Georgii Rymar c2090ff594 [obj2yaml] - Don't assert when trying to calculate the expected section offset.
The following line asserts when `sh_addralign > MAX_UINT32 && (uint32_t)sh_addralign == 0`:

```
    ExpectedOffset = alignTo(ExpectedOffset,
                             SecHdr.sh_addralign ? SecHdr.sh_addralign : 1);
```

it happens because `sh_addralign` is truncated to 32-bit value, but `alignTo`
doesn't accept `Align == 0`. We should change `1` to `1uLL`.

Differential revision: https://reviews.llvm.org/D92163
2020-11-27 15:38:22 +03:00
David Green d939ba4c68 [ARM] MVE qabs vectorization test. NFC 2020-11-27 12:21:11 +00:00
Sjoerd Meijer 10ad64aa3b [SLP] Dump Tree costs. NFC.
This adds LLVM_DEBUG messages to dump the (intermediate) tree cost
calculations, which is useful to trace and see how the final cost is
calculated.
2020-11-27 11:37:33 +00:00
Simon Pilgrim 969918e177 [DAG] Legalize umin(x,y) -> sub(x,usubsat(x,y)) and umax(x,y) -> add(x,usubsat(y,x)) iff usubsat is legal
If usubsat() is legal, this is likely to result in smaller codegen expansion than the default cmp+select codegen expansion.

Allows us to move the x86-specific lowering to the generic expansion code.

Differential Revision: https://reviews.llvm.org/D92183
2020-11-27 11:18:58 +00:00
Simon Pilgrim 4b9c2bbdb6 [X86] Regenerate extract-store.ll tests
Rename prefix from X32 to X86 as we typically use X32 for gnux32 triples
2020-11-27 11:18:57 +00:00
Cheng Wang a8beb4ada4 [libc] Fix typo in buildbot README.txt.
Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D90381
2020-11-27 19:01:21 +08:00
Jay Foad 68ed644785 [LegacyPM] Avoid a redundant map lookup in setLastUser. NFC.
As a bonus this makes it (IMO) obvious that the iterator is not
invalidated, so remove the comment explaining that.
2020-11-27 10:42:01 +00:00
Jay Foad 0d9166ff79 [LegacyPM] Remove unused undocumented parameter. NFC.
The Direction parameter to AnalysisResolver::getAnalysisIfAvailable has
never been documented or used for anything.
2020-11-27 10:41:38 +00:00
Raphael Isemann 89c1a7a67d [ASTImporter] Import the default argument of NonTypeTemplateParmDecl
The test case isn't using the AST matchers for all checks as there doesn't seem to be support for
matching NonTypeTemplateParmDecl default arguments. Otherwise this is simply importing the
default arguments.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D92106
2020-11-27 11:40:07 +01:00
Richard Sandiford a2d561f1a3 [SVE] Add a couple of extra sizeless type tests
This patch adds tests for things that happened to be fixed by previous
patches, but that should continue working if we do decide to treat
sizeless types as incomplete types.

Differential Revision: https://reviews.llvm.org/D79584
2020-11-27 10:33:47 +00:00
Cullen Rhodes 7b8d50b141 [InstSimplify] Clarify use of FixedVectorType in SimplifySelectInst
Folding a select of vector constants that include undef elements only
applies to fixed vectors, but there's no earlier check the type is not
scalable so it crashes for scalable vectors. This adds a check so this
optimization is only attempted for fixed vectors.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D92046
2020-11-27 09:55:29 +00:00
Roman Lebedev b33fbbaa34
Reland [SimplifyCFG] FoldBranchToCommonDest: lift use-restriction on bonus instructions
This was orginally committed in 2245fb8aaa.
but was immediately reverted in f3abd54958
because of a PHI handling issue.

Original commit message:

1. It doesn't make sense to enforce that the bonus instruction
   is only used once in it's basic block. What matters is
   whether those user instructions fit within our budget, sure,
   but that is another question.
2. It doesn't make sense to enforce that said bonus instructions
   are only used within their basic block. Perhaps the branch
   condition isn't using the value computed by said bonus instruction,
   and said bonus instruction is simply being calculated
   to be used in successors?

So iff we can clone bonus instructions, to lift these restrictions,
we just need to carefully update their external uses
to use the new cloned instructions.

Notably, this transform (even without this change) appears to be
poison-unsafe as per alive2, but is otherwise (including the patch) legal.

We don't introduce any new PHI nodes, but only "move" the instructions
around, i'm not really seeing much potential for extra cost modelling
for the transform, especially since now we allow at most one such
bonus instruction by default.

This causes the fold to fire +11.4% more (13216 -> 14725)
as of vanilla llvm test-suite + RawSpeed.

The motivational pattern is IEEE-754-2008 Binary16->Binary32
extension code:
ca57d77fb2/src/librawspeed/common/FloatingPoint.h (L115-L120)
^ that should be a switch, but it is not now: https://godbolt.org/z/bvja5v
That being said, even thought this seemed like this would fix it: https://godbolt.org/z/xGq3TM
apparently that fold is happening somewhere else afterall,
so something else also has a similar 'artificial' restriction.
2020-11-27 12:47:15 +03:00
Roman Lebedev 4018806329
[NFC][SimplifyCFG] FoldBranchToCommonDest: add one more test with PHI
This is the problematic pattern i didn't think of,
that lead to revert of 2245fb8aaa
in f3abd54958.
2020-11-27 12:47:14 +03:00
Frederik Gossen 6484567f14 [MLIR][SCF] Find all innermost loops for parallel loop tiling
Overcome the assumption that parallel loops are only nested in other parallel
loops.

Differential Revision: https://reviews.llvm.org/D92188
2020-11-27 10:08:56 +01:00
Christian Sigg 5535696c38 [mlir] Add gpu.allocate, gpu.deallocate ops with LLVM lowering to runtime function calls.
The ops are very similar to the std variants, but support async GPU execution.

gpu.alloc does not currently support an alignment attribute, and the new ops do not have
canonicalizers/folders like their std siblings do.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D91698
2020-11-27 09:40:59 +01:00
Wang, Pengfei 8dcf8d1da5 [msan] Fix bugs when instrument x86.avx512*_cvt* intrinsics.
Scalar intrinsics x86.avx512*_cvt* have an extra rounding mode operand.
We can directly ignore it to reuse the SSE/AVX math.
This fix the bug https://bugs.llvm.org/show_bug.cgi?id=48298.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D92206
2020-11-27 16:33:14 +08:00
Nicolas Vasilache 5dd5a08363 [mlir] Let ModuleTranslate propagate LLVM triple
This adds LLVM triple propagation and updates the test that did not check it properly.

Differential Revision: https://reviews.llvm.org/D92182
2020-11-27 08:01:44 +00:00
Cheng Wang a513be4900 [libc][Obvious] Fix typo in strnlen_test.cpp. 2020-11-27 15:56:19 +08:00
Markus Lavin 808fcfe594 Revert "[DebugInfo] Improve dbg preservation in LSR."
This reverts commit 06758c6a61.

Bug: https://bugs.llvm.org/show_bug.cgi?id=48166
Additional discussion in: https://reviews.llvm.org/D91711
2020-11-27 08:52:32 +01:00
Georgii Rymar 3d811c57aa [llvm-readelf/obj] - Stop calling `reportError` in `printArchSpecificInfo()`.
This is related to MIPS. Currently we might report an error and exit,
though there is no problem to report a warning and try to continue dumping
an object. The code uses `MipsGOTParser<ELFT> Parser`, which is isolated
in this method.

Differential revision: https://reviews.llvm.org/D92090
2020-11-27 10:27:00 +03:00
Craig Topper e0481048ab [RISCV] Don't remove (and X, 0xffffffff) from inputs when matching RISCVISD::DIVUW/REMUW to 64-bit DIVU/REMU.
These patterns are using zexti32 which matches either assertzexti32
or (and X, 0xffffffff). But if we match (and X, 0xffffffff) it will
remove the AND and the inputs may no longer have the zero bits
needed to guarantee the result has enough zeros.

This commit changes the patterns to only match assertzexti32.
I'm not sure how to test the broken case since the DIVUW/REMUW nodes
are created during type legalization, but type legalization won't
create an (and X, 0xfffffffff) directly on the inputs.

I've also changed the zexti32 on the root of the pattern to just
checking for AND. We were previously also matching assertzexti32,
but I doubt that pattern would ever occur.
2020-11-26 23:15:41 -08:00
Max Kazantsev 0077e1680f [Test] Add some more tests showing how we fail to widen IV 2020-11-27 14:03:38 +07:00
Kazu Hirata 9178c630c3 [IR] Use llvm::is_contained and pred_size (NFC) 2020-11-26 22:02:04 -08:00
Max Kazantsev faf183874c [IndVars] LCSSA Phi users should not prevent widening
When widening an IndVar that has LCSSA Phi users outside
the loop, we can safely widen it as usual and then truncate
the result outside the loop without hurting the performance.

Differential Revision: https://reviews.llvm.org/D91593
Reviewed By: skatkov
2020-11-27 11:19:54 +07:00
Kirill Bobyrev abfcb606c2
[clangd] Add support for within-file rename of complicated fields
This was originally a part of D71880 but is separated for simplicity and ease
of reviewing.

Fixes: https://github.com/clangd/clangd/issues/582

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D91952
2020-11-27 03:59:28 +01:00
QingShan Zhang 4d83aba422 [DAGCombine] Adding a hook to improve the precision of fsqrt if the input is denormal
For now, we will hardcode the result as 0.0 if the input is denormal or 0. That will
have the impact the precision. As the fsqrt added belong to the cold path of the
cmp+branch, it won't impact the performance for normal inputs for PowerPC, but improve
the precision if the input is denormal.

Reviewed By: Spatel

Differential Revision: https://reviews.llvm.org/D80974
2020-11-27 02:10:55 +00:00