Commit Graph

551 Commits

Author SHA1 Message Date
Matt Beaumont-Gay 714b99dc84 Sink variable into assert
llvm-svn: 150841
2012-02-17 21:40:48 +00:00
Lang Hames a9afc6ac4a Add support for regmask slots to HMEditor. Also fixes a comment error.
llvm-svn: 150840
2012-02-17 21:29:41 +00:00
Lang Hames b9057d5fae Refactor 'handleMove' code in live intervals. Clients of LiveIntervals won't see
any changes.

Internally this adds a private inner class HMEditor, to LiveIntervals. HMEditor provides
an API for updating live intervals when code is moved or bundled.

llvm-svn: 150826
2012-02-17 18:44:18 +00:00
Lang Hames def9c61e4b Oops - isRegLiveIntoSuccessor is used in non-assert builds now. Remove NDEBUG guards.
llvm-svn: 150771
2012-02-17 00:51:32 +00:00
Lang Hames 0d72bb49f0 Turn off assertion, conservatively compute liveness for live-in un-allocatable registers.
llvm-svn: 150768
2012-02-17 00:18:18 +00:00
Lang Hames 923d199a67 Make LiveIntervals::handleMove() bundle aware.
llvm-svn: 150630
2012-02-15 23:21:33 +00:00
Lang Hames f15502f2e5 Fix assertion condition.
llvm-svn: 150627
2012-02-15 22:45:51 +00:00
Lang Hames 1b34a72f52 Remove overly conservative assert.
llvm-svn: 150608
2012-02-15 19:04:53 +00:00
Lang Hames 84f454ec5c Don't emit live ranges for physregs live-ins that are dead.
llvm-svn: 150553
2012-02-15 01:31:10 +00:00
Lang Hames 77d205152a Disentangle moving a machine instr from updating LiveIntervals.
llvm-svn: 150552
2012-02-15 01:23:52 +00:00
Jakob Stoklund Olesen fab5201e22 Use the proper clobber check in handleLiveInRegister().
When a physreg is live in to a basic block, look for any instruction in
the block that clobbers the physreg.

The instruction doesn't have to properly redefine the register, any
overlapping clobber is OK.

This slightly changes live ranges when compiling with register masks.

llvm-svn: 150528
2012-02-14 23:46:24 +00:00
Jakob Stoklund Olesen 20d25a7f40 Dump live intervals in numerical order.
The old DenseMap hashed order was very confusing.

llvm-svn: 150527
2012-02-14 23:46:21 +00:00
Lang Hames e64294ef84 Don't create a new copy of reserved regs - we already have one handy.
llvm-svn: 150525
2012-02-14 23:06:12 +00:00
Lang Hames 595111f221 Tighten physical register invariants: Allocatable physical registers can
only be live in to a block if it is the function entry point or a landing pad.

llvm-svn: 150494
2012-02-14 18:51:53 +00:00
Lang Hames 3365179018 Use convenience function for consistency.
llvm-svn: 150457
2012-02-14 03:04:29 +00:00
Andrew Trick 5188c0020c LiveIntervalAnalysis does not depend on MachineLoopInfo.
llvm-svn: 150411
2012-02-13 20:44:42 +00:00
Andrew Trick d3f8fe81f4 RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.

When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.

CodeGen transformation passes are never "required" as an analysis

ProcessImplicitDefs does not require LiveVariables.

We have a plan to massively simplify some of the early passes within the regalloc superpass.

llvm-svn: 150226
2012-02-10 04:10:36 +00:00
Lang Hames 351fc56ab0 Remove unused 'isAlias' parameter.
llvm-svn: 150224
2012-02-10 03:19:36 +00:00
Jakob Stoklund Olesen 9ef50bd66c Constrain the regmask search space for local live ranges.
When checking a local live range for interference, restrict the binary
search to the single block.

llvm-svn: 150220
2012-02-10 01:31:31 +00:00
Jakob Stoklund Olesen 25c4195ecc Cache basic block boundaries for faster RegMaskSlots access.
Provide API to get a list of register mask slots and bits in a basic
block.

llvm-svn: 150219
2012-02-10 01:26:29 +00:00
Jakob Stoklund Olesen aa06de2447 Optimize LiveIntervals::intervalIsInOneMBB().
No looping and binary searches necessary.

Return a pointer to the containing block instead of just a bool.

llvm-svn: 150218
2012-02-10 01:23:55 +00:00
Lang Hames 2176edf1c4 Fix kill flags when moving instructions using LiveIntervals::moveInstr(...).
llvm-svn: 150150
2012-02-09 04:45:38 +00:00
Lang Hames 95d6edeba8 Remove assertion. Not all use operands are reads.
llvm-svn: 150149
2012-02-09 04:39:48 +00:00
Jakob Stoklund Olesen 3ff74d8e62 Keep track of register masks in LiveIntervalAnalysis.
Build an ordered vector of register mask operands (i.e., calls) when
computing live intervals. Provide a checkRegMaskInterference() function
that computes a bit mask of usable registers for a live range.

This is a quick way of determining of a live range crosses any calls,
and restricting it to the callee saved registers if it does.
Previously, we had to discover call clobbers for each candidate register
independently.

llvm-svn: 150077
2012-02-08 17:33:45 +00:00
Andrew Trick 3bc0e0c651 Added MachineInstr::isBundled() to check if an instruction is part of a bundle.
llvm-svn: 150044
2012-02-08 02:17:25 +00:00
Jakob Stoklund Olesen abb26bae4e Drop the REDEF_BY_EC VNInfo flag.
A live range that has an early clobber tied redef now looks like a
normal tied redef, except the early clobber def uses the early clobber
slot.

This is enough to handle any strange interference problems.

llvm-svn: 149769
2012-02-04 05:51:25 +00:00
Jakob Stoklund Olesen e386578121 Correctly terminate a physreg redefined by an early clobber.
I don't have a test that fails because of this, but a test case like
CodeGen/X86/2009-12-01-EarlyClobberBug.ll exposes the problem.  EAX is
redefined by a tied early clobber operand on inline asm, and the live
range should look like this:

  %EAX,inf = [48r,64e:0)[64e,80r:1)  0@48r 1@64e

Previously, the two values got merged:

  %EAX,inf = [48r,80r:0)  0@48r

With this bug fixed, the REDEF_BY_EC VNInfo flag is no longer needed.

llvm-svn: 149768
2012-02-04 05:41:20 +00:00
Jakob Stoklund Olesen ad6b22eb16 Don't store COPY pointers in VNInfo.
If a value is defined by a COPY, that instuction can easily and cheaply
be found by getInstructionFromIndex(VNI->def).

This reduces the size of VNInfo from 24 to 16 bytes, and improves
llc compile time by 3%.

llvm-svn: 149763
2012-02-04 05:20:49 +00:00
Jakob Stoklund Olesen 22e490d908 Trim headers.
llvm-svn: 149722
2012-02-03 23:51:15 +00:00
Jakob Stoklund Olesen f798a0a0e6 Delete some dead code.
llvm-svn: 149717
2012-02-03 21:32:06 +00:00
Matt Beaumont-Gay 9cc6d524ea Here's a new one: GCC was complaining about an only-used-in-asserts
*function*. Wrap the function in #ifndef NDEBUG.

llvm-svn: 149259
2012-01-30 19:26:20 +00:00
Lang Hames a6958c6c4e Silence warning about parens for && within ||
llvm-svn: 149152
2012-01-27 23:52:25 +00:00
Lang Hames ad33d5ace7 Add a "moveInstr" method to LiveIntervals. This can be used to move instructions
around within a basic block while maintaining live-intervals.

Updated ScheduleTopDownLive in MachineScheduler.cpp to use the moveInstr API
when reordering MIs.

llvm-svn: 149147
2012-01-27 22:36:19 +00:00
Lang Hames f1508b78f9 Don't add live ranges for aliases of physregs that are live in to the
function. They don't appear to be used, and are inconsistent with handling of
other physreg intervals (i.e. intervals that are not live-in) where ranges are
not inserted for aliases.

llvm-svn: 148986
2012-01-25 22:11:06 +00:00
Lang Hames 19feb5f241 Always break upon finding a vreg operand (in Release as well as +Asserts). Remove assertion which can no longer trigger.
llvm-svn: 148984
2012-01-25 21:53:23 +00:00
Lang Hames 1997de0100 Fixed macro condition.
llvm-svn: 148408
2012-01-18 19:48:31 +00:00
Jakob Stoklund Olesen 67aec12409 Exclusively use SplitAnalysis::getLastSplitPoint().
Delete the alternative implementation in LiveIntervalAnalysis.

These functions computed the same thing, but SplitAnalysis caches the
result.

llvm-svn: 147911
2012-01-11 02:07:00 +00:00
Jakob Stoklund Olesen a8879087b5 Use the 'regalloc' debug tag for most register allocator tracing.
llvm-svn: 147725
2012-01-07 07:39:47 +00:00
Lang Hames c405ac4429 Clarified assert text.
llvm-svn: 147471
2012-01-03 20:05:57 +00:00
Evan Cheng 7f8e563a69 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026
2011-12-07 07:15:52 +00:00
Jakob Stoklund Olesen 7e6004a3c1 Fix early-clobber handling in shrinkToUses.
I broke this in r144515, it affected most ARM testers.

<rdar://problem/10441389>

llvm-svn: 144547
2011-11-14 18:45:38 +00:00
Jakob Stoklund Olesen 697979028f Use kill slots instead of the previous slot in shrinkToUses.
It's more natural to use the actual end points.

llvm-svn: 144515
2011-11-13 23:53:25 +00:00
Jakob Stoklund Olesen d8f2405e73 Terminate all dead defs at the dead slot instead of the 'next' slot.
This makes no difference for normal defs, but early clobber dead defs
now look like:

  [Slot_EarlyClobber; Slot_Dead)

instead of:

  [Slot_EarlyClobber; Slot_Register).

Live ranges for normal dead defs look like:

  [Slot_Register; Slot_Dead)

as before.

llvm-svn: 144512
2011-11-13 22:42:13 +00:00
Jakob Stoklund Olesen ce7cc08f3a Simplify early clobber slots a bit.
llvm-svn: 144507
2011-11-13 22:05:42 +00:00
Jakob Stoklund Olesen 90b5e565b6 Rename SlotIndexes to match how they are used.
The old naming scheme (load/use/def/store) can be traced back to an old
linear scan article, but the names don't match how slots are actually
used.

The load and store slots are not needed after the deferred spill code
insertion framework was deleted.

The use and def slots don't make any sense because we are using
half-open intervals as is customary in C code, but the names suggest
closed intervals.  In reality, these slots were used to distinguish
early-clobber defs from normal defs.

The new naming scheme also has 4 slots, but the names match how the
slots are really used.  This is a purely mechanical renaming, but some
of the code makes a lot more sense now.

llvm-svn: 144503
2011-11-13 20:45:27 +00:00
Jakob Stoklund Olesen f61a6fe221 Delete the old spilling framework from LiveIntervalAnalysis.
This is dead code, all register allocators use InlineSpiller.

llvm-svn: 144478
2011-11-12 23:57:05 +00:00
Jakob Stoklund Olesen ccdfbfb5e5 Add a FIXME.
TwoAddressInstructionPass should annotate instructions with <undef>
flags when it lower REG_SEQUENCE instructions.  LiveIntervals should not
be in the business of modifying code (except for kill flags, perhaps).

llvm-svn: 141187
2011-10-05 16:51:21 +00:00
Jakob Stoklund Olesen 10f2de3261 Allow <undef> flags on def operands as well as uses.
The <undef> flag says that a MachineOperand doesn't read its register,
or doesn't depend on the previous value of its register.

A full register def never depends on the previous register value.  A
partial register def may depend on the previous value if it is intended
to update part of a register.

For example:

  %vreg10:dsub_0<def,undef> = COPY %vreg1
  %vreg10:dsub_1<def> = COPY %vreg2

The first copy instruction defines the full %vreg10 register with the
bits not covered by dsub_0 defined as <undef>.  It is not considered a
read of %vreg10.

The second copy modifies part of %vreg10 while preserving the rest.  It
has an implicit read of %vreg10.

This patch adds a MachineOperand::readsReg() method to determine if an
operand reads its register.

Previously, this was modelled by adding a full-register <imp-def>
operand to the instruction.  This approach makes it possible to
determine directly from a MachineOperand if it reads its register.  No
scanning of MI operands is required.

llvm-svn: 141124
2011-10-04 21:49:33 +00:00
Jakob Stoklund Olesen b8b1d4c435 Speed up LiveIntervals::shrinkToUse with some caching.
Blocks with multiple PHI successors only need to go on the worklist
once.  Use a SmallPtrSet to track the live-out blocks that have already
been handled.  This is a lot faster than the two live range check we
would otherwise do.

Also stop recomputing hasPHIKill flags.  Like RenumberValues(), it is
conservatively correct to leave them in, and they are not used for
anything important.

llvm-svn: 139792
2011-09-15 15:24:16 +00:00
Jakob Stoklund Olesen 0494c5c35d Switch extendInBlock() to take a kill slot instead of the last use slot.
Three out of four clients prefer this interface which is consistent with
extendIntervalEndTo() and LiveRangeCalc::extend().

llvm-svn: 139604
2011-09-13 16:47:56 +00:00