Commit Graph

184522 Commits

Author SHA1 Message Date
Reed Kotler d4ea29e6b6 Finish getting Mips fast-isel to match up with AArch64 fast-isel
Summary:
In order to facilitate use of common code, checking by reviewers of other fast-isel ports, and hopefully to eventually move most of Mips and other fast-isel ports into target independent code, I've tried to get the two implementations to line up.

There is no functional code change. Just methods moved in the file to be in the same order as in AArch64.

Test Plan: No functional change.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits, aemerson, rfuhler

Differential Revision: http://reviews.llvm.org/D5692

llvm-svn: 219703
2014-10-14 18:27:58 +00:00
David Blaikie 3dfe4788ae DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself.
Let me tell you a tale...

Originally committed in r211723 after discovering a nasty case of weird
scoping due to inlining, this was reverted in r211724 after it fired in
ASan/compiler-rt.

(minor diversion where I accidentally committed/reverted again in
r211871/r211873)

After further testing and fixing bugs in ArgumentPromotion (r211872) and
Inlining (r212065) it was recommitted in r212085. Reverted in r212089
after the sanitizer buildbots still showed problems.

Fixed another bug in ArgumentPromotion (r212128) found by this
assertion.

Recommitted in r212205, reverted in r212226 after it crashed some more
on sanitizer buildbots.

Fix clang some more in r212761.

Recommitted in r212776, reverted in r212793. ASan failures.
Recommitted in r213391, reverted in r213432, trying to reproduce flakey
ASan build failure.

Fixed bugs in r213805 (ArgPromo + DebugInfo), r213952
(LiveDebugVariables strips dbg_value intrinsics in functions not
described by debug info).

Recommitted in r214761, reverted in r214999, flakey failure on Windows
buildbot.

Fixed DeadArgElimination + DebugInfo bug in r219210.

Recommitted in r219215, reverted in r219512, failure on ObjC++ atomic
properties in the test-suite on Darwin.

Fixed ObjC++ atomic properties issue in Clang in r219690.

[This commit is provided 'as is' with no hope that this is the last time
I commit this change either expressed or implied]

llvm-svn: 219702
2014-10-14 18:22:52 +00:00
Ed Maste c08a563292 Skip asan test on FreeBSD
The build fails due to missing asan runtime in the FreeBSD base system.
Instead of marking it expected fail, just skip until we have the runtime
available.

llvm.org/pr21136

llvm-svn: 219701
2014-10-14 18:04:47 +00:00
Rafael Espindola c57477912a Remove method that is identical to the base class one.
llvm-svn: 219700
2014-10-14 17:38:38 +00:00
Alexey Samsonov 37efdf0033 [UBSan] XFAIL test added in r219642 on Darwin
llvm-svn: 219699
2014-10-14 17:31:15 +00:00
Matt Arsenault e775f5fe76 R600/SI: Use DS offsets for constant addresses
Use 0 as the base address for a constant address, so if
we have a constant address we can save moves and form
read2/write2s.

llvm-svn: 219698
2014-10-14 17:21:19 +00:00
Saleem Abdulrasool 3b43447619 CodeGen: correct block mangling in ObjC
Mangling for blocks defined within blocks in an ObjectiveC context were also
broken by SVN r219393.  Because the code in mangleName assumed that the code was
either C or C++, we would trigger assertions when trying to mangle the inner
blocks in an ObjectiveC context.

Add a test and use the ObjectiveC specific mangling when dealing with an
ObjectiveC method declaration.

llvm-svn: 219697
2014-10-14 17:20:18 +00:00
Saleem Abdulrasool 64ab4de443 CodeGen: correct mangling for blocks
This addresses a regression introduced with SVN r219393.  A block may be
contained within another block.  In such a scenario, we would end up within a
BlockDecl, which is not a NamedDecl (as the names are synthesised).  The cast to
a NamedDecl of the DeclContext would then assert as the types are unrelated.

Restore the mangling behaviour to that prior to SVN r219393.  If the current
block is contained within a BlockDecl, walk up to the parent DeclContext,
recursively, until we have a non-BlockDecl.  This is expected to be a NamedDecl.
Add in a couple of asserts to ensure that the assumption that we only encounter
a block within a NamedDecl or a BlockDecl.

llvm-svn: 219696
2014-10-14 17:20:14 +00:00
David Blaikie 24026502d5 Revert "Fix stuff... again."
Accidental commit.

This reverts commit r219693.

llvm-svn: 219695
2014-10-14 17:13:09 +00:00
David Blaikie e75f963c61 Revert some parts of r196288 that were confusing and untested.
If we figure out why they should be here, let's add some testing of some
kind so we can better demonstrate why it's needed.

llvm-svn: 219694
2014-10-14 17:12:02 +00:00
David Blaikie 27549023b0 Fix stuff... again.
llvm-svn: 219693
2014-10-14 17:11:59 +00:00
David Blaikie 8e90d221f1 Formatting for prior commit
llvm-svn: 219692
2014-10-14 17:09:38 +00:00
Ulrich Weigand 804a3e655f [SystemZ] Address review comments for r219679
llvm-svn: 219691
2014-10-14 16:46:45 +00:00
David Blaikie 8e6c36eb80 DebugInfo: Don't leak location information from one function into the prologue of the next function.
CodeGenFunction objects aren't really designed to be reused for more
than one function, and doing so can leak debug info location information
from one function into the prologue of the next.

Add an assertion in to catch reuses of CodeGenFunction, which
surprisingly only caught the ObjC atomic getter/setter cases. Fix those
and add a test to demonstrate the issue.

The test is a bit slim, because we're just testing for the absence of a
debug location on the prologue instructions, which by itself probably
wouldn't be the end of the world - but the particular debug location
that was ending up there was for the previous function's last
instruction. This produced debug info for another function within this
function, which is something I'm trying to remove all cases of as its a
substantial source of bugs, especially around inlining (see r219215).

llvm-svn: 219690
2014-10-14 16:43:46 +00:00
Todd Fiala d7e27eac19 Fix dotest.py test runner exit code to return non-zero on failure/error.
This addresses this bug:
http://www.llvm.org/bugs/show_bug.cgi?id=21267

Which has been broken since svn r215256 on Aug 8 2014.

DO NOT REVERT THIS COMMIT EVEN IF IT CREATES TEST FAILURES.

The test failures are a result of accumulation of hidden failures
that were masked by the bug this change fixes.  Most of our test
runners as part of build testing rely on dotest.py returning non-zero to indicate
some kind of errant test run.  Thus, we have been flying blind
since Aug 8 2014.

llvm-svn: 219689
2014-10-14 16:17:02 +00:00
Hal Finkel a3f23e3725 [LVI] Check for @llvm.assume dominating the edge branch
When LazyValueInfo uses @llvm.assume intrinsics to provide edge-value
constraints, we should check for intrinsics that dominate the edge's branch,
not just any potential context instructions. An assumption that dominates the
edge's branch represents a truth on that edge. This is specifically useful, for
example, if multiple predecessors assume a pointer to be nonnull, allowing us
to simplify a later null comparison.

The test case, and an initial patch, were provided by Philip Reames. Thanks!

llvm-svn: 219688
2014-10-14 16:04:49 +00:00
NAKAMURA Takumi 256d37ad31 Revert r219638, (r219640 and r219676), "Removing the static destructor from ManagedStatic.cpp by controlling the allocation and de-allocation of the mutex."
It caused hang-up on msc17 builder, probably deadlock.

llvm-svn: 219687
2014-10-14 15:58:16 +00:00
Robert Khasanov 1a77f6664e [AVX512] Extended avx512_binop_rm to DQ/VL subsets.
Added encoding tests.

llvm-svn: 219686
2014-10-14 15:13:56 +00:00
Robert Khasanov 545d1b7726 [AVX512] Extended avx512_binop_rm to BW/VL subsets.
Added encoding tests.

llvm-svn: 219685
2014-10-14 14:36:19 +00:00
Bradley Smith 698e08f4cf [AArch64] Fix crash with empty/pseudo-only blocks in A53 erratum (835769) workaround
llvm-svn: 219684
2014-10-14 14:02:41 +00:00
Evgeniy Stepanov 9e984c5137 [sanitizer] Fix a crash in FP unwinder on ARM.
This change fixes 2 issues in the fast unwinder from r217079:
* A crash if a frame pointer points below current stack head, but
  inside the current thread stack limits. That memory may be
  unmapped. A check for this was lost in r217079.
* The last valid stack frame (the first one with an invalid next
  frame pointer) is always interpreted as a GCC layout frame. This
  results in garbled last PC in the (expected) case when the last
  frame has LLVM layout.

llvm-svn: 219683
2014-10-14 13:46:07 +00:00
Alexander Potapenko 45bfe37a8c [llvm-symbolizer] Minor typedef cleanup. NFC.
llvm-svn: 219682
2014-10-14 13:40:44 +00:00
Renato Golin 8fcae0b35e Fix silly commit to disable test on ARM
llvm-svn: 219681
2014-10-14 12:32:47 +00:00
Renato Golin 3743568735 Disable failing ASAN LongJump test on ARM
Updated the URL to reflect information on the problem as well as build the
case for ARM. This seems to be a wider problem, not ARM or PPC specific.

llvm-svn: 219680
2014-10-14 12:24:28 +00:00
Ulrich Weigand b454930cda [SystemZ] Add test case to verify default use of integrated assembler
llvm-svn: 219679
2014-10-14 11:45:53 +00:00
Dmitry Vyukov 4eebdf22ef tsan: remove trailing whitespace
llvm-svn: 219678
2014-10-14 09:46:56 +00:00
Evgeniy Stepanov f518a4e774 [asan] Add fast_unwind_on_check flag.
Allows to specify the unwinder to use for CHECK failures. Previous behaviour
was to use the "fatal" unwinder.
As compiler-rt is built without frame pointers, only the slow unwinder
really makes sense here, and it is the default.

llvm-svn: 219677
2014-10-14 09:36:24 +00:00
NAKAMURA Takumi 54ca964ef2 Threading.h: Use \tparam for template parameters. [-Wdocumentation]
llvm-svn: 219676
2014-10-14 09:34:16 +00:00
Dmitry Vyukov ea2f3bffca tsan: refactor atexit handling
The current handling (manual execution of atexit callbacks)
is overly complex and leads to constant problems due to mutual ordering of callbacks.
Instead simply wrap callbacks into our wrapper to establish
the necessary synchronization.
Fixes issue https://code.google.com/p/thread-sanitizer/issues/detail?id=80

llvm-svn: 219675
2014-10-14 09:32:45 +00:00
Eric Christopher 7c558cf4d6 Grab the subtarget info off of the MachineFunction rather than
indirecting through the TargetMachine.

llvm-svn: 219674
2014-10-14 08:44:19 +00:00
Eric Christopher da84e33791 Use the triple to figure out if this is a darwin target, not
the subtarget.

llvm-svn: 219673
2014-10-14 08:25:26 +00:00
Eric Christopher 307c2cb26f Remove unnecessary TargetMachine.h includes.
llvm-svn: 219672
2014-10-14 07:22:08 +00:00
Eric Christopher 6062180203 Grab the subtarget and subtarget dependent variables off of
MachineFunction rather than TargetMachine.

llvm-svn: 219671
2014-10-14 07:22:00 +00:00
Eric Christopher b66367a891 Grab the subtarget and subtarget dependent variables off of
MachineFunction rather than TargetMachine.

llvm-svn: 219670
2014-10-14 07:17:23 +00:00
Eric Christopher 92b4bcbbee Instead of the TargetMachine cache the MachineFunction
and TargetRegisterInfo in the peephole optimizer. This
makes it easier to grab subtarget dependent variables off
of the MachineFunction rather than the TargetMachine.

llvm-svn: 219669
2014-10-14 07:17:20 +00:00
Eric Christopher eb9e87f6e3 Access subtarget specific variables off of the MachineFunction's
cached subtarget and not the TargetMachine.

llvm-svn: 219668
2014-10-14 07:00:33 +00:00
Eric Christopher 2d0757d106 Add lld to the parallel set of directories since it doesn't depend
on any of the other tools directories.

llvm-svn: 219667
2014-10-14 06:56:28 +00:00
Eric Christopher 99556d77ef Access the subtarget off of the MachineFunction via the DAG
scheduler or via the SelectionDAG if available. Otherwise
grab the subtarget off of the MachineFunction by going up
the parent chain.

llvm-svn: 219666
2014-10-14 06:56:25 +00:00
Hao Liu 3cb826ca10 [AArch64]Select wide immediate offset into [Base+XReg] addressing mode
e.g Currently we'll generate following instructions if the immediate is too wide:
    MOV  X0, WideImmediate
    ADD  X1, BaseReg, X0
    LDR  X2, [X1, 0]

    Using [Base+XReg] addressing mode can save one ADD as following:
    MOV  X0, WideImmediate
    LDR  X2, [BaseReg, X0]

    Differential Revision: http://reviews.llvm.org/D5477

llvm-svn: 219665
2014-10-14 06:50:36 +00:00
Justin Bogner f884723799 Re-apply "Frontend: Extract SerializedDiagnosticReader out of CXLoadedDiagnostic (NFC)"
I'd mispelled "Bitcode/BitCodes.h" before, and tested on a case
insensitive filesystem.

This reverts commit r219649, effectively re-applying r219647 and
r219648.

llvm-svn: 219664
2014-10-14 06:30:31 +00:00
Eric Christopher b65c7b919c Remove the use and member variable of the TargetMachine from
MachineLICM as we can get the same data off of the MachineFunction.

llvm-svn: 219663
2014-10-14 06:26:57 +00:00
Eric Christopher 20c98938bb Have MachineInstrBundle use the MachineFunction for subtarget
access rather than the TargetMachine.

llvm-svn: 219662
2014-10-14 06:26:55 +00:00
Eric Christopher d3fa440d08 Access the subtarget off of the MachineFunction rather than
through the TargetMachine.

llvm-svn: 219661
2014-10-14 06:26:53 +00:00
Eric Christopher 1b9eb1a13a Use PARALLEL_DIRS instead of DIRS in the Makefile
based build since the subdirectories all appear to
have no inter-directory dependencies. This speeds
up parallel makefile builds greatly.

llvm-svn: 219660
2014-10-14 06:26:33 +00:00
Richard Smith 99891da71a Extend -Rmodule-build to also remark when module building finishes.
In cases of nested module builds, or when you care how long module builds take,
this information was not previously easily available / obvious.

llvm-svn: 219658
2014-10-14 02:08:30 +00:00
Richard Smith 32952e1e42 [modules] Merging for class-scope using-declarations.
llvm-svn: 219657
2014-10-14 02:00:47 +00:00
Marcello Maggioni 5bbe3df63f Switch to select optimization for two-case switches
This is the same optimization of r219233 with modifications to support PHIs with multiple incoming edges from the same block
and a test to check that this condition is handled.

llvm-svn: 219656
2014-10-14 01:58:26 +00:00
Nick Kledzik 4121bce3f6 [mach-o] Add Pass to create are shim Atoms for ARM interworking.
Arm code has two instruction encodings "thumb" and "arm".  When branching from
one code encoding to another, you need to use an instruction that switches
the instruction mode.  Usually the transition only happens at call sites, and
the linker can transform a BL instruction in BLX (or vice versa).  But if the
compiler did a tail call optimization and a function ends with a branch (not
branch and link), there is no pc-rel BX instruction.

The ShimPass looks for pc-rel B instructions that will need to switch mode.
For those cases it synthesizes a shim which does the transition, then modifies
the original atom with the B instruction to target to the shim atom.

llvm-svn: 219655
2014-10-14 01:51:42 +00:00
Jim Ingham ffc9f1de34 This adds a "batch mode" to lldb kinda like the gdb batch mode. It will quit the debugger
after all the commands have been executed except if one of the commands was an execution control
command that stopped because of a signal or exception.

Also adds a variant of SBCommandInterpreter::HandleCommand that takes an SBExecutionContext.  That
way you can run an lldb command targeted at a particular target, thread or process w/o having to 
select same before running the command.

Also exposes CommandInterpreter::HandleCommandsFromFile to the SBCommandInterpreter API, since that
seemed generally useful.

llvm-svn: 219654
2014-10-14 01:20:07 +00:00
Eric Christopher 07e9ad3c12 Don't include DFAPacketizer in TargetInstrInfo, there's no reason.
llvm-svn: 219653
2014-10-14 01:13:53 +00:00