Commit Graph

22 Commits

Author SHA1 Message Date
Will Dietz 5357df6290 MC: Don't assume incoming StringRef's are null terminated.
This can happen when processing command line arguments, which
are often stored as std::string's and later turned into
StringRef's via std::string::data().  Unfortunately this
is not guaranteed to return a null-terminated string
until C++11, causing breakage on platforms that don't do this.

llvm-svn: 192558
2013-10-13 22:09:26 +00:00
Craig Topper a8442344ed Fix X86 subtarget to not overwrite the autodetected features by calling InitMCProcessorInfo right after detecting them. Instead add a new function that only updates the scheduling model and call that.
llvm-svn: 190919
2013-09-18 05:54:09 +00:00
Chandler Carruth ed0881b2a6 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131
2012-12-03 16:50:05 +00:00
Craig Topper 0e6c5b68b6 Fix doxygen comment to match function name.
llvm-svn: 165094
2012-10-03 06:47:18 +00:00
Andrew Trick ba7b921fcb Replaced ReInitMCSubtargetInfo with InitMCProcessor.
Now where we used to call ReInitMCSubtargetInfo, we actually recompute
the same information as InitMCSubtargetInfo instead of only setting
the feature bits.

llvm-svn: 164105
2012-09-18 05:33:15 +00:00
Andrew Trick 6e6d597b1c TargetSchedModel API. Implement latency lookup, disabled.
llvm-svn: 164098
2012-09-18 04:03:34 +00:00
Andrew Trick ab722bdd50 TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.
llvm-svn: 164092
2012-09-18 03:18:56 +00:00
Andrew Trick 8e7f202e32 Revert r164061-r164067. Most of the new subtarget emitter.
I have to work out the Target/CodeGen header dependencies
before putting this back.

llvm-svn: 164072
2012-09-17 23:00:42 +00:00
Andrew Trick 692b87c18f InitMCProcessor
llvm-svn: 164066
2012-09-17 22:19:12 +00:00
Andrew Trick f403ee7937 TargetSchedModel API. Implement latency lookup, disabled.
llvm-svn: 164065
2012-09-17 22:19:08 +00:00
Andrew Trick 0923f8183b TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.
llvm-svn: 164061
2012-09-17 22:18:55 +00:00
Andrew Trick d2a19da1b8 TargetSchedModel interface. To be implemented...
llvm-svn: 163934
2012-09-14 20:26:46 +00:00
Andrew Trick ac36af470c Define MC data tables for the new scheduling machine model.
llvm-svn: 163933
2012-09-14 20:26:41 +00:00
Roman Divacky 77198de4d6 Constify subtarget info properly so that we dont cast away the const in
the SubtargetInfoKV tables. Found by gcc48 -Wcast-qual.

llvm-svn: 163251
2012-09-05 21:43:57 +00:00
Andrew Trick 87255e340e I'm introducing a new machine model to simultaneously allow simple
subtarget CPU descriptions and support new features of
MachineScheduler.

MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.

These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.

This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.

llvm-svn: 159891
2012-07-07 04:00:00 +00:00
Andrew Trick 030e2f8f1a Tweak spelling.
llvm-svn: 159889
2012-07-07 03:59:48 +00:00
Andrew Trick 73d7736b17 misched: Added MultiIssueItineraries.
This allows a subtarget to explicitly specify the issue width and
other properties without providing pipeline stage details for every
instruction.

llvm-svn: 157979
2012-06-05 03:44:40 +00:00
Evan Cheng c5e6d2f519 - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
  detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
  MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
  MCSubtargetInfo so MC code emitter can do the right thing.

llvm-svn: 134884
2011-07-11 03:57:24 +00:00
Evan Cheng 91111d2706 Change createAsmParser to take a MCSubtargetInfo instead of triple,
CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.

llvm-svn: 134795
2011-07-09 05:47:46 +00:00
Evan Cheng 1a72add615 Compute feature bits at time of MCSubtargetInfo initialization.
llvm-svn: 134606
2011-07-07 07:07:08 +00:00
Evan Cheng fb71f4260a Add getFeatureBits to extract feature bits for a given CPU.
llvm-svn: 134298
2011-07-02 00:43:44 +00:00
Evan Cheng 54b68e3432 - Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.

llvm-svn: 134257
2011-07-01 20:45:01 +00:00