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16744 Commits

Author SHA1 Message Date
Chris Lattner c9f3bbb5d2 Initial support for FP registers 
llvm-svn: 5149
 2002-12-25 05:08:03 +00:00
Chris Lattner dafa31658f New simpler spill interface 
llvm-svn: 5148
 2002-12-25 05:07:09 +00:00
Chris Lattner 4997a840bc Adjustments to match new simpler spill interface 
llvm-svn: 5147
 2002-12-25 05:06:43 +00:00
Chris Lattner 55aaff5590 Free machine code 
llvm-svn: 5146
 2002-12-25 05:06:21 +00:00
Chris Lattner a32b4055be Changes to allow for a configurable target machine that allows big endian and/or long pointer operation 
llvm-svn: 5131
 2002-12-24 00:04:01 +00:00
Chris Lattner cfcd0603d0 Changes to compile with GCC 2.96 
Changes to support configurable pointer size and endianness

llvm-svn: 5130
 2002-12-24 00:03:11 +00:00
Chris Lattner d8201972bf Fix compilation on gcc 2.96 
llvm-svn: 5116
 2002-12-23 23:46:55 +00:00
Chris Lattner 871abd8187 Add definition for the bswap instruction 
*** FIX: the encoding of the SUB instruction

llvm-svn: 5115
 2002-12-23 23:46:31 +00:00
Chris Lattner e218f7924c Add support for the bswap instruction 
llvm-svn: 5114
 2002-12-23 23:46:00 +00:00
Chris Lattner 6e7c821dc0 Fix warning 
llvm-svn: 5109
 2002-12-20 04:13:28 +00:00
Chris Lattner 5526b21e93 CBW doesn't modify AL 
llvm-svn: 5108
 2002-12-20 04:13:11 +00:00
Chris Lattner 67e555d1ec fix warning 
llvm-svn: 5107
 2002-12-20 04:12:48 +00:00
Chris Lattner b437b7de1a Don't force setCC instructions into AL 
llvm-svn: 5104
 2002-12-18 01:44:31 +00:00
Chris Lattner b54343a64f Add comments, switch uses/defs to match InstrInfo.def file 
llvm-svn: 5102
 2002-12-18 01:05:54 +00:00
Chris Lattner fc9af85395 Add reg clobber list for direct calls 
Represent empty use/def list as a null pointer

llvm-svn: 5101
 2002-12-18 01:05:31 +00:00
Chris Lattner 4cb8af96b3 Update to use new interface for register info 
llvm-svn: 5098
 2002-12-17 04:19:17 +00:00
Chris Lattner eaf58b03b2 Round number of bytes allocated on the stack up to a multiple of 4 so that the 
stack remains aligned

llvm-svn: 5095
 2002-12-17 03:15:26 +00:00
Chris Lattner d9c6f2a6d3 Local register allocator is now stable enough for use, it passes all tests 
llvm-svn: 5094
 2002-12-17 02:51:15 +00:00
Chris Lattner 5afbc4c387 Register allocator is responsible for spilling callee saved regs 
llvm-svn: 5092
 2002-12-17 02:48:57 +00:00
Chris Lattner 2e6f17f136 Build add instructions of the correct form! 
llvm-svn: 5090
 2002-12-16 23:36:57 +00:00
Chris Lattner e92fb346d3 Two fixes: 
* Only load incoming arguments into virtual registers once at the
    beginning of the function
  * Assign different virtual registers to each reference to constants/globals

llvm-svn: 5088
 2002-12-16 22:54:46 +00:00
Chris Lattner c87fcde854 Fix prolog/epilog in the presence of alloca 
llvm-svn: 5087
 2002-12-16 22:29:30 +00:00
Chris Lattner e92f1bb011 Make sure stack manipulation refers to ESP the right number of times 
llvm-svn: 5086
 2002-12-16 22:29:06 +00:00
Chris Lattner 5c59014a1b Add some special cases to make common getelementptr cases easier to read/faster 
llvm-svn: 5084
 2002-12-16 19:32:50 +00:00
Chris Lattner 6b5ca53493 Finish implementation of alias list impl 
llvm-svn: 5083
 2002-12-16 19:31:48 +00:00
Chris Lattner e0c25aaf99 Add mechanism to select register allocator to use 
llvm-svn: 5079
 2002-12-16 16:15:51 +00:00
Chris Lattner d44d25323d Try #2 to get alias set stuff to work 
llvm-svn: 5077
 2002-12-16 16:14:51 +00:00
Chris Lattner 9b83781030 Add comments 
llvm-svn: 5076
 2002-12-16 15:57:44 +00:00
Chris Lattner 36d6f4a303 Add info about register aliases, add prototype for createLocalRegisterAllocator 
llvm-svn: 5075
 2002-12-16 15:55:51 +00:00
Chris Lattner 4cf76c23e8 Add info about register file aliasing 
llvm-svn: 5074
 2002-12-16 15:55:25 +00:00
Chris Lattner 855b784523 Add information about register file aliasing 
llvm-svn: 5073
 2002-12-16 15:54:59 +00:00
Chris Lattner e5bbc24516 Add call clobber info 
llvm-svn: 5072
 2002-12-16 15:54:42 +00:00
Chris Lattner 0b9f0b5faf Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator 
llvm-svn: 5071
 2002-12-16 14:38:13 +00:00
Brian Gaeke 6ebe959530 brg 
Fix some bugs in use of MBB vs. BB and iterators that are invalidated before
we use them.

Reference targetClass by enum name, not by number.

llvm-svn: 5069
 2002-12-16 04:23:29 +00:00
Chris Lattner 3c1b59ca59 Correct the setting of Def flags on registers that are modified! 
llvm-svn: 5065
 2002-12-15 22:38:47 +00:00
Chris Lattner d06650ade1 Give passes nice names! 
llvm-svn: 5059
 2002-12-15 21:13:40 +00:00
Chris Lattner e2533336f5 Simplify interfaces used by regalloc to insert code 
llvm-svn: 5052
 2002-12-15 20:06:35 +00:00
Chris Lattner 094fd5e758 Changes to make new TargetRegisterClass interface. 
llvm-svn: 5050
 2002-12-15 19:29:34 +00:00
Chris Lattner 0d1447d64a * Simplify TargetRegisterClass implementations 
* Change regclass iterators to use an extra level of pointers

llvm-svn: 5047
 2002-12-15 18:40:36 +00:00
Chris Lattner 3263e5787f Add support to cast from a bool type 
Add support for boolean constants
add getClassB method

llvm-svn: 5034
 2002-12-15 08:02:15 +00:00
Chris Lattner ce35108606 Use MachineOperand::isFoo methods instead of our own global functions 
llvm-svn: 5033
 2002-12-15 08:01:39 +00:00
Chris Lattner c4eb1ed23c Implement indirect function calls 
llvm-svn: 5024
 2002-12-13 14:13:27 +00:00
Misha Brukman ca8eb8af18 Make function code generation printing debug-only. 
llvm-svn: 5023
 2002-12-13 13:16:14 +00:00
Chris Lattner a1cf9a7c0a Fix bork in doMultiply 
llvm-svn: 5021
 2002-12-13 13:07:42 +00:00
Chris Lattner f1874b0677 Add sanity checks 
llvm-svn: 5020
 2002-12-13 13:04:04 +00:00
Misha Brukman 3374ec7c1b Cleaned up the code: factored out switch/case into a separate function, put 
constants in an array for quick lookup. Stole the idea from elsewhere in
Jello.

llvm-svn: 5017
 2002-12-13 12:00:06 +00:00
Chris Lattner d4c5013c04 Insert phi code at top of block 
llvm-svn: 5015
 2002-12-13 11:52:34 +00:00
Brian Gaeke 61edd534b4 lib/Target/X86/InstSelectSimple.cpp: 
The MachineBasicBlock variable name patrol hereby fines Chris Lattner
one bag of nachos, for shadowing global names while his license to do so
was under suspension.

llvm-svn: 5014
 2002-12-13 11:39:18 +00:00
Chris Lattner 0a37046358 Implement cast bool to X 
llvm-svn: 5012
 2002-12-13 11:31:59 +00:00
Brian Gaeke 85b78b7372 Rename all BMI MachineBasicBlock operands to MBB. 
Try to mess around with emitGEPOperation's elementSizeReg to make it work,
again.

llvm-svn: 5011
 2002-12-13 11:22:48 +00:00
Chris Lattner 825be9ad5d Finish up iterator stuph 
llvm-svn: 5009
 2002-12-13 10:50:40 +00:00
Misha Brukman 121ae7d3a7 Treat longs as ints => pretend they're all 32-bit values and squeeze them into 
32-bit registers.

llvm-svn: 5008
 2002-12-13 10:43:09 +00:00
Chris Lattner e189edf272 Code gen phi's correctly 
llvm-svn: 5004
 2002-12-13 10:09:43 +00:00
Chris Lattner 2889d2e50c Print X86 PHI nodes in a sane manner 
llvm-svn: 5003
 2002-12-13 09:59:26 +00:00
Misha Brukman 78401cbb3c Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to 
PHI nodes.

llvm-svn: 5001
 2002-12-13 09:54:12 +00:00
Brian Gaeke eaeacc5872 lib/Target/X86/InstSelectSimple.cpp: Start counting arguments with 2, 
because arguments start two stack slots off of EBP. Break out of the
 for loop once the argument is found. Increment the counter at the end
 of the loop instead of the beginning. Use addRegOffset and compute
 the scale * index part at compile time instead of using the fancy
 load instruction. Just because an instruction set has wacky addressing
 modes doesn't mean we ought to use them (at least, if you believe Dave
 Patterson).

lib/Target/X86/X86InstrBuilder.h: Add some comments.

test/Regression/Jello/test-loadstore.ll:  Let main return int 0.

llvm-svn: 4999
 2002-12-13 09:28:50 +00:00
Brian Gaeke 44876fdee4 InstSelectSimple.cpp: Give promote32 a comment. Add initial 
implementation of getReg() for arguments.

MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
 displacement (whew!) due to Chris.

Printer.cpp: Fix printing out index and scale in memory references.

llvm-svn: 4998
 2002-12-13 07:56:18 +00:00
Chris Lattner 179519bf77 Implement getelementptr constant exprs 
Implement ConstantPointerRefs
Treat long/ulongs as if they were integers.  A hack, but an effective one

llvm-svn: 4995
 2002-12-13 06:56:29 +00:00
Brian Gaeke 4e2c30d894 brg 
InstSelectSimple.cpp: Add stub implementation of visitFreeInst.
 Add comments that mention how we are failing to implement malloc/free.
 Add initial implementation of visitAllocaInst.

X86TargetMachine.cpp: Include llvm/Transforms/Scalar.h.
 Add LowerAllocations pass before instruction selection.

jello/Makefile: Add scalaropts.a.

llvm-svn: 4994
 2002-12-13 06:46:31 +00:00
Chris Lattner e791322602 Emit the right form of mod/rm mod field 
llvm-svn: 4986
 2002-12-13 05:05:05 +00:00
Chris Lattner e600a4ebe8 Nicify a bit 
llvm-svn: 4985
 2002-12-13 05:04:37 +00:00
Chris Lattner 82f1580ee8 Fix encoding of CBW instruction 
llvm-svn: 4983
 2002-12-13 04:41:31 +00:00
Misha Brukman 862f3ef8bc Moves now select correct opcode based on the data size. 
llvm-svn: 4981
 2002-12-13 04:24:53 +00:00
Chris Lattner 1176170c16 Remove extranous #include 
llvm-svn: 4980
 2002-12-13 04:12:24 +00:00
Chris Lattner ec0bc92146 Rename MemArg* to Arg* 
llvm-svn: 4979
 2002-12-13 03:51:55 +00:00
Chris Lattner 343e4b1810 Make mem size an assert 
Add mem size flags to all instructions using an imm

llvm-svn: 4978
 2002-12-13 03:50:13 +00:00
Misha Brukman 2ef75daf78 This is supposed to provide correct size for datatypes. Supposedly. 
llvm-svn: 4977
 2002-12-13 02:13:15 +00:00
Misha Brukman 7b21678aed Added the flag to mark instructions which are really 2-address instructions in 
X86, but would be 3-address in any normail architecture.

llvm-svn: 4974
 2002-12-12 23:19:11 +00:00
Brian Gaeke 5e91d38ecb This checkin is brought to you by the brian gaeke allnighter fund. 
(lib/Target/X86) InstSelectSimple.cpp:
 Include llvm/DerivedTypes.h and iostream.
 Refactor visitMul out into a wrapper around doMultiply(), so that we
  can do multiplications on temporary values when we are doing
  getelementptrs.
 Refactor part of getReg out into makeAnotherReg, so that we can create
  registers willy-nilly to hold temporary values, when we are doing
  getelementptrs.
 Add stub implementations of visitMallocInst and visitAllocaInst.
 Add initial implementation of visitGetElementPtrInst.
 In copyConstantToRegister:
  We throw a *lot* of our asserts here. So, when we want to throw an
   assert, print out to stderr whatever expr or whatever constant made
   us barf.
  Support copying ConstantPointerNull to register, using a move immediate
   of zero.
 Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
  of the numbers in the other instruction names. All uses modified.
 Teach visitCallInst to extract byte- and short-class return values
  from subregs of EAX.  Add a FIXME note about how we would do it for
  float-class return values.
 Add a FIXME note about how we would cast float to int and back.

X86InstrInfo.def:
 Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
  of the numbers in the other instruction names. All uses modified.

(tools/jello) GlobalVars.cpp:
 Include iostream.
 If we have to emit a floating-point constant to memory, gamble and use
  the same method as for ints.
 If we have to emit a ConstantPointerNull to memory, try using a "void *"
  and "NULL".
 Otherwise, if we are going to throw an assert, print out whatever constant
  made us barf, first.

llvm-svn: 4973
 2002-12-12 15:33:40 +00:00
Brian Gaeke 9cf5718665 Implement a lot of cast functionality (no FP or 64) 
llvm-svn: 4944
 2002-12-06 10:49:33 +00:00
Brian Gaeke a4a10fe88b Target/X86/Printer.cpp: Add sizePtr function, and use it instead of 
" <SIZE> PTR " string when emitting assembly.

Target/X86/X86InstrInfo.def: Tidy up a bit:
 Squashed everything down to 118 chars wide, wrapping lines so that
 comment is at the same point on each line. Rename "NoImpRegs" as
 "NoIR". (most instructions have NoImpRegs twice on a line, so this
 saves 10 columns).

 Also, annotate various instructions with flags for size of memory operand.
  (MemArg16, MemArg32, MemArg64, etc.)

Target/X86/X86InstrInfo.h: Define flags for size of memory operand.
 (MemArg16, MemArg32, MemArg64, etc.)

llvm-svn: 4932
 2002-12-05 08:30:40 +00:00
Misha Brukman 83e62f14dd Implemented functions for emitting prologues and epilogues; 
removed EBP from the list of callee-saved registers (it isn't one).

llvm-svn: 4929
 2002-12-04 23:57:03 +00:00
Misha Brukman ab2ffedb38 Added push and pop instructions. 
llvm-svn: 4928
 2002-12-04 23:56:26 +00:00
Chris Lattner e21336000b Fix handling of function calls that return void 
llvm-svn: 4925
 2002-12-04 23:50:28 +00:00
Chris Lattner 4859c65d48 Implement initial support for return values from call instructions 
llvm-svn: 4924
 2002-12-04 23:45:28 +00:00
Misha Brukman 81c7a3a84c Adjust the stack pointer after a function call, proportional to the number of 
arguments pushed onto the stack.

llvm-svn: 4922
 2002-12-04 19:22:53 +00:00
Misha Brukman dfa9cfa67f Added instructions to add/subtract imm32 to/from a reg32. 
llvm-svn: 4921
 2002-12-04 19:15:22 +00:00
Chris Lattner fb8032dc84 Fix bogus assertion failures 
llvm-svn: 4919
 2002-12-04 17:32:52 +00:00
Chris Lattner 8d79e5c9d9 Avoid bad assertion 
llvm-svn: 4918
 2002-12-04 17:28:40 +00:00
Chris Lattner 82cc643401 Remove think-o assertion 
llvm-svn: 4917
 2002-12-04 17:18:30 +00:00
Chris Lattner ccf17c6564 Avoid crashing on Arguments, just silently miscompile 
llvm-svn: 4916
 2002-12-04 17:15:34 +00:00
Misha Brukman 1af9bebcda storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value 
instead of by reference, since they return the modified iterator.

llvm-svn: 4914
 2002-12-04 17:14:13 +00:00
Misha Brukman 0d28502c32 Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since 
it is target-independent.

llvm-svn: 4911
 2002-12-04 16:47:04 +00:00
Chris Lattner 7b1ec5ed3a Add a "Lazy Function Resolution in Jello" section 
Remove some todo's

llvm-svn: 4910
 2002-12-04 16:12:54 +00:00
Chris Lattner bc98081090 Fix a bug I introduced in a previous change 
llvm-svn: 4909
 2002-12-04 06:56:56 +00:00
Chris Lattner 6425a502a6 Add support for referencing global variables/functions 
llvm-svn: 4907
 2002-12-04 06:45:19 +00:00
Misha Brukman d9522256d3 Added support for callee- and caller-save registers. 
llvm-svn: 4897
 2002-12-03 23:11:21 +00:00
Chris Lattner 64261741c7 Fix broken ret opcode, grr... 
llvm-svn: 4895
 2002-12-03 22:50:02 +00:00
Chris Lattner 645b7548bf Fix instsel for calls 
llvm-svn: 4891
 2002-12-03 20:30:12 +00:00
Chris Lattner 6a0874071b Fix the build 
llvm-svn: 4884
 2002-12-03 18:15:59 +00:00
Brian Gaeke b676857358 brg 
Add support for cast ... to bool in visitCastInst (it's a start, anyways...)

llvm-svn: 4883
 2002-12-03 07:36:03 +00:00
Chris Lattner 8052f8006b Split the machine code emitter completely out of the printer 
llvm-svn: 4882
 2002-12-03 06:34:06 +00:00
Chris Lattner 0d80874f6c * Move information about Implicit Defs/Uses into X86InstrInfo.def. 
* Expose information about implicit defs/uses of register through the
  MachineInstrInfo.h file.

llvm-svn: 4877
 2002-12-03 05:42:53 +00:00
Brian Gaeke 5485c079d1 brg 
X86Implicit.cpp, X86Implicit.h: New files.
InstSelectSimple.cpp: Add some clarifications in visitCallInst comments.

llvm-svn: 4874
 2002-12-03 00:51:09 +00:00
Chris Lattner 15fbd61664 More support for machine code emission: raw instructions 
llvm-svn: 4872
 2002-12-02 21:56:18 +00:00
Chris Lattner 1207ccdbc1 Expose explicit type 
llvm-svn: 4871
 2002-12-02 21:50:41 +00:00
Chris Lattner db31bbad6b Start implementing MachineCodeEmitter 
llvm-svn: 4870
 2002-12-02 21:44:34 +00:00
Chris Lattner 58743b9f78 Eliminate OtherFrm 
llvm-svn: 4868
 2002-12-02 21:40:58 +00:00
Chris Lattner d5823603fa Remove comment 
Remove handling of OtherFrm

llvm-svn: 4867
 2002-12-02 21:40:46 +00:00
Chris Lattner 787a9de685 Initial support for machine code emission 
llvm-svn: 4866
 2002-12-02 21:24:12 +00:00
Misha Brukman aa15563510 Fix order of operands on a store from reg to [reg+offset]. 
llvm-svn: 4857
 2002-12-02 21:10:35 +00:00
Chris Lattner 08cd1edaa9 Add rawfrm flags 
llvm-svn: 4841
 2002-12-01 23:25:59 +00:00
Chris Lattner 7dcb1436da Don't add implicit regs 
llvm-svn: 4840
 2002-12-01 23:24:58 +00:00
Brian Gaeke 2ad3501d3f brg 
InstSelectSimple.cpp: Refactor out conversion of byte, short -> int
  from visitReturnInst() to new method, promote32().
 Use it in both visitReturnInst() and visitCallInst().

llvm-svn: 4839
 2002-11-30 11:57:28 +00:00
Brian Gaeke 23953e0f8a brg 
InstSelectSimple.cpp: First draft of visitCallInst method, handling
 int/float args.
X86InstrInfo.def: Add entries for CALL with 32-bit pc relative arg, and
 PUSH with 32-bit reg arg.

llvm-svn: 4838
 2002-11-29 12:01:58 +00:00
Brian Gaeke 4ba2cb110a brg 
InstSelectSimple.cpp: Add some comments that say what I'm going to do for
 calls and casts.

llvm-svn: 4832
 2002-11-26 10:43:30 +00:00
Misha Brukman 5014e38273 Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out 
instructions correctly.

llvm-svn: 4830
 2002-11-22 23:15:27 +00:00
Misha Brukman 55cf6bfae4 Enable the register allocator pass. 
llvm-svn: 4829
 2002-11-22 22:45:07 +00:00
Misha Brukman bde217d7a9 Added methods to read/write values to stack in .h, fixed implementation in 
.cpp to return the iterator correctly.

llvm-svn: 4827
 2002-11-22 22:43:47 +00:00
Misha Brukman 1a72c637fb Added -*- C++ -*- mode to the comments. 
llvm-svn: 4826
 2002-11-22 22:42:50 +00:00
Misha Brukman 4ea94a4be0 Add a simple way to add memory locations of format [reg+offset] 
llvm-svn: 4825
 2002-11-22 22:42:12 +00:00
Brian Gaeke aa91eae6af lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst. 
llvm-svn: 4821
 2002-11-22 11:07:01 +00:00
Chris Lattner e5330c4adf Handle cmp Reg, 0 correctly 
llvm-svn: 4819
 2002-11-21 23:30:00 +00:00
Chris Lattner f435afc268 Printing support for more stuff 
llvm-svn: 4818
 2002-11-21 22:49:46 +00:00
Chris Lattner 174a94007d Don't add implicit operands 
llvm-svn: 4817
 2002-11-21 22:49:20 +00:00
Chris Lattner b35341ee25 Fix off by one bug 
llvm-svn: 4816
 2002-11-21 22:48:15 +00:00
Chris Lattner af7bd2c6b5 Add fixme 
llvm-svn: 4815
 2002-11-21 22:48:01 +00:00
Chris Lattner 1c80d37765 Minor code cleanups 
llvm-svn: 4814
 2002-11-21 21:04:50 +00:00
Chris Lattner 4fbd8a2f78 Implement printing of store instructions 
llvm-svn: 4813
 2002-11-21 21:03:39 +00:00
Chris Lattner 61fafd35f5 The big change here is to handle printing/emission of X86II::MRMSrcMem 
instructions.  Right now the only users are load instructions, and Misha's
spill code

llvm-svn: 4812
 2002-11-21 20:44:15 +00:00
Chris Lattner cf7c225e06 Remove implicit information from instruction selector 
llvm-svn: 4811
 2002-11-21 18:54:29 +00:00
Chris Lattner e8885d949a Add printing information for MUL and DIV 
llvm-svn: 4810
 2002-11-21 18:54:14 +00:00
Chris Lattner 5e50475adb Fix a bug that prevented compilation of multiple functions 
llvm-svn: 4809
 2002-11-21 17:26:58 +00:00
Chris Lattner 7939ecc8eb Remove opcode information for instructions that are completely defined now 
llvm-svn: 4805
 2002-11-21 17:12:55 +00:00
Chris Lattner 1f9530508b Add printing support for sahf & setcc 
llvm-svn: 4804
 2002-11-21 17:10:57 +00:00
Chris Lattner c868841ad6 Add printing support for /0 /1 type instructions 
llvm-svn: 4803
 2002-11-21 17:09:01 +00:00
Chris Lattner a6eb52fcf7 Add support for /0 /1, etc type instructions 
llvm-svn: 4802
 2002-11-21 17:08:49 +00:00
Chris Lattner 41e2d4cdcf Rename the SetCC X86 instructions to reflect the fact that they are the 
register versions

llvm-svn: 4800
 2002-11-21 16:19:42 +00:00
Chris Lattner 45ddd59da5 Simplify setcc code a bit 
llvm-svn: 4799
 2002-11-21 15:52:38 +00:00
Chris Lattner 177e928a46 Support Registers of the form (B8+ rd) for example 
llvm-svn: 4798
 2002-11-21 02:00:20 +00:00
Chris Lattner 3a3ac9d225 Dont' set flags 
llvm-svn: 4797
 2002-11-21 01:59:50 +00:00
Chris Lattner 6985c19b61 Implement printing more, implement opcode output more 
llvm-svn: 4796
 2002-11-21 01:33:44 +00:00
Chris Lattner dfbfd81217 Huge diff do to reindeinting comments. 
Basically just adds OpSize flags for instructions that need them.

llvm-svn: 4795
 2002-11-21 01:33:28 +00:00
Chris Lattner c48d0fa9a2 Add new prefix flag 
llvm-svn: 4794
 2002-11-21 01:32:55 +00:00
Chris Lattner f03132f014 Print another class of instructions correctly, giving us: xorl EDX, EDX 
for example.

llvm-svn: 4793
 2002-11-21 00:30:01 +00:00
Misha Brukman 95e6287734 Booleans are types too. And they get stored in bytes. And InstructionSelection 
doesn't assert fail. And everyone's happy. Yay!

llvm-svn: 4792
 2002-11-21 00:25:56 +00:00
Misha Brukman 53d2de923a Add definitions for function headers from MRegisterInfo.h: 
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.

llvm-svn: 4784
 2002-11-20 18:59:43 +00:00
Misha Brukman 6e5d493e0f Check not only for MO_VirtualRegister, but MO_MachineRegister as well when 
printing out assembly. After all, we want the real thing too.

llvm-svn: 4783
 2002-11-20 18:56:41 +00:00
Misha Brukman eaaceb1210 Add mapping in MachineFunction from SSA regs to Register Classes. Also, 
uncovered a bug where registers were not being put in a map if they were not
found...

llvm-svn: 4776
 2002-11-20 00:58:23 +00:00
Misha Brukman ade1143692 Sigh. Fixed some speling. 
llvm-svn: 4775
 2002-11-20 00:56:42 +00:00
Misha Brukman 310afc5f8c Thanks to the R8, R16, and R32 macros, I can now deal with registers that 
belong to different register classes easier.

llvm-svn: 4773
 2002-11-20 00:47:40 +00:00
Brian Gaeke a648bc6674 Brian Gaeke says: 
lib/Target/X86/InstSelectSimple.cpp: Add a little something to
 visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8

llvm-svn: 4755
 2002-11-19 09:08:47 +00:00
Chris Lattner 5812f06b30 Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well. 
llvm-svn: 4743
 2002-11-18 06:56:51 +00:00
Chris Lattner cf72e52df3 Expose base opcode 
llvm-svn: 4742
 2002-11-18 06:56:24 +00:00
Chris Lattner 0018e8d5fc Start to add more information to instr.def 
llvm-svn: 4741
 2002-11-18 05:37:11 +00:00
Chris Lattner f2e00c62ab Add instruction annotation about whether it has a 0x0F opcode prefix 
llvm-svn: 4740
 2002-11-18 01:59:28 +00:00
Chris Lattner c6f7457e90 Add more void flags 
llvm-svn: 4739
 2002-11-18 01:37:48 +00:00
Chris Lattner dbdacac022 Set the void flag on instructions that should get it 
llvm-svn: 4738
 2002-11-18 01:34:36 +00:00
Chris Lattner 5fd53046b0 Arrange to have a TargetMachine available in X86InstrInfo::print 
llvm-svn: 4734
 2002-11-17 23:20:37 +00:00
Chris Lattner b79ccae887 Wow, I'm incapable of the simplest things today... 
llvm-svn: 4732
 2002-11-17 23:05:21 +00:00
Chris Lattner afce16dec8 Rename registers to follow the intel style of all caps 
llvm-svn: 4731
 2002-11-17 23:03:46 +00:00
Chris Lattner 9289d7d693 Reorganize printing interface a bit 
llvm-svn: 4728
 2002-11-17 22:53:13 +00:00
Chris Lattner 64c3bb99ed Fix minor detail 
llvm-svn: 4725
 2002-11-17 22:33:26 +00:00
Chris Lattner cb57e5ca17 Fix Mul/Div clobbers 
llvm-svn: 4718
 2002-11-17 21:56:38 +00:00
Chris Lattner ecdb49d74a Fix a few typos, implement load/store 
llvm-svn: 4716
 2002-11-17 21:11:55 +00:00
Chris Lattner c682b4a9ab Add functions to buld X86 specific constructs 
llvm-svn: 4714
 2002-11-17 21:03:35 +00:00
Chris Lattner 6fd0ef303d Add information about memory index representation 
llvm-svn: 4712
 2002-11-17 20:33:26 +00:00
Chris Lattner e86f98e06c Add load/store instructions 
llvm-svn: 4711
 2002-11-17 20:33:12 +00:00
Chris Lattner 09fddd97fb Switch visitRet to use getClass() 
llvm-svn: 4710
 2002-11-17 20:07:45 +00:00
Brian Gaeke e74543584a include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline 
convenience method.  Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
 Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
 Take out LEAVE instructions.
 32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
 Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
 Add some simple code to Printer::runOnFunction to iterate over
  MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
 implicit defs "Void".  Add more sign/zero extending "move" insns
 (movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.

llvm-svn: 4707
 2002-11-14 22:32:30 +00:00
Brian Gaeke b2687880e2 InstSelectSimple.cpp: (visitReturnInst) Add return instructions with return 
values.
X86InstrInfo.def: add LEAVE instruction.

llvm-svn: 4691
 2002-11-11 19:37:09 +00:00
Brian Gaeke 9cbe229704 Add instruction selection code and tests for setcc instructions 
llvm-svn: 4603
 2002-11-07 17:59:21 +00:00
Chris Lattner 781986c436 Implement signed and unsigned division and remainder 
llvm-svn: 4508
 2002-11-02 20:54:46 +00:00
Chris Lattner d12e1bc777 Implement multiply operator 
llvm-svn: 4506
 2002-11-02 20:28:58 +00:00
Chris Lattner e823fb32f4 * Implement subtract 
* Merge add code into logical code

llvm-svn: 4503
 2002-11-02 20:13:22 +00:00
Chris Lattner dd873d2179 shuffle code around a bit, implement and, or, xor 
llvm-svn: 4502
 2002-11-02 20:04:26 +00:00
Chris Lattner abe3280ad9 Add PHI node support, add comment for branch function 
llvm-svn: 4500
 2002-11-02 19:45:49 +00:00
Chris Lattner 16af2d5aa8 Implement unconditional branching support 
llvm-svn: 4498
 2002-11-02 19:27:56 +00:00
Chris Lattner cfb187f6bb * Fix nonconstant shift case 
* Turn table into 2d table

llvm-svn: 4496
 2002-11-02 01:41:55 +00:00
Chris Lattner ff3d28f403 Use a more table driven approach to handling types. Seems to simplify the 
code a bit

llvm-svn: 4493
 2002-11-02 01:15:18 +00:00
Chris Lattner 63f4e752cd Make switch statements denser, but only because of the follow-on patch 
llvm-svn: 4492
 2002-11-02 00:49:56 +00:00
Chris Lattner 122b73b7a6 * Remove dead variable 
* Shift amount is always guaranteed to be 8 bits

llvm-svn: 4491
 2002-11-02 00:44:25 +00:00
Brian Gaeke 6e2d676829 InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst. 
Add ISel::visitShiftInst() to instruction select shift instructions.
 Add a comment in visitAdd about how to do 64 bit adds.

X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.

llvm-svn: 4477
 2002-10-31 23:03:59 +00:00
Chris Lattner 6c34c0baf5 Add lots more info 
llvm-svn: 4450
 2002-10-30 06:04:46 +00:00
Chris Lattner c9e1efd0f8 Make sure to set the destination register correctly 
llvm-svn: 4444
 2002-10-30 01:49:01 +00:00
Chris Lattner 87b84a6913 Set the destination register field based on the target specific flags 
llvm-svn: 4442
 2002-10-30 01:15:31 +00:00
Chris Lattner 60c59d5b4e Add flag to specify when no value is produced by an instruction 
llvm-svn: 4441
 2002-10-30 01:09:34 +00:00
Chris Lattner 858a4a6595 Implement the new optional getRegisterInfo 
llvm-svn: 4437
 2002-10-30 00:56:18 +00:00
Chris Lattner d7a855668d Print machine code after instruction selection 
llvm-svn: 4434
 2002-10-30 00:47:49 +00:00
Chris Lattner e3ceb17d54 Make sure to pass the LLVM basic block in 
llvm-svn: 4433
 2002-10-30 00:47:40 +00:00
Chris Lattner 7ee171b717 Construct annotation, to make sure it's attached to function 
llvm-svn: 4429
 2002-10-29 23:40:58 +00:00
Chris Lattner 02a3d837c2 Convert backend to use passes, implement X86TargetMachine 
llvm-svn: 4421
 2002-10-29 22:37:54 +00:00
Chris Lattner 27d247978b Rename X86InstructionInfo to X86InstrInfo 
llvm-svn: 4413
 2002-10-29 21:05:24 +00:00
Chris Lattner f57420ee17 Minor renaming 
llvm-svn: 4410
 2002-10-29 20:48:56 +00:00
Chris Lattner 2990e9b6cd Switch to generating machineinstr's instead of MInstructions 
llvm-svn: 4396
 2002-10-29 17:43:55 +00:00
Chris Lattner 6c3f9c1b8f Be compatible with sparc backend 
llvm-svn: 4395
 2002-10-29 17:43:38 +00:00
Chris Lattner 16cbd41c21 Implement MachineInstrInfo interface 
llvm-svn: 4394
 2002-10-29 17:43:19 +00:00
Chris Lattner f4b122dbc5 Switch to different flag set 
llvm-svn: 4393
 2002-10-29 17:42:40 +00:00
Chris Lattner 1303f2f057 Initial stab at MachineInstr'ication 
llvm-svn: 4367
 2002-10-28 23:55:19 +00:00
Misha Brukman d5b45791a4 Fixed spelling and grammar. 
llvm-svn: 4353
 2002-10-28 20:01:52 +00:00
Chris Lattner 52c2d10a19 Remove dead fixme 
llvm-svn: 4300
 2002-10-27 21:23:43 +00:00
Chris Lattner 7d3e5dbf2b Instruction select constant arguments correctly 
llvm-svn: 4297
 2002-10-27 21:16:59 +00:00
Chris Lattner 407582dc5a Add instruction definitions for mov r, imm instructions 
llvm-svn: 4296
 2002-10-27 21:16:44 +00:00
Chris Lattner d92fb0058b Initial checkin of X86 backend. 
We can instruction select exactly one instruction 'ret void'.  Wow.

llvm-svn: 4284
 2002-10-25 22:55:53 +00:00