d44966f26d
continue pushing tblgen's support for nodes with multiple
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results forward. We can now handle an instruction that
produces one implicit def and one result instead of one or
the other when not at the root of the pattern.
llvm-svn: 99725
2010-03-27 19:15:02 +00:00
e7e9f06d3b
fix a bug in my recent patch that increased opcode size to 2 bytes:
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the index comments nested under OPC_SwitchOpcode were off by one.
This fixes the comments.
llvm-svn: 99722
2010-03-27 18:49:33 +00:00
dcc8cd96f2
Remove an unnecessary #include.
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llvm-svn: 99714
2010-03-27 16:33:36 +00:00
5c2182ef77
remove parallel support.
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llvm-svn: 99703
2010-03-27 02:53:27 +00:00
f8d7eda663
Teach TableGen to understand X.Y notation in the TSFlagsFields strings.
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Remove much horribleness from X86InstrFormats as a result. Similar
simplifications are probably possible for other targets.
llvm-svn: 99539
2010-03-25 18:52:01 +00:00
e810155805
lit: Add LitTestCase and lit.load_test_suite, for adapting lit based suites for
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use with Python's unittest.
llvm-svn: 99498
2010-03-25 07:10:01 +00:00
552dddc51c
Change tblgen to emit FOOISD opcode names as two
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bytes instead of one byte. This is important because
we're running up to too many opcodes to fit in a byte
and it is aggrevated by FIRST_TARGET_MEMORY_OPCODE
making the numbering sparse. This just bites the
bullet and bloats out the table. In practice, this
increases the size of the x86 isel table from 74.5K
to 76K. I think we'll cope :)
This fixes rdar://7791648
llvm-svn: 99494
2010-03-25 06:33:05 +00:00
0e45762250
Fix evil TableGen bug in template parameters with defaults.
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If a TableGen class has an initializer expression containing an X.Y subexpression,
AND X depends on template parameters,
AND those template parameters have defaults,
AND some parameters with defaults are beyond position 1,
THEN parts of the initializer expression are evaluated prematurely with the default values when the first explicit template parameter is substituted, before the remaining explicit template parameters have been substituted.
llvm-svn: 99492
2010-03-25 06:23:34 +00:00
6c2d178957
add plumbing for handling multiple result nodes
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in some more places.
llvm-svn: 99366
2010-03-24 00:41:19 +00:00
38c99662ff
implement SDTCisVTSmallerThanOp with EnforceSmallerThan
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instead of reimplementing it wrong and poorly.
llvm-svn: 99357
2010-03-24 00:06:46 +00:00
57ebf63da7
bring sanity to EnforceVectorEltType
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llvm-svn: 99354
2010-03-24 00:01:16 +00:00
6070ee2a58
Cleanup getImplicitType
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llvm-svn: 99353
2010-03-23 23:50:31 +00:00
b424faa09c
reject void in intrinsic type lists.
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llvm-svn: 99347
2010-03-23 23:46:27 +00:00
c941619a73
Use "DISABLE_EDIS" to disable building "edis" explicitly. Don't build it for
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Apple-style builds.
llvm-svn: 99336
2010-03-23 22:15:33 +00:00
2109cb461c
Change intrinsic result type for void to store it as an empty list
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instead of as a single element list with VoidTy. Now with a fix
for the verifier.
llvm-svn: 99206
2010-03-22 20:56:36 +00:00
544cfd76e7
When we don't pass --vg-leak to lit, pass --leak-check=no to valgrind.
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llvm-svn: 99112
2010-03-21 01:47:33 +00:00
d177edf361
Fix suggested parentheses warning.
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llvm-svn: 99111
2010-03-21 01:38:21 +00:00
2f87b54f1a
Add support for XFAILing valgrind runs with memory leak checking independently
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of runs without leak checking. We add -vg to the triple for non-checked runs,
or -vg_leak for checked runs. Also use this to XFAIL the TableGen tests, since
tablegen leaks like a sieve. This includes some valgrindArgs refactoring.
llvm-svn: 99103
2010-03-20 23:08:45 +00:00
3e2bb702db
Revert r99009 temporarily it seems to be breaking the bots.
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llvm-svn: 99011
2010-03-19 23:04:23 +00:00
933b2cf9a8
Change intrinsic result type for void to store it as an empty list
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instead of as a single element list with VoidTy.
llvm-svn: 99009
2010-03-19 22:40:56 +00:00
2db7abaa44
make getOperandNum a static function (since it's just used by
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ApplyTypeConstraint) and make it handle multiple result nodes.
llvm-svn: 99003
2010-03-19 21:56:21 +00:00
f144725ebc
major surgery on tblgen: generalize TreePatternNode
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to maintain a list of types (one for each result of
the node) instead of a single type. There are liberal
hacks added to emulate the old behavior in various
situations, but they can start disolving now.
llvm-svn: 98999
2010-03-19 21:37:09 +00:00
b7d3d99181
Test commit (removed extra blank line)
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llvm-svn: 98988
2010-03-19 21:12:29 +00:00
c069cc8eaa
FileCheck: Don't print "possibly intended match" line if it would match the
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"scanning from here" one.
llvm-svn: 98971
2010-03-19 18:07:43 +00:00
bc8eed000f
Set numThreads to 1 by default when Python is older than 2.5.2.
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Python 2.4 always hits this bug: http://bugs.python.org/issue1731717
when running check-lit on multi-core systems.
Setting numThreads to 1 makes it slower, but at least the results reported are
correct.
llvm-svn: 98969
2010-03-19 17:54:21 +00:00
6d765ebc0d
make FillWithPossibleTypes take a predicate to filter types so that
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we don't blow the smallvector as often. No functionality change.
llvm-svn: 98968
2010-03-19 17:41:26 +00:00
bb34b4e10f
resolve fixme: we now infer the instruction-level 'isvariadic' bit
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from the pattern if present, and we use it instead of the bit.
llvm-svn: 98938
2010-03-19 05:34:15 +00:00
83aeaab462
add a new SDNPVariadic SDNP node flag, and use it in
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dag isel gen instead of instruction properties. This
allows the oh-so-useful behavior of matching a variadic
non-root node.
llvm-svn: 98934
2010-03-19 05:07:09 +00:00
be6b17f927
rewrite EnforceSmallerThan to be less bone headed.
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llvm-svn: 98933
2010-03-19 04:54:36 +00:00
ec71ba25e5
Fix -Asserts warning.
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llvm-svn: 98927
2010-03-19 03:18:20 +00:00
da5b4ad03e
eliminate the last use of EEVT::isUnknown
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llvm-svn: 98918
2010-03-19 01:14:27 +00:00
1802b17b65
Finally change the instruction looking map to be a densemap from
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record* -> instrinfo instead of std::string -> instrinfo.
This speeds up tblgen on cellcpu from 7.28 -> 5.98s with a debug
build (20%).
llvm-svn: 98916
2010-03-19 01:07:44 +00:00
4763dbeaf6
make inst_begin/inst_end iterate over InstructionsByEnumValue.
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Use CodeGenTarget::getInstNamespace in one place and fix it.
llvm-svn: 98915
2010-03-19 01:00:55 +00:00
2d822ab185
revert 98912
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llvm-svn: 98914
2010-03-19 00:50:47 +00:00
45e2fc5ac1
make inst_begin/inst_end iterate over InstructionsByEnumValue.
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llvm-svn: 98912
2010-03-19 00:40:22 +00:00
918be520dc
change Target.getInstructionsByEnumValue to return a reference
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to a vector that CGT stores instead of synthesizing it on every
call.
llvm-svn: 98910
2010-03-19 00:34:35 +00:00
c9ae94c793
factor copy and paste code.
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llvm-svn: 98908
2010-03-19 00:23:20 +00:00
70eb897d7c
don't go through getInstructions().
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llvm-svn: 98906
2010-03-19 00:18:23 +00:00
9aec14b560
look up instructions by record, not by name.
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llvm-svn: 98904
2010-03-19 00:07:20 +00:00
63a627cd88
expand tblgen's support for instructions with implicit defs.
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llvm-svn: 98900
2010-03-18 23:57:40 +00:00
fdc20711e8
infer results of a pattern from implicit defs. This allows you to do something
...
like this:
def : Pat<(add ...),
(FOOINST)>;
When fooinst only has a single implicit def (e.g. to R1). This will be handled
as if written as (set R1, (FOOINST ...))
llvm-svn: 98897
2010-03-18 23:15:10 +00:00
2130a3e0af
capture implicit uses and defs in CodeGenInstruction
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llvm-svn: 98879
2010-03-18 21:42:03 +00:00
13590892e7
simplify this code, the # of sets in the pattern for an instruction
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shouldn't change this.
llvm-svn: 98872
2010-03-18 21:15:05 +00:00
81fd1f20ba
disallow concatenation of two dags with different operators.
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llvm-svn: 98871
2010-03-18 21:07:51 +00:00
1f22d278f3
rewrite this to not artificially force concat the ins/outs list.
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llvm-svn: 98870
2010-03-18 21:07:39 +00:00
0f03747577
eliminate support for "ops" in the input/output list of an
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instruction. Instructions must use 'ins' and 'outs' now.
llvm-svn: 98868
2010-03-18 20:56:35 +00:00
5f418eafdc
remove some code that was working around old sparc v9 backend bugs.
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Add checking that the input/output operand list in spelled right.
llvm-svn: 98865
2010-03-18 20:50:52 +00:00
9e6437ee7d
lit: Tweak example tests config.
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llvm-svn: 98859
2010-03-18 20:06:05 +00:00
451a435473
MC/AsmMatcher: Add support for target specific "instruction cleanup" functions,
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to allow custom post-processing of matched instructions.
llvm-svn: 98857
2010-03-18 20:05:56 +00:00
dae75defc8
Add an extra newline to separate PP directives from the contents
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llvm-svn: 98820
2010-03-18 13:16:38 +00:00
Chris Lattner