Commit Graph

320338 Commits

Author SHA1 Message Date
Yevgeny Rouban d4097b4a93 [SimpleLoopUnswitch] Implement handling of prof branch_weights metadata for SwitchInst
Differential Revision: https://reviews.llvm.org/D60606

llvm-svn: 364734
2019-07-01 08:43:53 +00:00
Sam Parker 98722691b0 [ARM] WLS/LE Code Generation
Backend changes to enable WLS/LE low-overhead loops for armv8.1-m:
1) Use TTI to communicate to the HardwareLoop pass that we should try
   to generate intrinsics that guard the loop entry, as well as setting
   the loop trip count.
2) Lower the BRCOND that uses said intrinsic to an Arm specific node:
   ARMWLS.
3) ISelDAGToDAG the node to a new pseudo instruction:
   t2WhileLoopStart.
4) Add support in ArmLowOverheadLoops to handle the new pseudo
   instruction.

Differential Revision: https://reviews.llvm.org/D63816

llvm-svn: 364733
2019-07-01 08:21:28 +00:00
Billy Robert O'Neal III 0384a78054 [libcxx] [test] Add void cast to result of compare_exchange_weak to suppress [[nodiscard]].
llvm-svn: 364732
2019-07-01 08:09:02 +00:00
Haojian Wu b739b91cd3 [clangd] Make FixIt message be consistent with the clang-tidy diagnostic message.
Summary:
We strip the "[clang-tidy-check]" suffix from the clang-tidy diagnostics, we
should be consistent with the message in FixIt (strip the suffix as well).

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D63926

llvm-svn: 364731
2019-07-01 08:05:53 +00:00
Craig Topper fcda45a9eb [X86] Add more load folding tests for vcvt(t)ps2(u)qq showing missed foldings. NFC
llvm-svn: 364730
2019-07-01 07:59:42 +00:00
Craig Topper 29fff0797b [X86] Improve the type checking fast-isel handling of vector bitcasts.
We had a bunch of vector size legality checks for the source type
based on feature flags, but we didn't check the destination type at
all beyond ensuring that it was a "simple" type. But this allowed
the destination to be i128 which isn't legal.

This commit changes the code to use TLI's isTypeLegal logic in
place of the all the subtarget checks. Then additionally checks
that the source and dest are vectors.

Fixes 42452

llvm-svn: 364729
2019-07-01 07:09:34 +00:00
Craig Topper 4ca81a9b99 [X86] Add a DAG combine to replace vector loads feeding a v4i32->v2f64 CVTSI2FP/CVTUI2FP node with a vzload.
But only when the load isn't volatile.

This improves load folding during isel where we only have vzload
and scalar_to_vector+load patterns. We can't have full vector load
isel patterns for the same volatile load issue.

Also add some missing masked cvtsi2fp/cvtui2fp with vzload patterns.

llvm-svn: 364728
2019-07-01 07:09:31 +00:00
Craig Topper fc233c9108 [X86] Add some additional load folding tests to vec_int_to_fp.ll/vec_int_to_fp-widen.ll and disable the peephole pass.
Also copy some missing test cases from vec_int_to_fp.ll to vec_int_to_fp-widen.ll

llvm-svn: 364727
2019-07-01 07:09:26 +00:00
Craig Topper d1728f8987 [X86] Add MOVHPDrm/MOVLPDrm patterns that use VZEXT_LOAD.
We already had patterns that used scalar_to_vector+load. But we can
also have a vzload.

Found while investigating combining scalar_to_vector+load to vzload.

llvm-svn: 364726
2019-07-01 07:09:23 +00:00
Mike Spertus fb133b0aab Various tweaks to MSVC natvis visualizers
Make more consistent use of na format.
Improve visualization of deduction guides.
Add visualizer for explicit specifier (including conditionally explicit)
Fix some typos

llvm-svn: 364724
2019-06-30 22:04:25 +00:00
Mike Spertus bb0b44deaa Clean up MSVC visualization of LLVM pointer types
Create separate natvis ptr and int views for PointerIntPair.
These are convenient in watch Windows and will be used by 
Clang visualizers to be checked in shortly

Also, removed deref views as the MSVC na format has
done the same thing natively since MSVC2013.

llvm-svn: 364723
2019-06-30 21:54:34 +00:00
Jonas Devlieghere 135cf982e8 Revert "[GDBRemote] Remove code that flushes GDB remote packets"
Reverting this again as it doesn't appear to solve the flakiness on the
LLDB standalone bot.

llvm-svn: 364722
2019-06-30 19:00:09 +00:00
Sanjay Patel 706b48251f [InstCombine] canonicalize fcmp+select to minnum/maxnum intrinsics
This is the opposite direction of D62158 (we have to choose 1 form or the other).
Now that we have FMF on the select, this becomes more palatable. And the benefits
of having a single IR instruction for this operation (less chances of missing folds
based on extra uses, etc) overcome my previous comments about the potential advantage
of larger pattern matching/analysis.

Differential Revision: https://reviews.llvm.org/D62414

llvm-svn: 364721
2019-06-30 13:40:31 +00:00
Fangrui Song 78ee2fbf98 Cleanup: llvm::bsearch -> llvm::partition_point after r364719
llvm-svn: 364720
2019-06-30 11:19:56 +00:00
Fangrui Song 2d2cb77e45 [ADT] Implement llvm::bsearch() with std::partition_point()
Summary:
Delete the begin-end form because the standard std::partition_point
can be easily used as a replacement.

The ranges-style llvm::bsearch will be renamed to llvm::partition_point
in the next clean-up patch.

The name "bsearch" doesn't meet people's expectation because in C:

> If two or more members compare equal, which member is returned is unspecified.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D63718

llvm-svn: 364719
2019-06-30 09:17:59 +00:00
Craig Topper 725a8a5dc4 [X86] Custom lower AVX masked loads to masked load and vselect instead of selecting a maskmov+vblend during isel.
AVX masked loads only support 0 as the value for masked off elements.
So we need an extra blend to support other values. Previously we
expanded the masked load to two instructions with isel patterns.
With this patch we now insert the vselect during lowering and it
will be separately selected as a blend.

llvm-svn: 364718
2019-06-30 06:46:37 +00:00
Craig Topper 4d0feb28ec [SelectionDAG] Use the memory VT instead of result VT for FoldingSet profiling in getMaskedLoad/getMaskedStore.
This matches what is done by the Profile function. Otherwise CSE
won't work properly.

llvm-svn: 364717
2019-06-30 06:46:33 +00:00
Adrian Prantl 6293cd0504 Replace tabs with spaces.
llvm-svn: 364716
2019-06-29 18:32:16 +00:00
Nikita Popov 8023c84433 [LFTR] Rephrase getLoopTest into "based-on" check; NFCI
What we want to know here is whether we're already using this value
for the loop condition, so make the query about that. We can extend
this to a more general "based-on" relationship, rather than a direct
icmp use later.

llvm-svn: 364715
2019-06-29 15:12:59 +00:00
Sanjay Patel 77dc1e8568 [InstCombine] canonicalize fmin/fmax to LLVM intrinsics minnum/maxnum
This transform came up in D62414, but we should deal with it first.
We have LLVM intrinsics that correspond exactly to libm calls (unlike
most libm calls, these libm calls never set errno).
This holds without any fast-math-flags, so we should always canonicalize
to those intrinsics directly for better optimization.
Currently, we convert to fcmp+select only when we have FMF (nnan) because
fcmp+select does not preserve the semantics of the call in the general case.

Differential Revision: https://reviews.llvm.org/D63214

llvm-svn: 364714
2019-06-29 14:28:54 +00:00
Nikita Popov 61a8b62b4c [LFTR] Remove unnecessary latch check; NFCI
The whole indvars pass works on loops in simplified form, so there
is always a unique latch. Convert the condition into an assertion
in needsLFTR (though we also assert this in later LFTR functions).

Additionally update the comment on getLoopTest() now that we are
dealing with multiple exits.

llvm-svn: 364713
2019-06-29 12:41:02 +00:00
Roman Lebedev e3a94ba4a9 [InstCombine] Shift amount reassociation (PR42391)
Summary:
Given pattern:
`(x shiftopcode Q) shiftopcode K`
we should rewrite it as
`x shiftopcode (Q+K)`  iff `(Q+K) u< bitwidth(x)`
This is valid for any shift, but they must be identical.

* https://rise4fun.com/Alive/9E2
* exact on both lshr => exact https://rise4fun.com/Alive/plHk
* exact on both ashr => exact https://rise4fun.com/Alive/QDAA
* nuw on both shl => nuw https://rise4fun.com/Alive/5Uk
* nsw on both shl => nsw https://rise4fun.com/Alive/0plg

Should fix [[ https://bugs.llvm.org/show_bug.cgi?id=42391 | PR42391]].

Reviewers: spatel, nikic, RKSimon

Reviewed By: nikic

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63812

llvm-svn: 364712
2019-06-29 11:51:50 +00:00
Roman Lebedev fe107fcde4 [IR][Patternmatch] Add m_SpecificInt_ULT() predicate
Summary:
Match an integer or vector with every element unsigned less than the
Threshold. For vectors, this includes constants with undefined elements.

FIXME: is it worth generalizing this to simply take ICmpInst::Predicate?

Reviewers: craig.topper, spatel, nikic

Reviewed By: spatel

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63811

llvm-svn: 364711
2019-06-29 11:51:37 +00:00
Dmitry Venikov 9e9eb62f9f [APInt] Fix getBitsNeeded for INT_MIN values
Summary: This patch fixes behaviour of APInt::getBitsNeeded for INT_MIN 10 bits values.

Reviewers: regehr, RKSimon

Reviewed By: RKSimon

Subscribers: grandinj, dexonsmith, kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63691

llvm-svn: 364710
2019-06-29 11:38:12 +00:00
Nikita Popov 2d756c4feb [LFTR] Fix post-inc pointer IV with truncated exit count (PR41998)
Fixes https://bugs.llvm.org/show_bug.cgi?id=41998. Usually when we
have a truncated exit count we'll truncate the IV when comparing
against the limit, in which case exit count overflow in post-inc
form doesn't matter. However, for pointer IVs we don't do that, so
we have to be careful about incrementing the IV in the wide type.

I'm fixing this by removing the IVCount variable (which was
ExitCount or ExitCount+1) and replacing it with a UsePostInc flag,
and then moving the actual limit adjustment to the individual cases
(which are: pointer IV where we add to the wide type, integer IV
where we add to the narrow type, and constant integer IV where we
add to the wide type).

Differential Revision: https://reviews.llvm.org/D63686

llvm-svn: 364709
2019-06-29 09:24:12 +00:00
Sam Clegg b72664fd21 Partial revert of "[llvm-ar] Document response file support in --help"
This is partial revert of 70a8027c60.

The test apparently failed on win32 bots due to the way slashes in
pathnames are handled.

llvm-svn: 364705
2019-06-29 01:53:26 +00:00
Fangrui Song 765eba38c8 [Driver] Fix style issues of --print-supported-cpus after D63105
Reviewed By: ziangwan

Differential Revision: https://reviews.llvm.org/D63822

llvm-svn: 364704
2019-06-29 01:24:36 +00:00
Matt Arsenault 7889d4ce66 AMDGPU/GlobalISel: Add some more tests for icmp select
llvm-svn: 364703
2019-06-29 00:55:16 +00:00
Fangrui Song a83e94ebf2 Use const auto *
llvm-svn: 364702
2019-06-29 00:55:13 +00:00
Matt Arsenault 0d45209757 AMDGPU/GlobalISel: RegBankSelect for update.dpp
llvm-svn: 364701
2019-06-29 00:44:36 +00:00
Julian Lettner be4148062b [TSan] Attempt to fix linker error for Linux on AArch64
Introduced in 5be69ebe12.

llvm-svn: 364700
2019-06-29 00:40:45 +00:00
Matt Arsenault fd82cf4f4d AMDGPU/GlobalISel: RegBankSelect for atomic.inc/atomic.dec
llvm-svn: 364699
2019-06-29 00:39:20 +00:00
Matt Arsenault adb1f21e52 AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
llvm-svn: 364698
2019-06-29 00:33:13 +00:00
Matt Arsenault b416d5fc8b AMDGPU/GlobalISel: RegBankSelect for some easy intrinsics
llvm-svn: 364697
2019-06-29 00:29:56 +00:00
Matt Arsenault 5ea3c9adb2 AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics
llvm-svn: 364696
2019-06-29 00:28:52 +00:00
Matt Arsenault 6aafb3068f AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.fmas
llvm-svn: 364695
2019-06-29 00:25:53 +00:00
Matt Arsenault ade5162432 AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
llvm-svn: 364694
2019-06-29 00:22:28 +00:00
Philip Reames 1504b6ee7e [IndVars] Remove a bit of manual constant folding [NFC]
SCEV is more than capable of folding (add x, trunc(0)) to x.  

llvm-svn: 364693
2019-06-29 00:19:31 +00:00
Leonard Chan da47e2cac3 Revert "[clang][NewPM] Fix broken profile test"
This reverts commit ab2c0ed01e.

See https://reviews.llvm.org/D63155

llvm-svn: 364692
2019-06-29 00:10:22 +00:00
Matt Arsenault 69d9c31433 AMDGPU: Add baseline test for packed shufflevector
llvm-svn: 364691
2019-06-28 23:43:40 +00:00
Jan Korous caf4cee6fe [clang][test][NFC] Explicitly specify clang ABI in AST Dumper test
Clang <= 4 used the pre-C++11 rule about which structures can be passed in registers.

llvm-svn: 364690
2019-06-28 22:37:31 +00:00
Wouter van Oortmerssen 319c87d94f [WebAssembly] Assembler: support .int16/32/64 directives.
Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63959

llvm-svn: 364689
2019-06-28 22:20:33 +00:00
Wouter van Oortmerssen 35bcba4fae [WebAssembly] Allow @object in .type directives.
Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63955

llvm-svn: 364688
2019-06-28 21:53:11 +00:00
Sanjay Patel 9126c84f50 [x86] remove stale comment about cmov; NFC
The cmov node used to sometimes return a glue result (and that's what
'flag' meant in this context), but that was removed with D38664.

llvm-svn: 364687
2019-06-28 21:45:55 +00:00
Jim Ingham f2128b28cd Get the expression parser to handle missing weak symbols.
MachO only for this patch.

Differential Revision: https://reviews.llvm.org/D63914

<rdar://problem/51463642>

llvm-svn: 364686
2019-06-28 21:40:05 +00:00
Cameron McInally b671535983 [NFC][NewGVN] Explicitly check fpmath metadata in fpmath.ll
Suggested in D63933.

llvm-svn: 364685
2019-06-28 21:39:08 +00:00
Sanjay Patel 573b241c68 [Lanai] auto-generate complete test checks; NFC
This file will fail with a common codegen transform that
I'm looking at, and I can't tell if that's an improvement
or regression based on the sparse checking.

llvm-svn: 364684
2019-06-28 20:45:32 +00:00
Alexey Bataev 1242d8f333 [OPENMP]Improve analysis of implicit captures.
If the variable is used in the OpenMP region implicitly, we need to
check the data-sharing attributes for such variables and generate
implicit clauses for them. Patch improves analysis of such variables for
better handling of data-sharing rules.

llvm-svn: 364683
2019-06-28 20:45:14 +00:00
Wouter van Oortmerssen fc222e23ca [WebAssembly] Assembler: Allow offsets and p2align in symbol load.
Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63951

llvm-svn: 364682
2019-06-28 20:31:13 +00:00
Wouter van Oortmerssen 597ba18008 [WebAssembly] Assembler: Improve section parsing.
Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63947

llvm-svn: 364681
2019-06-28 20:29:16 +00:00