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Author SHA1 Message Date
Sanjay Patel 59313be8d3 [CodeGen] assume max/default throughput for unspecified instructions 
This is a fix for the problem arising in D47374 (PR37678):
https://bugs.llvm.org/show_bug.cgi?id=37678

We may not have throughput info because it's not specified in the model 
or it's not available with variant scheduling, so assume that those
instructions can execute/complete at max-issue-width.

Differential Revision: https://reviews.llvm.org/D47723

llvm-svn: 334055
 2018-06-05 23:34:45 +00:00
Simon Pilgrim 60411d9a8c [X86] Tag RDRAND/RDSEED instruction scheduler classes 
llvm-svn: 320045
 2017-12-07 14:18:48 +00:00
Simon Pilgrim 439679c085 [X86][RDSEED] Add rdseed scheduling tests 
llvm-svn: 320040
 2017-12-07 13:47:17 +00:00