d379e896ff
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
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llvm-svn: 74580
2009-07-01 01:59:31 +00:00
0dc101b897
Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.
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The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.
This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.
llvm-svn: 74518
2009-06-30 08:49:04 +00:00
1a65f61137
Removed SimpleRewriter.
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llvm-svn: 72880
2009-06-04 18:45:36 +00:00
b39a6be77a
Fix for PR4225: When rewriter reuse a value in a physical register , it clear the register kill operand marker and its kill ops information. However, the cleared operand may be a def of a super-register. Clear the kill ops info for the super-register's sub-registers as well.
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llvm-svn: 72758
2009-06-03 09:00:27 +00:00
fc968ef687
Update to in-place spilling framework. Includes live interval scaling and trivial rewriter.
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llvm-svn: 72729
2009-06-02 16:53:25 +00:00
e23c109a67
Fix PR4210. Rewritter should track and update kills of sub-registers as well.
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llvm-svn: 71848
2009-05-15 06:48:19 +00:00
df1aeeeb90
Teach TransferDeadness to delete truly dead instructions if they do not produce side effects.
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llvm-svn: 71606
2009-05-12 23:07:00 +00:00
ab68cf24bb
Renamed Spiller classes (plus uses and related files) to VirtRegRewriter.
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llvm-svn: 71057
2009-05-06 02:36:21 +00:00
Evan Cheng