Commit Graph

288285 Commits

Author SHA1 Message Date
Roman Lebedev d338222a8c [LLD][WASM] Handle WASM_SYMBOL_TYPE_SECTION in toString().
Fixes build. If this is not the desired solution, please revert.
WasmSymbolType was changed in rL330982 / D44184

llvm-svn: 330984
2018-04-26 20:00:11 +00:00
Simon Atanasyan d4d892ff9f [mips] Accept 32-bit offsets for lb and lbu commands
`lb` and `lbu` commands accepts 16-bit signed offsets. But GAS accepts
larger offsets for these commands. If an offset does not fit in 16-bit
range, `lb` command is translated into lui/lb or lui/addu/lb series.
It's interesting that initially LLVM assembler supported this feature,
but later it was broken.

This patch restores support for 32-bit offsets. It replaces `mem_simm16`
operand for `LB` and `LBu` definitions by the new `mem_simmptr` operand.
This operand is intended to check that offset fits to the same size as
using for pointers. Later we will be able to extend this rule and
accepts 64-bit offsets when it is possible.

Some issues remain:
- The regression also affects LD, SD, LH, LHU commands. I'm going
  to fix them by a separate patch.

- GAS accepts any 32-bit values as an offset. Now LLVM accepts signed
  16-bit values and this patch extends the range to signed 32-bit offsets.
  In other words, the following code accepted by GAS and still triggers
  an error by LLVM:
```
  lb      $4, 0x80000004

  # gas
  lui     a0, 0x8000
    lb      a0, 4(a0)
```

- In case of 64-bit pointers GAS accepts a 64-bit offset and translates
  it to the li/dsll/lb series of commands. LLVM still rejects it.
  Probably this feature has never been implemented in LLVM. This issue
  is for a separate patch.
```
  lb      $4, 0x800000001

  # gas
  li      a0, 0x8000
  dsll    a0, a0, 0x14
  lb      a0, 4(a0)
```

Differential Revision: https://reviews.llvm.org/D45020

llvm-svn: 330983
2018-04-26 19:55:28 +00:00
Sam Clegg 6a31a0d694 [WebAssembly] Write DWARF data into wasm object file
- Writes ".debug_XXX" into corresponding custom sections.
- Writes relocation records into "reloc.debug_XXX" sections.

Patch by Yury Delendik!

Differential Revision: https://reviews.llvm.org/D44184

llvm-svn: 330982
2018-04-26 19:27:28 +00:00
Matt Arsenault 540512c297 DAG: Fix not legalizing vector fcanonicalizes
If an fcanoncialize was done on a vector type that was legal,

llvm-svn: 330981
2018-04-26 19:21:37 +00:00
Matt Arsenault fcc5ba46b7 AMDGPU: Extend extract_vector_elt fneg combine to fabs
Fixes a regression in a future commit.

llvm-svn: 330980
2018-04-26 19:21:32 +00:00
Matt Arsenault 8474803c7c AMDGPU: Consolidate SubtargetPredicate definitions
llvm-svn: 330979
2018-04-26 19:21:26 +00:00
Rafael Espindola 40f46bc3e6 Delete unused variable.
llvm-svn: 330978
2018-04-26 19:21:07 +00:00
Justin Bogner 65c9e3dd17 Specify REQUIRES: default_triple in a few tests
These were all failing when specifying LLVM_DEFAULT_TARGET_TRIPLE=''.

llvm-svn: 330977
2018-04-26 19:15:25 +00:00
Geoff Berry 08ab8c9544 [AArch64] Fix scavenged spill slot base when stack realignment required.
Summary:
Use the FP for scavenged spill slot accesses to prevent corruption of
the callee-save region when the SP is re-aligned.

Based on problem and patch reported by @paulwalker-arm

This is an alternative to solution proposed in D45770

Reviewers: t.p.northover, paulwalker-arm, thegameg, javed.absar

Subscribers: qcolombet, mcrosier, paulwalker-arm, kristof.beyls, rengolin, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D46063

llvm-svn: 330976
2018-04-26 18:50:45 +00:00
Roman Lebedev 3d7b22621c [NFC][InstCombine] rem.ll: add a few commutative tests.
This closes a gap in missing test coverage in
isKnownToBeAPowerOfTwo() from ValueTracking.cpp

llvm-svn: 330975
2018-04-26 18:44:37 +00:00
Roman Lebedev e117e1a440 [NFC][InstCombine] Regenerate rem.ll test
llvm-svn: 330974
2018-04-26 18:44:32 +00:00
Alexander Shaposhnikov 40e9bdf9af [llvm-objcopy] Implement --redefine-sym option
This diff implements --redefine-sym option 
for changing the name of a symbol.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D46029

llvm-svn: 330973
2018-04-26 18:28:17 +00:00
Michael Berg 15c0515a21 augmenting description for fcmp fmf - NFC
llvm-svn: 330972
2018-04-26 18:17:58 +00:00
Sam Clegg 2b8b179867 [WebAssembly] Add version to linking section (to match llvm-side change)
Differential Revision: https://reviews.llvm.org/D46070

llvm-svn: 330971
2018-04-26 18:17:21 +00:00
Adrian Prantl e42805d07c Fix a bug that prevents global variables from having a DW_OP_deref.
For local variables the first DW_OP_deref is consumed by turning the
location kind into a memeory location, but that only makes sense for
values that are in a register to begin with, which cannot happen for
global variables that are attached to a symbol.

rdar://problem/39741860

llvm-svn: 330970
2018-04-26 18:17:04 +00:00
Sam Clegg 6bb5a41f99 [WebAssembly] Add version to object file metadata
Summary: See https://github.com/WebAssembly/tool-conventions/issues/54

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46069

llvm-svn: 330969
2018-04-26 18:15:32 +00:00
Andrea Di Biagio b31f918979 [Tablegen] SubtargetEmitter: move the logic that prints predicates for variant scheduling classes to helper functions. NFC
llvm-svn: 330968
2018-04-26 18:03:24 +00:00
Rafael Espindola ab44b923f5 Add a comment. NFC.
llvm-svn: 330967
2018-04-26 18:03:04 +00:00
Rafael Espindola ab0cce5f1f Replace SharedSymbols with Defined when creating copy relocations.
This is slightly simpler to read IMHO. Now if a symbol has a position
in the file, it is Defined.

The main motivation is that with this a SharedSymbol doesn't need a
section, which reduces the size of SymbolUnion.

With this the peak allocation when linking chromium goes from 568.1 to
564.2 MB.

llvm-svn: 330966
2018-04-26 17:58:58 +00:00
Haicheng Wu b09308d82a [GlobalMerge] Fix a typo
now => know

llvm-svn: 330965
2018-04-26 17:56:50 +00:00
Vlad Tsyrklevich b768d235a9 Revert "Enable EliminateAvailableExternally pass for -O1"
This reverts commit r330961 because it breaks a handful of clang tests.

llvm-svn: 330964
2018-04-26 17:54:53 +00:00
Paul Semel b492494c0f [llvm-objcopy] Add --localize-symbol option
llvm-svn: 330963
2018-04-26 17:44:43 +00:00
Vlad Tsyrklevich 3b59a8aba0 Update stale comment in AsmWriter.cpp
Summary:
The old comment referred to llvm/IR/Writer.h which doesn't longer exist.
This patch replaces it with an up-to-date description of AsmWriter library.

Patch by Alex Yursha.

Reviewers: gribozavr, vlad.tsyrklevich

Reviewed By: vlad.tsyrklevich

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45895

llvm-svn: 330962
2018-04-26 17:34:51 +00:00
Vlad Tsyrklevich 42c5a9c29a Enable EliminateAvailableExternally pass for -O1
Summary:
Follow-up to D43690, the EliminateAvailableExternally pass currently
runs under -O0 and -O2 and up. Under -O1 we would still want to drop
available_externally symbols to reduce space without inlining having
run.

Reviewers: tejohnson

Reviewed By: tejohnson

Subscribers: mehdi_amini, llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D46093

llvm-svn: 330961
2018-04-26 17:33:24 +00:00
Rafael Espindola 06cb7c8773 Simplify processRelocAux.
It returns a different Expr only in the case of creating a function
symbol pointing to its plt entry. We can just add a call to
addPltEntry to avoid that and return void.

With this patch further simplifications of how we handle copy
relocations are possible.

llvm-svn: 330960
2018-04-26 17:22:44 +00:00
Sam Clegg 8c4b0ce2b1 [WebAssembly] objdump: Don't assume all relocations have symbols
Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46134

llvm-svn: 330959
2018-04-26 17:05:04 +00:00
Sanjay Patel c5ded68077 [docs] provide the specific sanitizer option to detect junk-in-the-ftrunc
llvm-svn: 330958
2018-04-26 17:04:07 +00:00
Sam Clegg f676cdd515 [WebAssembly] Implement getRelocationValueString()
And use it in llvm-objdump.

Differential Revision: https://reviews.llvm.org/D46092

llvm-svn: 330957
2018-04-26 16:41:51 +00:00
Simon Dardis f760b2c087 [mips] Fix a test case which is keeping the expensive checks bot win red (NFC)
llvm-svn: 330956
2018-04-26 16:22:47 +00:00
Marshall Clow 57e782535e Move old test into test/libcxx, and implement new version of test for ostreambuf_iterator::failed. Fixes PR#37245. Thanks to Billy O'Neill for the bug report.
llvm-svn: 330955
2018-04-26 16:16:45 +00:00
Mark Searles 2a19af6e17 [AMDGPU][Waitcnt] As of gfx7, VMEM operations do not increment the export counter and the input registers are available in the next instruction; update the waitcnt pass to take this into account.
Differential Revision: https://reviews.llvm.org/D46067

llvm-svn: 330954
2018-04-26 16:11:19 +00:00
Rafael Espindola f4a9d56a9a Delete GotPltIndex.
It was always an offset of PltIndex.

This doesn't reduce the size of the structures, but makes it easier to
do so in a followup patch.

llvm-svn: 330953
2018-04-26 16:09:30 +00:00
Simon Dardis 8086b9db3d [mips] Correct the definitions of some control instructions
Correct the definitions of ei, di, eret, deret, wait, syscall and break.
Also provide microMIPS specific aliases to match the MIPS aliases.

Additionally correct the definition of the wait instruction so that
it is present in the instruction mapping tables.

Reviewers: smaksimovic, abeserminji, atanasyan

Differential Revision: https://reviews.llvm.org/D45939

llvm-svn: 330952
2018-04-26 16:06:34 +00:00
Sanjay Patel 5a90285bd9 [DAGCombiner] limit ftrunc optimizations with function attribute
As noted, the attribute name is subject to change once we have
the clang side implemented, but it's clear that we need some
kind of attribute-based predication here based on the discussion
for:
rL330437

llvm-svn: 330951
2018-04-26 16:04:44 +00:00
Sanjay Patel 99a5f396d4 [x86] add tests to show potential opt-out of ftrunc optimization; NFC
This is another preliminary step for disabling this transform as 
discussed in the post-commit thread for:
rL330437
I'm using one of the names suggested there for the attribute, but 
we can fix that up as needed once the clang side of this is sorted 
out. 

llvm-svn: 330950
2018-04-26 15:36:15 +00:00
Alex Bradbury fda6037e98 [RISCV] Implement isLoadFromStackSlot and isStoreToStackSlot
This causes some slight shuffling but no meaningful codegen differences on the 
corpus I used for testing, but it has a larger impact when combined with e.g. 
rematerialisation. Regardless, it makes sense to report as accurate 
target-specific information as possible.

llvm-svn: 330949
2018-04-26 15:34:27 +00:00
Benjamin Kramer 7dd437710e [NVPTX] Make the legalizer expand shufflevector of <2 x half>
There's no direct instruction for this, but it's trivially implemented
with two movs. Without this the code generator just dies when
encountering a shufflevector.

Differential Revision: https://reviews.llvm.org/D46116

llvm-svn: 330948
2018-04-26 15:26:29 +00:00
Sanjay Patel a5da086386 [DAGCombiner] refactor FP->int->FP folds; NFC
As discussed in the post-review comments for rL330437,
we need to guard this fold to allow existing code to
keep working with the undefined behavior that they've
come to rely on.

That would mean duplicating more code than we already 
have, so let's fix that first. 

llvm-svn: 330947
2018-04-26 15:20:18 +00:00
Yuka Takahashi 4f38ffa63c Add getDeserializationListener to ASTReader
Summary:
We need to know if ASTReader already has a DeserializationListner or
not, and this also helps to create a multiplexing deserialization
listener if there is one already attached.

Reviewers: v.g.vassilev, rsmith, dblaikie, thakis

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D45921

llvm-svn: 330946
2018-04-26 15:09:13 +00:00
Matthew Simpson cfdec0ff70 [SLP] Add tests for transposable binary operations
These test cases are vectorizable, but we are currently unable to vectorize
them effectively.

llvm-svn: 330945
2018-04-26 14:50:04 +00:00
Guansong Zhang ad6c26516b [OpenMP] Remove compilation warning when using clang to compile bc files.
Summary: Minor printf format correction. NVCC ignore those. Clang will give warning on these if debug is enabled.

Reviewers: grokos

Reviewed By: grokos

Subscribers: openmp-commits

Tags: #openmp

Differential Revision: https://reviews.llvm.org/D45528

llvm-svn: 330944
2018-04-26 14:06:53 +00:00
Alex Bradbury 15e894baee [RISCV] Implement isZextFree
This returns true for 8-bit and 16-bit loads, allowing LBU/LHU to be selected
and avoiding unnecessary masks.

llvm-svn: 330943
2018-04-26 14:04:18 +00:00
Alex Bradbury e74f519241 [RISCV] Add test case showing suboptimal codegen when loading unsigned char/short
Implementing isZextFree will allow lbu or lhu to be selected rather than 
lb+mask and lh+mask.

llvm-svn: 330942
2018-04-26 14:00:35 +00:00
Matthew Simpson b4096ebe26 [TTI, AArch64] Add transpose shuffle kind
This patch adds a new shuffle kind useful for transposing a 2xn matrix. These
transpose shuffle masks read corresponding even- or odd-numbered vector
elements from two n-dimensional source vectors and write each result into
consecutive elements of an n-dimensional destination vector. The transpose
shuffle kind is meant to model the TRN1 and TRN2 AArch64 instructions. As such,
this patch also considers transpose shuffles in the AArch64 implementation of
getShuffleCost.

Differential Revision: https://reviews.llvm.org/D45982

llvm-svn: 330941
2018-04-26 13:48:33 +00:00
Alex Bradbury 130b8b3f2b [RISCV] Implement isTruncateFree
Adapted from ARM's implementation introduced in r313533 and r314280.

llvm-svn: 330940
2018-04-26 13:37:00 +00:00
Lama Saba a331f91853 [X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
Differential Revision: https://reviews.llvm.org/D45823

Change-Id: Icf6f34f6babc3cb2ff5292fde003472473037a71
llvm-svn: 330939
2018-04-26 13:16:11 +00:00
Alex Bradbury dcbff63c24 [RISCV] Implement isLegalICmpImmediate
I'm unable to construct a representative test case that demonstrates the 
advantage, but it seems sensible to report accurate target-specific 
information regardless.

llvm-svn: 330938
2018-04-26 13:15:17 +00:00
Alex Bradbury 5c41ecedf8 [RISCV] Implement isLegalAddImmediate
This causes a trivial improvement in the recently added lsr-legaladdimm.ll 
test case.

llvm-svn: 330937
2018-04-26 13:00:37 +00:00
Alex Bradbury c2f78f80da [RISCV] Add test/CodeGen/RISCV/lsr-legaladdimm.ll
Add a test case which will show a codegen difference upon the implementation 
of a target-specific isLegalAddImmediate.

llvm-svn: 330936
2018-04-26 12:57:29 +00:00
Andrea Di Biagio 38fe227fd9 [Tablegen] Simplify code in CodeGenSchedule. NFCI
llvm-svn: 330935
2018-04-26 12:56:26 +00:00