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171772 Commits

Author SHA1 Message Date
Reid Kleckner 2a24e3ad86 clang-cl: Disable TBAA by default for MSVC compatibility 
MSVC doesn't have an option to enable TBAA, so make -fstrict-aliasing
and -fno-strict-aliasing available in clang-cl.

llvm-svn: 205924
 2014-04-09 20:07:39 +00:00
Quentin Colombet 0b1a5584d6 [DAGCombiner] DAG combine does not know how to combine indexed loads with 
sign/zero/any extensions. However a few places were not checking properly the
property of the load and were turning an indexed load into a regular extended
load. Therefore the indexed value was lost during the process and this was
triggering an assertion.

<rdar://problem/16389332>

llvm-svn: 205923
 2014-04-09 20:03:05 +00:00
Anders Waldenborg 12da50a8e1 Handle difference in signedness of 'char' in test/Index/print-type.c{,pp} 
llvm-svn: 205922
 2014-04-09 19:39:07 +00:00
Anders Waldenborg ddce74f6f8 Make c-index-test -test-print-type include pointeekind for pointer types 
The idea is to give visibility to more type kinds, especially for getting
a better grasp of what appears as unexposed type kind with libclang.

Differential Revision: http://reviews.llvm.org/D3325

llvm-svn: 205921
 2014-04-09 19:16:08 +00:00
Bob Wilson 0e011f201d Add a -triple argument so that this new test passes on Darwin. 
The section names used here are not valid for Mach-O.

llvm-svn: 205920
 2014-04-09 18:51:19 +00:00
Viktor Kutuzov 7004b8c07c Enable building of sanitizers on FreeBSD 
llvm-svn: 205919
 2014-04-09 18:45:12 +00:00
Bob Wilson ae89ddedff Simple fix for build failures resulting from r205867. 
llvm-svn: 205918
 2014-04-09 18:34:45 +00:00
Argyrios Kyrtzidis 9ef53ceb51 [Preprocessor/CodeComplete] Don't add include guard macros to code-completion results. 
llvm-svn: 205917
 2014-04-09 18:21:23 +00:00
Aaron Ballman 91b079a9fc Cannot have the base class destructor be private (or explicitly deleted); fixing the build bots. 
llvm-svn: 205916
 2014-04-09 17:55:04 +00:00
Aaron Ballman 3f993c1320 Thread Safety Analysis: some minor cleanups to the latest thread safety changes. No functional changes intended. 
* Adds an iterator_range interface to CallExpr to get the arguments
* Modifies SExpr such that it must be allocated in the Arena, and cannot be deleted
* Minor const-correctness and nullptr updates
* Adds some operator!= implementations to complement operator==
* Removes unused functionality

llvm-svn: 205915
 2014-04-09 17:45:44 +00:00
David Majnemer 97d8ee3824 Revert "Revert "YAMLIO: Encode ambiguous hex strings explicitly"" 
Don't quote octal compatible strings if they are only two wide, they
aren't ambiguous.

This reverts commit r205857 which reverted r205857.

llvm-svn: 205914
 2014-04-09 17:04:27 +00:00
Samuel Benzaquen fec969a0af Inject unique_ptr/shared_ptr into the test instead of using <memory> 
Summary:
Inject unique_ptr/shared_ptr into the test instead of using <memory>
Libraries might not be present on tests.
This fixes the break introduces at rL205854.

Reviewers: klimek

CC: cfe-commits

Differential Revision: http://reviews.llvm.org/D3330

llvm-svn: 205913
 2014-04-09 16:50:38 +00:00
Ed Maste 5b031ebc70 Use the default TID format in curses UI 
TIDs are conventionally shown as decimal values on FreeBSD and Linux.
Thus, use the ${thread.id%tid} format string to display the thread ID,
instead of a fixed hex format.

llvm.org/pr19380

llvm-svn: 205912
 2014-04-09 16:39:30 +00:00
David Majnemer 3bb6073919 obj2yaml: Don't crash if the characteristics field is zero 
obj2yaml would fail when seeing a Weak External auxiliary record with a
characteristics field holding zero instead of one of
IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY, IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY,
or IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY.

llvm-svn: 205911
 2014-04-09 16:38:15 +00:00
Jim Cownie 33f7b24d9f Add the offload directory which contains the code needed to support 
OpenMP 4.0 "target" directives. This will need more work for
generality, but we want to get it out and visible to the community.

llvm-svn: 205909
 2014-04-09 15:40:23 +00:00
Justin Holewinski 30d56a7b86 [NVPTX] Add preliminary intrinsics and codegen support for textures/surfaces 
This commit adds intrinsics and codegen support for the surface read/write and texture read instructions that take an explicit sampler parameter. Codegen operates on image handles at the PTX level, but falls back to direct replacement of handles with kernel arguments if image handles are not enabled. Note that image handles are explicitly disabled for all target architectures in this change (to be enabled later).

llvm-svn: 205907
 2014-04-09 15:39:15 +00:00
Justin Holewinski 9d852a8e08 [NVPTX] Add support for addrspacecast in global variable initializers, including emitting generic() when casting to address space 0. 
llvm-svn: 205906
 2014-04-09 15:39:11 +00:00
Justin Holewinski 5959695a16 [NVPTX] Add query support for read-write images and managed variables 
This also fixes a bug in the annotation cache where the cache will not be cleared between modules if multiple modules are compiled in the same process.

llvm-svn: 205905
 2014-04-09 15:38:52 +00:00
Ed Maste 6562983234 Do not rely on invalid pthread API use in thread test 
Calling mutex_lock from one thread and then mutex_unlock from another is
not permitted.  Replace the awkward mutex usage with a mutex and
condition variable.

llvm.org/pr18061                                                            

llvm-svn: 205900
 2014-04-09 14:48:25 +00:00
Alp Toker 16f98b255d Fix some doc and comment typos 
llvm-svn: 205899
 2014-04-09 14:47:27 +00:00
Bradley Smith 246b0b617d [ARM64] Change SYS without a register to an alias to make disassembling more consistant. 
llvm-svn: 205898
 2014-04-09 14:44:58 +00:00
Bradley Smith 2cef19a2e6 [ARM64] Correctly disassemble ISB operand as ISB not DBarrier. 
llvm-svn: 205897
 2014-04-09 14:44:54 +00:00
Bradley Smith 239120cada [ARM64] Properly support both apple and standard syntax for FMOV 
llvm-svn: 205896
 2014-04-09 14:44:49 +00:00
Bradley Smith a2308f47d3 [ARM64] Flag setting logical/add/sub immediate instructions don't use SP. 
llvm-svn: 205895
 2014-04-09 14:44:44 +00:00
Bradley Smith f280e91849 [ARM64] Conditional branches must always print their condition code, even AL. 
llvm-svn: 205894
 2014-04-09 14:44:39 +00:00
Bradley Smith a19b7e83dc [ARM64] Fix disassembly logic for extended loads/stores with 32-bit registers. 
llvm-svn: 205893
 2014-04-09 14:44:36 +00:00
Bradley Smith a0d7a9a12f [ARM64] When printing a pre-indexed address with #0, the ', #0' is not optional. 
llvm-svn: 205892
 2014-04-09 14:44:31 +00:00
Bradley Smith 70c6acbbfd [ARM64] Add missing shifted register MVN alias to ORN 
llvm-svn: 205891
 2014-04-09 14:44:26 +00:00
Bradley Smith 403bbf95c0 [ARM64] SXTW/UXTW are only valid aliases for 32-bit operations. 
llvm-svn: 205890
 2014-04-09 14:44:22 +00:00
Bradley Smith 779238a216 [ARM64] Fix canonicalisation of MOVs. MOV is too complex to be modelled by a dumb alias. 
llvm-svn: 205889
 2014-04-09 14:44:18 +00:00
Bradley Smith f823079acd [ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all labels types 
llvm-svn: 205888
 2014-04-09 14:44:12 +00:00
Bradley Smith af2710c96f [ARM64] Ensure sp is decoded as SP, not XZR in LD1 instructions. 
llvm-svn: 205887
 2014-04-09 14:44:07 +00:00
Bradley Smith a0dce246ed [ARM64] Tighten up the special casing in emitting arithmetic extends. UXTW should only be translated when the instruction uses WSP, not SP. Vice versa for UXTX and 64-bit instructions. 
llvm-svn: 205886
 2014-04-09 14:44:03 +00:00
Bradley Smith 3971d3dc75 [ARM64] Rename LR to the UAL-compliant 'X30'. 
llvm-svn: 205885
 2014-04-09 14:43:59 +00:00
Bradley Smith 6f1aa59c31 [ARM64] Rename FP to the UAL-compliant 'X29'. 
llvm-svn: 205884
 2014-04-09 14:43:50 +00:00
Bradley Smith 5511f08055 [ARM64] Add a PostEncoderMethod to FCMP - the Rm field should canonically be zero but should be decoded/disassembled with any value. 
llvm-svn: 205883
 2014-04-09 14:43:40 +00:00
Bradley Smith eb4ca04db2 [ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0. 
llvm-svn: 205882
 2014-04-09 14:43:35 +00:00
Bradley Smith db7b9b17eb [ARM64] EXT and EXTR instructions on v8i8 and W regs respectively must have the top bit of their immediate clear. 
llvm-svn: 205881
 2014-04-09 14:43:31 +00:00
Bradley Smith 60e7667886 [ARM64] Scaled fixed-point FCVTZSs should also have bit 29 set to zero. 
llvm-svn: 205880
 2014-04-09 14:43:27 +00:00
Bradley Smith 7525b47208 [ARM64] UBFM/BFM is undefined on w registers when imms<5> or immr<5> is 1. 
llvm-svn: 205879
 2014-04-09 14:43:24 +00:00
Bradley Smith 0243aa33fa [ARM64] Floating point to fixed point scaled conversions are only available on fcvtzs and fcvtzu. 
llvm-svn: 205878
 2014-04-09 14:43:20 +00:00
Bradley Smith 8f906a3c5f [ARM64] Port over the PostEncoderMethod fix for SMULH/UMULH from AArch64. 
llvm-svn: 205877
 2014-04-09 14:43:15 +00:00
Bradley Smith 9f29b726d5 [ARM64] Add missing tlbi operands and error for extra/missing register on tlbi aliases. 
llvm-svn: 205876
 2014-04-09 14:43:11 +00:00
Bradley Smith e8b4166acc [ARM64] Rework system register parsing to overcome SPSel clash in MSR variants. 
llvm-svn: 205875
 2014-04-09 14:43:06 +00:00
Bradley Smith bc35b1f138 [ARM64] Port over the PostEncoderMethod from AArch64 for exclusive loads and stores, so the unused register fields are set to all-ones canonically but are recognised with any value. 
llvm-svn: 205874
 2014-04-09 14:43:01 +00:00
Bradley Smith 4925be9b56 [ARM64] Use PStateMapper to ensure that MSRcpsr operands are validated during disassembly. 
llvm-svn: 205873
 2014-04-09 14:42:56 +00:00
Bradley Smith 3339427e2a [ARM64] Remove PrefetchOp and use ARM64PRFM instead. 
llvm-svn: 205872
 2014-04-09 14:42:53 +00:00
Bradley Smith 16478c4ccf [ARM64] Add WZR to isGPR32Register, since every use needs to check for this anyway. 
llvm-svn: 205871
 2014-04-09 14:42:49 +00:00
Bradley Smith 3db2a85853 [ARM64] Remove ARM64SYS. 
llvm-svn: 205870
 2014-04-09 14:42:45 +00:00
Bradley Smith fb90df563f [ARM64] Move CPSRField and DBarrier operands over to AArch64-style disassembly and assembly. This removes the last users of namespace ARM64SYS. 
llvm-svn: 205869
 2014-04-09 14:42:42 +00:00