65d2a697dc
Pluggable coalescers inplementation.
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llvm-svn: 41743
2007-09-06 16:18:45 +00:00
33820da1da
Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized.
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llvm-svn: 41060
2007-08-13 23:45:17 +00:00
02f6e9b621
Factor live variable analysis so it does not do register coalescing
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simultaneously. Move that pass to SimpleRegisterCoalescing.
This makes it easier to implement alternative register allocation and
coalescing strategies while maintaining reuse of the existing live
interval analysis.
llvm-svn: 37520
2007-06-08 17:18:56 +00:00
31fd60ba0c
Change names from RA to something unique to get rid of naming conflicts with
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certain linkers...
llvm-svn: 36944
2007-05-08 19:02:46 +00:00
8c78a0bff0
Drop 'const'
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llvm-svn: 36662
2007-05-03 01:11:54 +00:00
e95c6ad802
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
2007-05-02 21:39:20 +00:00
09f162ca6a
Do not use typeinfo to identify pass in pass manager.
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llvm-svn: 36632
2007-05-01 21:15:47 +00:00
0ba174534c
Match MachineFunction::UsedPhysRegs changes.
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llvm-svn: 36452
2007-04-25 22:13:27 +00:00
11dc5abde1
Clean up.
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llvm-svn: 36431
2007-04-25 07:18:20 +00:00
b881bdabd9
Copy coalescing change to prevent a physical register from being pin to a
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long live interval that has low usage density.
1. Change order of coalescing to join physical registers with virtual
registers first before virtual register intervals become too long.
2. Check size and usage density to determine if it's worthwhile to join.
3. If joining is aborted, assign virtual register live interval allocation
preference field to the physical register.
4. Register allocator should try to allocate to the preferred register
first (if available) to create identify moves that can be eliminated.
llvm-svn: 36218
2007-04-17 20:32:26 +00:00
0e3278e505
First cut trivial re-materialization support.
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llvm-svn: 35208
2007-03-20 08:13:50 +00:00
220a7af107
Only add liveinterval to livein set if it isn't assigned a stack slot.
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llvm-svn: 34593
2007-02-25 09:39:02 +00:00
f7ed82da10
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
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llvm-svn: 34428
2007-02-19 21:49:54 +00:00
da81bf4d3e
For PR1207:
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Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
a3d3599210
Do not add livein's to entry MBB twice.
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llvm-svn: 34382
2007-02-17 11:11:27 +00:00
7238410766
Add live-ins to every BB.
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llvm-svn: 34342
2007-02-16 09:05:02 +00:00
aee775a6b7
Eliminate static ctors from Statistics
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llvm-svn: 32698
2006-12-19 22:41:21 +00:00
700b873130
Detemplatize the Statistic class. The only type it is instantiated with
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is 'unsigned'.
llvm-svn: 32279
2006-12-06 17:46:33 +00:00
979804d800
eliminate fp statistic
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llvm-svn: 32251
2006-12-06 01:48:55 +00:00
cc08c83186
Unbreak VC++ build.
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llvm-svn: 32113
2006-12-02 02:22:01 +00:00
d108b9a60d
Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. Removes
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a #include of iostream.
llvm-svn: 31800
2006-11-17 00:50:36 +00:00
61feeb90f9
Remove redundant <cmath>.
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llvm-svn: 31561
2006-11-08 19:16:44 +00:00
6a9342166b
Use correct value for float HUGH_VAL.
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llvm-svn: 31500
2006-11-07 12:25:45 +00:00
a916192267
LinearScanner hotspot.
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llvm-svn: 31153
2006-10-24 14:35:25 +00:00
3d27be1333
s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
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llvm-svn: 29911
2006-08-27 12:54:02 +00:00
29e635d3c9
Final polish on machine pass registries.
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llvm-svn: 29471
2006-08-02 12:30:23 +00:00
95eda5b1f3
Introducing plugable register allocators and instruction schedulers.
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llvm-svn: 29434
2006-08-01 14:21:23 +00:00
c496b418b5
Reduce number of exported symbols
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llvm-svn: 29220
2006-07-20 17:28:38 +00:00
e097e6f7c7
Shave another 27K off libllvmgcc.dylib with visibility hidden
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llvm-svn: 28973
2006-06-28 22:17:39 +00:00
a726fc6dbf
If the register allocator cannot find a register to spill, try the aliases. If
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that still fails (because all the register spill weights are inf), just grab
one.
llvm-svn: 28262
2006-05-12 19:07:46 +00:00
db6aa4896b
Backing out previous check-in.
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llvm-svn: 28219
2006-05-11 07:28:16 +00:00
6ad040a6bc
If the live interval legnth is essentially zero, i.e. in every live range
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the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.
llvm-svn: 28217
2006-05-10 22:30:41 +00:00
b6e2d0027a
Add some comments.
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llvm-svn: 27133
2006-03-25 23:00:56 +00:00
2988921dc4
Code cleanups, no functionality change
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llvm-svn: 26328
2006-02-23 06:44:17 +00:00
de02d7727f
Add explicit #includes of <iostream>
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llvm-svn: 25515
2006-01-22 23:41:00 +00:00
e47d9d0e92
HB is *the* code janitor.
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llvm-svn: 25031
2005-12-28 04:55:42 +00:00
f28b3bd8b4
I think I know what you meant here, but just to be safe I'll let you
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do it. :)
<_sabre_> excuses excuses
llvm-svn: 24471
2005-11-21 14:09:40 +00:00
2ea5c99eca
Add section switching to common code generator code. Add a couple of
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asserts.
llvm-svn: 24445
2005-11-21 07:06:27 +00:00
b1f8982ff0
Expose the LiveInterval interfaces as public headers.
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llvm-svn: 23400
2005-09-21 04:19:09 +00:00
4d602bed10
When checking the fixed intervals, don't forget to check for register aliases.
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This fixes PR621 and Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll
llvm-svn: 23158
2005-08-30 21:03:36 +00:00
22e91cc3b5
Keep track of which registers are related to which other registers.
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Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting. This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now. This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.
On this program, on itanium, live intervals now takes 41% of llc time.
llvm-svn: 22986
2005-08-23 22:27:31 +00:00
834a2316a3
Try to avoid scanning the fixed list. On architectures with a non-stupid
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number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers. Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these). This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).
This reduces ppc llc compile time from 184s -> 172s on kc++. This is probably
worth FAR FAR more on itanium though.
llvm-svn: 22972
2005-08-22 20:59:30 +00:00
95a157ae1a
Move some code in the register assignment case that only needs to happen if
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we spill out of the fast path. The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs. This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.
llvm-svn: 22971
2005-08-22 20:20:42 +00:00
83b821b584
Speed up this loop a bit, based on some observations that Nate made, and
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add some comments. This loop really needs to be reevaluated!
llvm-svn: 22966
2005-08-22 16:55:22 +00:00
835702a094
Remove trailing whitespace
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llvm-svn: 21420
2005-04-21 22:36:52 +00:00
ae09d93b35
Update these register allocators to set the PhysRegUsed info in MachineFunction.
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llvm-svn: 19791
2005-01-23 22:45:13 +00:00
78100c41ca
Silence VS warnings
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llvm-svn: 19385
2005-01-08 19:53:50 +00:00
e09dbe2732
Move virtual method call out of loop
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llvm-svn: 18955
2004-12-15 07:04:32 +00:00
784a0dcbd0
Move virtual function call out of loop to speed up getFreePhysReg by about
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20%, shaving 0.1s off hbd compile time on my g5. Yay.
llvm-svn: 18592
2004-12-07 05:25:53 +00:00
b75e790a2b
* There is no reason for SpillWeights to be an instance var
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* Do not put fixed registers into the unhandled set. This means they will
never find their way into the inactive, active, or handled sets, so we
can simplify a bunch of code.
llvm-svn: 17945
2004-11-18 06:01:45 +00:00
David Greene