Commit Graph

194658 Commits

Author SHA1 Message Date
Matt Arsenault 0aa0d70067 MIR: Use Register 2020-04-08 22:07:26 -04:00
Sam Clegg 7baad0c53c [WebAssembly][MC] Use StringRef over std::string pointer
This is followup based on feedback on 5be42f36f5.
See: https://reviews.llvm.org/D77627.

Differential Revision: https://reviews.llvm.org/D77674
2020-04-08 18:28:08 -07:00
Craig Topper ca376782ff [LoopVectorize] Move testing for SVML vectorization of exp2f_finite/exp2_finite from svml-calls.ll to svml-calls-finite.ll where the finite versions of log, pow, and exp already were. 2020-04-08 18:13:55 -07:00
Craig Topper f3d3cec648 [InstCombine] Avoid a call to deprecated version of CreateCall.
Passing a Value * to CreateCall has to call getPointerElementType
to find the type of the pointer.

In this case we can rely on the fact that Intrinsic::getDeclaration
returns a Function * and use that version of CreateCall.
2020-04-08 17:41:16 -07:00
Johannes Doerfert 0985554b70 [Attributor][NFC] Split AbstractAttributes out of Attributor.cpp
Attributor.cpp became quite big and we need to start provide structure.
The Attributor code is now in Attributor.cpp and the classes derived
from AbstractAttribute are in AttributorAttributes.cpp. Minor changes
were required but no intended functional changes.

We also minimized includes as part of this.

Reviewed By: baziotis

Differential Revision: https://reviews.llvm.org/D76873
2020-04-08 19:02:14 -05:00
Christopher Tetreault fe69eb1196 Clean up usages of asserting vector getters in Type
Summary:
Remove usages of asserting vector getters in Type in preparation for the
VectorType refactor. The existence of these functions complicates the
refactor while adding little value.

Reviewers: espindola, efriedma, sdesmalen

Reviewed By: efriedma

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77275
2020-04-08 16:29:36 -07:00
Christopher Tetreault 49fd24fe9e Clean up usages of asserting vector getters in Type
Summary:
Remove usages of asserting vector getters in Type in preparation for the
VectorType refactor. The existence of these functions complicates the
refactor while adding little value.

Reviewers: hfinkel, efriedma, sdesmalen

Reviewed By: efriedma

Subscribers: wuzish, nemanjai, hiraditya, kbarton, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77266
2020-04-08 16:10:55 -07:00
Christopher Tetreault 155740cc33 Clean up usages of asserting vector getters in Type
Summary:
Remove usages of asserting vector getters in Type in preparation for the
VectorType refactor. The existence of these functions complicates the
refactor while adding little value.

Reviewers: sdesmalen, rriddle, efriedma

Reviewed By: sdesmalen

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77263
2020-04-08 15:15:41 -07:00
Amara Emerson befc788cfa GlobalISel: Add a setInstrAndDebugLoc(MachineInstr&) convenience helper to MachineIRBuilder. NFC.
This saves doing two separate calls to set the Instr and DebugLoc from an existing MI.
2020-04-08 14:38:33 -07:00
Matt Arsenault e49e33b610 CodeGen: Use Register in MachineInstrBuilder 2020-04-08 17:03:53 -04:00
River Riddle 400ad6f95d [mlir] Eliminate the remaining usages of cl::opt instead of PassOption.
Summary: Pass options are a better choice for various reasons and avoid the need for static constructors.

Differential Revision: https://reviews.llvm.org/D77707
2020-04-08 13:05:08 -07:00
LLVM GN Syncbot 072ec965e1 [gn build] Port 8b67853a83 2020-04-08 20:00:26 +00:00
Kirill Naumov 8b67853a83 [CFGPrinter] Adding heat coloring to CFGPrinter
This patch introduces the heat coloring of the Control Flow Graph which is based
on the relative "hotness" of each BB. The patch is a part of sequence of three
patches, related to graphs Heat Coloring.

Reviewers: rcorcs, apilipenko, davidxl, sfertile, fedor.sergeev, eraman, bollu

Differential Revision: https://reviews.llvm.org/D77161
2020-04-08 19:59:51 +00:00
Vedant Kumar 0605f5fbe7 unittest: Disable MachineInstrClone.CopyCallSiteInfo entirely
Somehow, details about the host architecture are creeping into the bogus
target set up in MFCommon.inc, causing call site info to be disabled:

http://lab.llvm.org:8011/builders/lld-x86_64-win7/builds/41476
http://lab.llvm.org:8011/builders/clang-s390x-linux-lnt/builds/17987

Disable the test to unblock the bots until I can figure this out.
2020-04-08 12:16:22 -07:00
Vedant Kumar 381bdd546c unittest: Disable MachineInstrClone.CopyCallSiteInfo on Windows
A bot error (http://45.33.8.238/win/12463/step_11.txt) reports 'unknown
file: error: SEH exception with code 0x3221225477 thrown in the test
body', but I don't know what causes this.

It looks like this has come up before, but afaict the root causes could
be different:

  https://reviews.llvm.org/rL329195, and in
  http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20180910/587425.html

I tried testing locally with UBSan, but that didn't uncover anything.
2020-04-08 12:11:53 -07:00
Matt Arsenault c42cc7fd24 CodeGen: Use Register in MachineSSAUpdater 2020-04-08 14:29:01 -04:00
Artem Belevich a9627b7ea7 [CUDA] Add partial support for recent CUDA versions.
Generate PTX using newer versions of PTX and allow using sm_80 with CUDA-11.
None of the new features of CUDA-10.2+ have been implemented yet, so using these
versions will still produce a warning.

Differential Revision: https://reviews.llvm.org/D77670
2020-04-08 11:19:44 -07:00
Vedant Kumar 48e65fc630 MachineFunction: Copy call site info when duplicating insts
Summary:
Preserve call site info for duplicated instructions. We copy over the
call site info in CloneMachineInstrBundle to avoid repeated calls to
copyCallSiteInfo in CloneMachineInstr.

(Alternatively, we could copy call site info higher up the stack, e.g.
into TargetInstrInfo::duplicate, or even into individual backend passes.
However, I don't see how that would be safer or more general than the
current approach.)

Reviewers: aprantl, djtodoro, dstenb

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77685
2020-04-08 11:06:14 -07:00
Matt Arsenault 586769cce2 DAG: Use Register 2020-04-08 13:44:31 -04:00
Sean Fertile d0b57b41f4 [PowerPC][AIX][NFC] Replace deprecated getByValAlign call.
Replace call to deprecated 'getByValAlign()' with
'getNonZeroByValAlign()'.
2020-04-08 13:27:39 -04:00
Simon Pilgrim 94121c60d6 [InstCombine] Regenerate phi-preserve-ir-flags.ll test checks to fix issue reported on D77354 2020-04-08 18:13:24 +01:00
Simon Pilgrim c8dfd0008b [PowerPC] Regenerate optcmp.ll test checks to fix issue reported on D77354 2020-04-08 18:00:43 +01:00
Simon Pilgrim ca5af4b649 [PowerPC] Fix fold-rlwinm.mir typos in checks to fix issue reported on D77354 2020-04-08 17:42:07 +01:00
Nikita Popov 4007e5f32e [RDA] Try to fix build, again (NFC) 2020-04-08 18:30:53 +02:00
Simon Pilgrim 68c6d7e11c [PowerPC] Fix fold-frame-offset-using-rr.mir typos in checks to fix issue reported on D77354
Extra spaces, copy+paste duplicates and missing test name check
2020-04-08 17:18:01 +01:00
Nikita Popov b5d941ea58 [RDA] Try to fix build (NFC)
fuchsia-x86_64-linux builder fails with:

/b/fuchsia-x86_64-linux/llvm.src/llvm/include/llvm/ADT/TinyPtrVector.h:85:15:
error: no matching conversion for C-style cast from 'nullptr_t' to 'llvm::ReachingDef'
    RHS.Val = (EltTy)nullptr;

Let's see whether adding an explicit nullptr_t constructor helps.
2020-04-08 18:15:01 +02:00
Matt Arsenault dcce3ef1d2 FastISel: Partially use Register
Doesn't try to convert the cases that depend on generated code.
2020-04-08 12:10:58 -04:00
Matt Arsenault 7a46e36d51 CodeGen: Use Register more in CallLowering
Some of these MCPhysReg uses should probably be MCRegister, but right
now this would require more invasive changes.
2020-04-08 12:10:58 -04:00
Matt Arsenault ca0ace7298 CodeGen: Use Register in MachineBasicBlock 2020-04-08 12:10:58 -04:00
Matt Arsenault 84aa58cbe2 CodeGen: Use Register in TargetLowering 2020-04-08 12:10:58 -04:00
Simon Pilgrim 54502476e7 [AMDGPU] Refresh fmin_legacy.ll checks to fix issue reported on D77354
Some of the condition codes had inverted since this was generated
2020-04-08 17:05:29 +01:00
Kirill Naumov 0125db9ab2 [TimePasses] Small fix in "-time-passes" flag that makes it more stable
Adds StringMap for TimingData.

Differential Revision: https://reviews.llvm.org/D76946
Reviewed By: fedor.sergeev
2020-04-08 15:59:45 +00:00
Nikita Popov 952c274159 [RDA] Use TinyPtrVector to store reaching defs (NFCI)
RDA currently uses SmallVector<int, 1> to store reaching definitions.
A SmallVector<int, 1> is 24 bytes large, and X86 currently has
164 register units, which means we need 3936 bytes per block.
If you have a large function with 1000 blocks, that's already 4MB.

A large fraction of these reg units will not have any reaching defs
(say, those corresponding to zmm registers), and many will have just
one. A TinyPtrVector serves this use-case much better, as it only
needs 8 bytes per register if it has 0 or 1 reaching defs.

As the name implies, TinyPtrVector is designed to work with pointers,
so we need to add some boilerplate to treat our reaching def integers
as pointers, using an appropriate encoding. We need to keep the low
bit free for tagging, and make sure at least one bit is set to
distinguish the null pointer.

Differential Revision: https://reviews.llvm.org/D77513
2020-04-08 17:46:24 +02:00
Sean Fertile 8abfd2c3bb [PowerPC][AIX] Enable passing byval formal arguments in multiple registers.
Any or all the argument registers can be used to pass a byval formal
argument, with the limitation that the argument must fit in the
available registers (ie: is not split between registers and stack).

Differential Revision: https://reviews.llvm.org/D76902
2020-04-08 11:16:33 -04:00
Simon Pilgrim 5f25d22d3f [ARM] Fix thumb1_return_sequence typo in check to fix issue reported on D77354 2020-04-08 16:00:45 +01:00
Simon Pilgrim 7b65b1ecd1 [ARM] Fix misched-int-basic-thumb2.mir typo in check to fix issue reported on D77354 2020-04-08 15:48:18 +01:00
Simon Pilgrim c6cd0936be [AARCH64][GISEL] arm64-fallback.ll - Refresh remarks to fix issue reported on D77354 2020-04-08 15:28:54 +01:00
Florian Hahn 4184b2e034 [DSE,MSSA] Add additional test cases for multi-path elimination (NFC).
This adds additional test cases for more scenarios and also with objects
that are accessible after the functions return and allocas.
2020-04-08 15:26:26 +01:00
Simon Pilgrim 898e22908c [MemorySSA] invariant-groups.ll - add missing check to fix issue reported on D77354 2020-04-08 15:18:04 +01:00
Florian Hahn bbbec71609 [DSE.MSSA] Only use callCapturesBefore for calls.
callCapturesBefore always returns ModRef , if UseInst isn't a call. As
we only call it if we already know Mod is set, this only destroys the
Must bit for non-calls.
2020-04-08 15:12:33 +01:00
Florian Hahn a6353fdf3b [DSE,MSSA] Hoist getMemoryAccess call (NFC). 2020-04-08 15:10:05 +01:00
Clement Courbet 7c6514bc22 [llvm-exegesis] Fix build with !HAS_LIBPFM.
Fixes 9fb871866e.
2020-04-08 16:02:11 +02:00
Simon Pilgrim 0c2ab63689 [CodeExtractor] Fix typo in check label to fix issue reported on D77354 2020-04-08 14:59:15 +01:00
Alexey Lapshin 0ed2170dc4 [DWARFLinker][dsymutil] followup for 88c2137b6d
That patch is a followup for "Move DwarfStreamer into DWARFLinker".
It fixes build with LLVM_LINK_LLVM_DYLIB.
2020-04-08 16:46:52 +03:00
Clement Courbet 9fb871866e [llvm-exegesis][NFC] Let the pfm::Counter own the PerfHelper.
A perf helper is always only ever cretaed to be checked for validity
then passed as Counter ctor argument, never to be touched again.
Its lifetime should outlive that of the counter, and there is never any
reason to have two different counters of top of the perf helper.
Make sure these assumptions always hold by making the Counter consume the
PerfHelper.
2020-04-08 15:37:30 +02:00
Stefan Pintilie 6c4b40def7 [PowerPC][Future] Add Support For Functions That Do Not Use A TOC.
On PowerPC most functions require a valid TOC pointer.

This is the case because either the function itself needs to use this
pointer to access the TOC or because other functions that are called
from that function expect a valid TOC pointer in the register R2.
The main exception to this is leaf functions that do not access the TOC
since they are guaranteed not to need a valid TOC pointer.

This patch introduces a feature that will allow more functions to not
require a valid TOC pointer in R2.

Differential Revision: https://reviews.llvm.org/D73664
2020-04-08 08:07:35 -05:00
Sanjay Patel 5c472420b6 [LangRef] update text for shufflevector
D72467 updated the shufflevector instruction to include a constant mask
rather than a mask operand. The LangRef text was vague enough to still
make sense, but it is better to update here too, so there's no confusion
about valid mask values. The text here is adapted from the documentation
code comments for "class ShuffleVectorInst".

Differential Revision: https://reviews.llvm.org/D77396
2020-04-08 09:01:01 -04:00
Sanjay Patel a1c05fe20f [InstCombine] exclude bitcast of ppc_fp128 in icmp signbit fold
Based on the post-commit comments for rG0f56bbc, there might
be a problem with this transform:

(bitcast (fpext/fptrunc X)) to iX) < 0 --> (bitcast X to iY) < 0

...and the ppc_fp128 data type, so conservatively bypass if we
are bitcasting a ppc_fp128.

We might be able to account for endian or other differences to
enable this for PowerPC again if that is useful.

Differential Revision: https://reviews.llvm.org/D77642
2020-04-08 08:56:19 -04:00
Clement Courbet d2d808d2ef [llvm-exegesis][NFC] Remove dead code. 2020-04-08 14:29:26 +02:00
Simon Pilgrim 7e62684251 [AMDGPU] Regenerate vector-extract-insert test checks to fix issue reported on D77354 2020-04-08 13:18:32 +01:00