3 Commits

Author	SHA1	Message	Date
Sam Parker	3b2ba20afd	[ARM] Run ARMParallelDSP in the IRPasses phase ... Run EarlyCSE before ParallelDSP and do this in the backend IR opt phase. Differential Revision: https://reviews.llvm.org/D59257 llvm-svn: 356130	2019-03-14 10:57:40 +00:00
Sam Parker	3fbacd4964	[NFC][ARM] Simplify loop-indexing codegen test ... Remove unnecessary offset checks, CHECK-BASE checks and add some extra -NOT checks and TODO comments. llvm-svn: 353689	2019-02-11 10:52:49 +00:00
Sam Parker	67756c09f2	[LSR] Generate cross iteration indexes ... Modify GenerateConstantOffsetsImpl to create offsets that can be used by indexed addressing modes. If formulae can be generated which result in the constant offset being the same size as the recurrence, we can generate a pre-indexed access. This allows the pointer to be updated via the single pre-indexed access so that (hopefully) no add/subs are required to update it for the next iteration. For small cores, this can significantly improve performance DSP-like loops. Differential Revision: https://reviews.llvm.org/D55373 llvm-svn: 353403	2019-02-07 13:32:54 +00:00