Commit Graph

211542 Commits

Author SHA1 Message Date
Johannes Doerfert 91ad092bb2 [NFC] Remove unused SCoP diagnostic
llvm-svn: 248694
2015-09-28 01:29:44 +00:00
Craig Topper 862d5d8322 Remove 'const' from some ArrayRefs. ArrayRefs are already immutable. NFC
llvm-svn: 248693
2015-09-28 00:15:34 +00:00
Justin Bogner d7d1a72f66 AsmWriter: Print the argument names in declarations while debugging
When llvm declarations have argument names, it's helpful to actually
print those names when debugging. Arguably, it'd be nice to print them
all the time, but that would mean the IR we output wouldn't round trip
through bitcode, which doesn't store the names.

Make the varous print() methods in AsmWriter optionally print "for
debug" and set that flag in the dump() methods. The only thing this
does differently for now is print the argument names in declarations.

llvm-svn: 248692
2015-09-27 22:38:50 +00:00
Yaron Keren e5a9dc2f5b Silence clang warning: variable ‘Status’ set but not used.
llvm-svn: 248691
2015-09-27 21:31:33 +00:00
Sanjoy Das f1090b6061 [SCEV] identical instructions don't compute equal values
Before this change `HasSameValue` would return true for distinct
`alloca` instructions if they happened to be allocating the same
type (`alloca` instructions are not specified as reading memory).  This
change adds an explicit whitelist of instruction types for which
"identical" instructions compute the same value.

Fixes PR24952.

llvm-svn: 248690
2015-09-27 21:09:48 +00:00
Sanjay Patel 9533407566 [InstCombine] fold zexts and constants into a phi (PR24766)
This is one step towards solving PR24766:
https://llvm.org/bugs/show_bug.cgi?id=24766

We were not producing the same IR for these two C functions because the store
to the temp bool causes extra zexts:

#include <stdbool.h>

bool switchy(char x1, char x2, char condition) {
   bool conditionMet = false;
   switch (condition) {
   case 0: conditionMet = (x1 == x2); break;
   case 1: conditionMet = (x1 <= x2); break;
   }
   return conditionMet;
}

bool switchy2(char x1, char x2, char condition) {
   switch (condition) {
   case 0: return (x1 == x2);
   case 1: return (x1 <= x2);
   }
  return false;
}

As noted in the code comments, this test case manages to avoid the more general existing
phi optimizations where there are only 2 phi inputs or where there are no constant phi 
args mixed in with the casts ops. It seems like a corner case, but if we don't catch it, 
then I don't think we can get SimplifyCFG to further optimize towards the canonical form
for this function shown in the bug report.

Differential Revision: http://reviews.llvm.org/D12866

llvm-svn: 248689
2015-09-27 20:34:31 +00:00
Tobias Grosser 0722a1e5d5 BlockGenerator: Be less agressive with deleting dead instructions
We now only delete trivially dead instructions in the BB we copy (copyBB), but
not in any other BB.  Only for copyBB we know that there will _never_ be any
future uses of instructions that have no use after copyBB has been generated.
Other instructions in the AST that have been generated by IslNodeBuilder may
look dead at the moment, but may possibly still be referenced by GlobalMaps. If
we delete them now, later uses would break surprisingly.

We do not have a test case that breaks due to us deleting too many instructions.
This issue was found by inspection.

llvm-svn: 248688
2015-09-27 19:50:16 +00:00
Tobias Grosser a43b6e935c Drop unused variable
llvm-svn: 248687
2015-09-27 17:54:50 +00:00
Saleem Abdulrasool 0165015f6c builtins: silence GCC warning
If the builtins are built with libgcc as the unwind provider on ARM, the exposed
_Unwind_SetIP is a macro.  This results in the following warning due to
expansion of the argument:

warning: suggest parentheses around arithmetic in operand of ‘|’ [-Wparentheses]

Add a no-op set of parenthesis around the argument that will prevent this
warning.

llvm-svn: 248686
2015-09-27 17:16:46 +00:00
Johannes Doerfert 45be64464b [NFC] Consistenly use commented and annotated ScopPass functions
The changes affect methods that are part of the Pass interface and
  include:
    - Comments that describe the methods purpose.
    - A consistent use of the keywords override and virtual.
  Additionally, the printScop method is now optional and removed from
  SCoP passes that do not implement it.

llvm-svn: 248685
2015-09-27 15:43:29 +00:00
Johannes Doerfert 0f37630849 [NFC] Use releaseMemory to release internal memory
llvm-svn: 248684
2015-09-27 15:42:28 +00:00
Tobias Grosser 0ff79e586d BlockGenerator: Simplify code generated for region statements
After having generated a new user statement a couple of inefficient or
trivially dead instructions may remain. This commit runs instruction
simplification over the newly generated blocks to ensure unneeded
instructions are removed right away.

This commit does adds simplification for non-affine subregions which was not
yet part of 248681.

llvm-svn: 248683
2015-09-27 11:35:00 +00:00
Tobias Grosser 412f9774f8 [CodeGen test] Replace undef values with some defined constants
Otherwise, part of the computation will be just simplified away when we add
instruction simplification support to the RegionGenerator.

llvm-svn: 248682
2015-09-27 11:34:53 +00:00
Tobias Grosser 1b9d25a42d BlockGenerator: Simplify code generated for scop statements
After having generated a new user statement a couple of inefficient or trivially
dead instructions may remain. This commit runs instruction simplification over
the newly generated blocks to ensure unneeded instructions are removed right
away.

This commit does not yet add simplification for non-affine subregions.

llvm-svn: 248681
2015-09-27 11:17:22 +00:00
Davide Italiano aabc45b5ad [ELF] Sort a list of cases alphabetically for consistency/clarity. NFC.
llvm-svn: 248680
2015-09-27 09:01:28 +00:00
Davide Italiano 1d750a6fc3 [ELF2/AArch64] Support for R_AARCH64_ADR_PREL_LO21 relocation.
llvm-svn: 248679
2015-09-27 08:45:38 +00:00
Craig Topper c005cc06cd Use llvm::makeArrayRef. NFC.
llvm-svn: 248678
2015-09-27 03:44:08 +00:00
Joseph Tremoulet 09af67aba5 [EH] Create removeUnwindEdge utility
Summary:
Factor the code that rewrites invokes to calls and rewrites WinEH
terminators to their "unwind to caller" equivalents into a helper in
Utils/Local, and use it in the three places I'm aware of that need to do
this.


Reviewers: andrew.w.kaylor, majnemer, rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13152

llvm-svn: 248677
2015-09-27 01:47:46 +00:00
Todd Fiala d47346d0f8 Added python script to support running pylint.
See the script comments for how to modify your
pylintrc file (e.g. $HOME/.pylintrc) to support
always finding the lldb-specific Python library
directories.

With the pylintrc modification using this script,
the lldb python tests and test inferstructure can
be linted on any of potentially multiple lldb source
trees on the system without further work from
the developer.  

llvm-svn: 248676
2015-09-26 23:00:35 +00:00
Johannes Doerfert 284e67828f [NFC] Remove obsolete member
llvm-svn: 248675
2015-09-26 20:58:29 +00:00
Johannes Doerfert fb19dd694c Create parallel code in a separate block
This commit basically reverts r246427 but still solves the issue
  tackled by that commit. Instead of emitting initialization code in the
  beginning of the start block we now generate parallel code in its own
  block and thereby guarantee separation. This is necessary as we cannot
  generate code for hoisted loads prior to the start block but it still
  needs to be placed prior to everything else.

llvm-svn: 248674
2015-09-26 20:57:59 +00:00
Vasileios Kalintiris 8518eb54f3 unwind: Allow the building of libunwind for MIPS.
Summary:
Currently, libunwind doesn't support MIPS. However, with this patch
we do allow the library to build, and we warn the user about the lack of
support for MIPS. Also, the dummy unw_getcontext() implementation for MIPS just
traps on function entry in order to avoid any confusion with silent/weird
failures at runtime.

This allows us to test an LLVM-based toolchain without the dependency on a
GCC toolchain. Of course, C++ exception handling and other things that depend
on stack unwinding will not work until we add a proper implementation of the
stub functions.

Reviewers: compnerd, logan

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D13160

llvm-svn: 248673
2015-09-26 18:26:01 +00:00
Simon Pilgrim 91717ee233 [InstCombine] Removed unnecessary meta attributes.
llvm-svn: 248672
2015-09-26 17:49:04 +00:00
Daniel Sanders 4fe1c8b24e [llvm-mc-fuzzer] Fix -jobs option.
The fuzzer argument parser will ignore all options starting with '--' so
operation mode options should begin with '--' and fuzzer options should begin
with '-'. Fuzzer arguments must still follow --fuzzer-args so that they escape
the parsing performed by the CommandLine library.

llvm-svn: 248671
2015-09-26 17:09:01 +00:00
Michael Kruse caac2b6930 Fix typo
llvm-svn: 248670
2015-09-26 15:51:44 +00:00
Tobias Grosser 06c495c2b0 Add test case from llvm.org/PR17187
The new domain construction algorithm now correctly models this test case (and
derives an empty run-time condition). Add this test case to ensure we do not
regress.

llvm-svn: 248669
2015-09-26 14:27:54 +00:00
Johannes Doerfert 12155a9ef4 Add test case from open bug
The bug (15771) was fixed already with the new domain generation
  but the test case was not added till now.

llvm-svn: 248668
2015-09-26 14:03:29 +00:00
Johannes Doerfert c6987c18de [FIX] Use the surrounding loop for non-affine SCoP regions
When the whole SCoP is a non-affine region we need to use the
  surrounding loop in the construction of the schedule as that is
  the one that will be looked up after the schedule generation.

  This fixes bug 24947

llvm-svn: 248667
2015-09-26 13:41:43 +00:00
NAKAMURA Takumi b396b3102f clang/test/Driver/arm-compiler-rt.c: Relax expressions for dos path.
llvm-svn: 248666
2015-09-26 11:17:32 +00:00
Benjamin Kramer 2a63631abd [BranchProbability] Manually round the floating point output.
llvm::format compiles down to snprintf which has no defined rounding for
floating point arguments, and MSVC has implemented it differently from
what the BSD libcs and glibc do. Try to emulate the glibc rounding
behavior to avoid changing tests.

While there simplify code a bit and move trivial methods inline.

llvm-svn: 248665
2015-09-26 10:09:36 +00:00
NAKAMURA Takumi 00eecb88a4 lld/test/elf2/basic-aarch64.s should not REQUIRE x86.
FIXME: The feature "arm64" is not activated in lit.cfg.
llvm-svn: 248664
2015-09-26 09:21:58 +00:00
Tobias Grosser bbda083c75 Add test case for delinearization through bitcasts
This was forgotten in r247928

llvm-svn: 248663
2015-09-26 08:55:59 +00:00
Tobias Grosser 99c70dd8d1 Ensure memory accesses to the same array have identical dimensionality
When recovering multi-dimensional memory accesses, it may happen that different
accesses to the same base array are recovered with different dimensionality.
This patch ensures that the dimensionalities are unified by adding zero valued
dimensions to acesses with lower dimensionality. When starting to model
fixed-size arrays as multi-dimensional in 247906, this has not been taken
care of.

llvm-svn: 248662
2015-09-26 08:55:54 +00:00
Craig Topper 19e1261043 Revert part of r248660 as using None didn't work with the ArrayRef being returned as an Optional.
llvm-svn: 248661
2015-09-26 05:42:17 +00:00
Craig Topper 5b7183551f Use None to avoid re-mentioning the ArrayRef type to call the default constructor.
llvm-svn: 248660
2015-09-26 05:22:17 +00:00
Craig Topper f36a5c4af7 Remove move constructor and assignment operator from SourceMappingRegion. The types of the fields are trivially copyable. NFC
llvm-svn: 248659
2015-09-26 05:10:16 +00:00
Craig Topper 462c77b40c Fix a couple other places that were returning SourceLocation by reference. NFC
llvm-svn: 248658
2015-09-26 05:10:14 +00:00
Matt Arsenault 1d36b717a5 AMDGPU: Remove hasPostISelHook from most instructions
Since this is only needed for VOP3 and a few other special
case instructions, stop setting it on everything.

llvm-svn: 248657
2015-09-26 05:06:48 +00:00
Matt Arsenault f32481372c AMDGPU: Switch over reg class size instead of checking all super classes
This gets isSGPRClass out of my profile of SIFixSGPRCopies.

llvm-svn: 248656
2015-09-26 04:59:04 +00:00
Matt Arsenault 6e28010215 AMDGPU: Don't handle invalid reg classes in helper functions
No tests hit these and it would be better to have checks like
this explicit where they are used.

llvm-svn: 248655
2015-09-26 04:53:30 +00:00
Saleem Abdulrasool f88e4fabb5 build: separate flags
This somehow worked with the build on Linux, but seems to fail on the buildbots.
Split the flags apart here as otherwise the two flags are treated as one, and
cause a compilation failure.

llvm-svn: 248654
2015-09-26 04:40:45 +00:00
Saleem Abdulrasool 29e12a1128 sanitizer: fix -pedantic warnings
Silence a few "warning: extra ';'" warnings from GCC.

llvm-svn: 248653
2015-09-26 04:40:42 +00:00
Saleem Abdulrasool 9174623b2d AMDGPU: address -Winconsistent-missing-override
Add missing override.  NFC.

llvm-svn: 248652
2015-09-26 04:34:52 +00:00
Matt Arsenault 8e1ddf84fe AMDGPU: Set CopyCost of register classes
These require multiple mov instructions to copy,
but the default value is that 1 instruction is needed.
I'm not sure if this actually changes anything.

llvm-svn: 248651
2015-09-26 04:09:34 +00:00
Chen Li 7452d95656 [Bug 24848] Use range metadata to constant fold comparisons between two values
Summary:
This is the second part of fixing bug 24848 https://llvm.org/bugs/show_bug.cgi?id=24848.

If both operands of a comparison have range metadata, they should be used to constant fold the comparison.

Reviewers: sanjoy, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13177

llvm-svn: 248650
2015-09-26 03:26:47 +00:00
Saleem Abdulrasool d44901f21b Driver: support ARM/HF on a single toolchain
ARM EABI adds target attributes to the object file.  Amongst the attributes that
are emitted is the VFP argument passing (Hard vs Soft).  The linker is
responsible for checking these attributes and erroring on mismatches.  This
causes problems for the compiler-rt builtins when targeting both hard and
soft.  Because both of these options name the builtins compiler-rt component
the same (libclang_rt.builtins-arm.a or libclang_rt.builtins-arm-android).  GCC
is able to get away with this as it does one target per toolchain.  This
changes the naming convention for the ARM compiler-rt builtins to differentiate
between HF and Soft.  Although this means that compiler-rt may be duplicated, it
enables supporting both variants from a single toolchain.  A similar approach is
taken by the Darwin toolchain, naming the library to differentiate between the
calling conventions.

llvm-svn: 248649
2015-09-26 03:26:44 +00:00
Saleem Abdulrasool 96c5023e53 build: create two versions of ARM builtins
This adds a new name for ARM32 (armhf).  We now force that the default build for
ARM32 (arm) to be soft-float ABI.  This has a corresponding clang change to look
for these names based on the floating point ABI.  The functions are built
identically (the functions are marked as AAPCS, so the calling convention does
not change, as per the RTABI specification), however, the object file contains
attributes indicating the build configuration which the linker will ensure are
not mix and matched.  We now built the appropriate named archive so that we can
link properly.

llvm-svn: 248648
2015-09-26 03:26:01 +00:00
Matt Arsenault e98a074c42 AMDGPU: VOP3b definition cleanups
llvm-svn: 248647
2015-09-26 02:25:48 +00:00
Matt Arsenault 86095b8dec AMDGPU: Fix sched model for VOP2b instructions
Trying to use the version with the explicit output operand
would complain because of the missing WriteSALU. I'm not sure
why it doesn't complain about this with the implicit VCC def.

llvm-svn: 248646
2015-09-26 02:25:45 +00:00
Eric Christopher 583a1f72c7 Replace a loop and temporary string copying with llvm::join.
llvm-svn: 248645
2015-09-26 01:25:08 +00:00