5 Commits

Author	SHA1	Message	Date
Matt Arsenault	4c519d3518	AMDGPU/R600: Replace barrier intrinsics ... llvm-svn: 275870	2016-07-18 18:34:59 +00:00
Matt Arsenault	d1097a38e2	AMDGPU: Cleanup load tests ... There are a lot of different kinds of loads to test for, and these were scattered around inconsistently with some redundancy. Try to comprehensively test all loads in a consistent way. llvm-svn: 271571	2016-06-02 19:54:26 +00:00
Matt Arsenault	6689abe632	AMDGPU: Run r600 tests last ... llvm-svn: 268672	2016-05-05 20:07:37 +00:00
Matt Arsenault	26f8f3db39	AMDGPU: Rework how private buffer passed for HSA ... If we know we have stack objects, we reserve the registers that the private buffer resource and wave offset are passed and use them directly. If not, reserve the last 5 SGPRs just in case we need to spill. After register allocation, try to pick the next available registers instead of the last SGPRs, and then insert copies from the inputs to the reserved registers in the progloue. This also only selectively enables all of the input registers which are really required instead of always enabling them. llvm-svn: 254331	2015-11-30 21:16:03 +00:00
Tom Stellard	45bb48ea19	R600 -> AMDGPU rename ... llvm-svn: 239657	2015-06-13 03:28:10 +00:00