llvm-project

Commit Graph

Author	SHA1	Message	Date
Matthias Braun	f1141285eb	MIRTests: Remove unnecessary 2>&1 redirection llc mir output goes to stdout nowadays, so the 2>&1 is not necessary anymore for most tests. llvm-svn: 295859	2017-02-22 18:47:41 +00:00
Dylan McKay	1e57fa487b	[AVR] Add an 'relax memory operation' pass Summary: This pass will be used to relax instructions which use out of bounds memory accesses to equivalent operations that can work with the addresses. The pass currently implements relaxation for the STDWPtrQRr instruction. Without this pass, an assertion error would be hit in the pseudo expansion pass. In the future, we will need to add more instructions to this pass. We can do that on a case-by-case basic. Reviewers: arsenm, kparzysz Subscribers: wdng, llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D27650 llvm-svn: 289517	2016-12-13 05:53:14 +00:00

Author

SHA1

Message

Date

Matthias Braun

f1141285eb

MIRTests: Remove unnecessary 2>&1 redirection

llc mir output goes to stdout nowadays, so the 2>&1 is not necessary
anymore for most tests.

llvm-svn: 295859

2017-02-22 18:47:41 +00:00

Dylan McKay

1e57fa487b

[AVR] Add an 'relax memory operation' pass

Summary:
This pass will be used to relax instructions which use out of bounds
memory accesses to equivalent operations that can work with the
addresses.

The pass currently implements relaxation for the STDWPtrQRr instruction.

Without this pass, an assertion error would be hit in the pseudo expansion pass.

In the future, we will need to add more instructions to this pass. We can do
that on a case-by-case basic.

Reviewers: arsenm, kparzysz

Subscribers: wdng, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D27650

llvm-svn: 289517

2016-12-13 05:53:14 +00:00

2 Commits