Commit Graph

303527 Commits

Author SHA1 Message Date
Adrian Prantl d125316771 Typo
llvm-svn: 347058
2018-11-16 16:19:08 +00:00
Adrian Prantl ddc01238b1 Use a shared module cache directory for LLDB.
This saves about 3 redundant gigabytes from the Objective-C test build
directories. Tests that must do unsavory things with the LLDB clang
module cache, already specify a per-test module cache in their .py
test instructions.

<rdar://problem/36002081>

Differential Revision: https://reviews.llvm.org/D54602

llvm-svn: 347057
2018-11-16 16:19:07 +00:00
Adrian Prantl d1b33162b5 Makefile.rules: Use a shared clang module cache directory.
Just to be safe, up until now each test used its own Clang module
cache directory. Since the compiler within one testsuite doesn't
change it is just as safe to share a clang module directory inside the
LLDB test build directory. This saves us from compiling tens of
gigabytes of redundant Darwin and Foundation .pcm files and also
speeds up running the test suite quite significantly.

rdar://problem/36002081

Differential Revision: https://reviews.llvm.org/D54601

llvm-svn: 347056
2018-11-16 16:19:07 +00:00
Sanjay Patel 5ebd2a785e [InstSimplify] add test to demonstrate undef matching differences; NFC
This is a baseline test for D54631.
Patch by:
@nikic (Nikita Popov)

llvm-svn: 347055
2018-11-16 15:35:58 +00:00
Simon Pilgrim bcd6631a2a [X86][SSE] Move number of input limit out of resolveTargetShuffleInputs.
Only combineX86ShufflesRecursively needs this limit.

llvm-svn: 347054
2018-11-16 15:01:05 +00:00
Alexander Kornienko 12354c910c [clang-tidy] Expanded a test NFC
Expanded the readability-inconsistent-declaration-parameter-name-macros.cpp to
check notes and added a test with pasted tokens.

llvm-svn: 347053
2018-11-16 14:57:51 +00:00
Louis Dionne 91c0a462d8 [libcxx] Mention restriction on inline namespaces in LIBCXX_ABI_NAMESPACE docs
I also kept the original "vague" documentation that saying that users are
responsible for not breaking us. This doesn't mean anything because there's
no way they can actually enforce that unless we restrict ourselves to a
specific naming scheme, but I left the documentation because it acts as a
good warning and gives us more leeway.

llvm-svn: 347052
2018-11-16 14:57:47 +00:00
Sanjay Patel 8da76a6581 [x86] regenerate complete checks for test; NFC
llvm-svn: 347051
2018-11-16 14:44:20 +00:00
Than McIntosh 4a1c5da7ac [IRVerifier] Allow StructRet in statepoint
Summary:
StructRet attribute is not allowed in vararg calls. The statepoint
intrinsic is vararg, but the wrapped function may be not. Allow
calls of statepoint with StructRet arg, as long as the wrapped
function is not vararg.

Reviewers: thanm, anna

Reviewed By: anna

Subscribers: anna, llvm-commits

Differential Revision: https://reviews.llvm.org/D53602

llvm-svn: 347050
2018-11-16 14:28:05 +00:00
Simon Atanasyan 705fbd5d4f [DWARF] Use PRIx64 instead of 'x' to format 64-bit values
This is a follow-up to r346715. Use PRIx64 to formatted print of 64-bit
value in the `DWARFDebugLoclists::LocationList::dump` to escape problem
on big-endian hosts.

llvm-svn: 347049
2018-11-16 13:14:26 +00:00
Roman Lebedev 90c5b3f78e [X86] X86DAGToDAGISel::matchBitExtract(): extract 'lshr' from `X`
Summary:
As discussed in previous review, and noted in the FIXME, if `X` is actually an `lshr Y, Z` (logical!),
we can fold the `Z` into 'control`, and let the `BEXTR` do this too.
We could just insert those 8 bits of shift amount into control,
but it is better to instead zero-extend them, and 'or' them in place.

We can only do this for `lshr`, not `ashr`, because we do not know that the mask cover only the bits of `Y`,
and not any of the sign-extended bits.

The obvious question is, is this actually legal to do?
I believe it is. Relevant quotes, from `Intel® 64 and IA-32 Architectures Software Developer’s Manual`, `BEXTR — Bit Field Extract`:
* `Bit 7:0 of the second source operand specifies the starting bit position of bit extraction.`
* `A START value exceeding the operand size will not extract any bits from the second source operand.`
* `Only bit positions up to (OperandSize -1) of the first source operand are extracted.`
* `All higher order bits in the destination operand (starting at bit position LENGTH) are zeroed.`
* `The destination register is cleared if no bits are extracted.`

FIXME: if we can do this, i wonder if we should prefer `BEXTR` over `BZHI` in such cases.

Reviewers: RKSimon, craig.topper, spatel, andreadb

Reviewed By: RKSimon, craig.topper, andreadb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54095

llvm-svn: 347048
2018-11-16 13:04:54 +00:00
Henry Wong 831be096c7 [lldb] NFC: Remove the extra ';'
Summary:
Remove extra `;` to eliminate the following pedantic warning.

```
warning: extra ';' [-Wpedantic]

```

Reviewers: shafik

Reviewed By: shafik

Subscribers: abidh, lldb-commits

Differential Revision: https://reviews.llvm.org/D54528

llvm-svn: 347047
2018-11-16 13:01:57 +00:00
Benjamin Kramer 9dfe32e41c Remove BUILD file from google-benchmark
This was removed in r336666, but accidentally re-added in r346984.

llvm-svn: 347046
2018-11-16 12:53:17 +00:00
Simon Pilgrim 3c8baf4f90 [TargetLowering] Cleanup more of the EXTEND demanded bits cases so that they match. NFCI.
Use the same variable names etc.

llvm-svn: 347045
2018-11-16 12:26:26 +00:00
Haojian Wu 22c9f7b296 [clangd] Truncate SymbolID to 8 bytes.
Summary:
This is our goal. It has a non-zero rick, but so far we haven't see any
collision (externally and internally).

Reviewers: sammccall

Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D54622

llvm-svn: 347044
2018-11-16 10:58:40 +00:00
Alex Bradbury b4a64cede8 [RISCV][NFC] Define and use the new CA instruction format
The RISC-V ISA manual was updated on 2018-11-07 (commit 00557c3) to define a 
new compressed instruction format, RVC format CA (no actual instruction 
encodings were changed). This patch updates the RISC-V backend to define the 
new format, and to use it in the relevant instructions.

Differential Revision: https://reviews.llvm.org/D54302
Patch by Luís Marques.

llvm-svn: 347043
2018-11-16 10:33:23 +00:00
Alex Bradbury 2146e8fb1e [RISCV] Constant materialisation for RV64I
This commit introduces support for materialising 64-bit constants for RV64I,
making use of the RISCVMatInt::generateInstSeq helper in order to share logic
for immediate materialisation with the MC layer (where it's used for the li
pseudoinstruction).

test/CodeGen/RISCV/imm.ll is updated to test RV64, and gains new 64-bit
constant tests. It would be preferable if anyext constant returns were sign
rather than zero extended (see PR39092). This patch simply adds an explicit
signext to the returns in imm.ll.

Further optimisations for constant materialisation are possible, most notably
for mask-like values which can be generated my loading -1 and shifting right.
A future patch will standardise on the C++ codepath for immediate selection on
RV32 as well as RV64, and then add further such optimisations to
RISCVMatInt::generateInstSeq in order to benefit both RV32 and RV64 for
codegen and li expansion.

Differential Revision: https://reviews.llvm.org/D52962

llvm-svn: 347042
2018-11-16 10:14:16 +00:00
Anton Korobeynikov 411773d227 [MSP430] Add support for .refsym directive
Introduces support for '.refsym' assembler directive.

From GCC docs (for MSP430):
'.refsym' - This directive instructs assembler to add an undefined reference
to the symbol following the directive. No relocation is created for this symbol;
it will exist purely for pulling in object files from archives.

Patch by Kristina Bessonova!

Differential Revision: https://reviews.llvm.org/D54618

llvm-svn: 347041
2018-11-16 09:50:24 +00:00
Anton Korobeynikov cad2b83182 [MSP430] Add more tests for ABI and calling convention
Patch by Kristina Bessonova!

Differential Revision: https://reviews.llvm.org/D54582

llvm-svn: 347040
2018-11-16 09:47:58 +00:00
Haojian Wu 1bf52c59b7 [clangd] Fix a compiler warning and test crashes caused in rL347038.
llvm-svn: 347039
2018-11-16 09:41:14 +00:00
Kadir Cetinkaya 06553bfe96 Introduce shard storage to auto-index.
Reviewers: sammccall, ioeric

Reviewed By: sammccall

Subscribers: llvm-commits, mgorny, Eugene.Zelenko, ilya-biryukov, jkorous, arphaman, cfe-commits

Differential Revision: https://reviews.llvm.org/D54269

llvm-svn: 347038
2018-11-16 09:03:56 +00:00
Sam Parker ab99cfab21 [DAGCombine] Fix non-deterministic debug output
PR37970 reported non-deterministic debug output, this was caused by
iterating through a set and not a a vector.

bugzilla: https://bugs.llvm.org/show_bug.cgi?id=37970

Differential Revision: https://reviews.llvm.org/D54570

llvm-svn: 347037
2018-11-16 08:35:19 +00:00
Sam McCall 98ae975187 [clangd] Initial clang-tidy diagnostics support.
Summary:
This runs checks over a restricted subset of the TU:
 - preprocessor callbacks just receive the truncated PP events that
   occur when a preamble is used.
 - ASTMatchers run only over the top-level decls in the main-file

This patch just turns on one simple check (bugprone-sizeof-expression)
with no configuration. Configuration is complex enough to warrant a separate patch

This depends on a patch allowing traversal to be restricted to a scope.

Reviewers: hokein

Subscribers: srhines, mgorny, ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D54204

llvm-svn: 347036
2018-11-16 08:32:23 +00:00
George Rimar 9982e3b944 [clang] - Simplify tools::SplitDebugName.
This should be NFC change.

SplitDebugName recently started to accept the `Output` that
can be used to simplify the logic a bit, also it
seems that code in SplitDebugName that uses
OPT_fdebug_compilation_dir is simply dead.

Differential revision: https://reviews.llvm.org/D54576

llvm-svn: 347035
2018-11-16 07:59:24 +00:00
Craig Topper bac7d9735a [LegalizeVectorTypes] Teach WidenVecRes_Convert to turn ANY_EXTEND into ANY_EXTEND_VECTOR_INREG when the input and output types need to be widened to the same width.
If we don't do it here, DAGCombine will just end up creating it from the scalar any_extend+build_vector so might as well save a step.

llvm-svn: 347034
2018-11-16 07:13:34 +00:00
Eugene Leviant bf46e7410c [ThinLTO] Internalize readonly globals
An attempt to recommit r346584 after failure on OSX build bot.
Fixed cache key computation in ThinLTOCodeGenerator and added
test case

llvm-svn: 347033
2018-11-16 07:08:00 +00:00
Craig Topper 079c37da58 [X86] Add custom type legalization for v2i8/v4i8/v8i8 mul under -x86-experimental-vector-widening.
By early promoting the multiply to use an i16 element type we can avoid op legalization emit a second multiply for the 8 upper elements of the v16i8 type we would otherwise get.

llvm-svn: 347032
2018-11-16 06:15:21 +00:00
Craig Topper dc957d49f9 [X86] Add some test cases for vector multiplies on vectors shorter than 128 bits with -x86-experimental-vector-widening-legalization.
llvm-svn: 347031
2018-11-16 06:15:20 +00:00
Simon Atanasyan 275a5b442b [ELF][MIPS] Use MIPS R6 `sigrie` as a trap instruction
Current value using as a trap instruction (0xefefefef) is not a good choice
for MIPS because it's a valid MIPS instruction `swc3 $15,-4113(ra)`. This
patch replaces 0xefefefef by 0x04170001. For all MIPS ISA revisions before
R6, this value is just invalid instruction. Starting from MIPS R6 it's
a valid instruction `sigrie 1` which signals a Reserved Instruction exception.

mips-traps.s test case is added to test trap encoding. Other test cases
are modified to remove redundant checking.

Differential revision: https://reviews.llvm.org/D54154

llvm-svn: 347029
2018-11-16 05:30:47 +00:00
Matt Arsenault eabb8dd015 AMDGPU: Fix analyzeBranch failing with pseudoterminators
If a block had one of the _term instructions used for gluing
exec modifying instructions to the end of the block,
analyzeBranch would fail, preventing the verifier from catching
a broken successor list.

llvm-svn: 347027
2018-11-16 05:03:02 +00:00
Petr Hosek d63e846212 [CMake] Support cross-compiling with Fuchsia toolchain build
When second stage is being cross-compiled for a different platform
we need to build enough of first stage runtimes to get a working
compiler.

Differential Revision: https://reviews.llvm.org/D54463

llvm-svn: 347026
2018-11-16 04:50:12 +00:00
Petr Hosek f8e27b3878 [CMake] Support cross-compiling with multi-stage builds
When using multi-stage builds, we would like support cross-compilation.
Example is 2-stage build when the first stage is compiled for host while
the second stage is compiled for the target.

Normally, the second stage would be also used for compiling runtimes,
but that's not possible when cross-compiling, so we use the first stage
compiler instead. However, we still want to use the second stage paths.
To do so, we set the -resource-dir of the first stage compiler to point
to the resource directory of the second stage.

We also need compiler tools that support the target architecture. These
tools are not guaranteed to be present on the host, but in case of
multi-stage build, we can build these tools in the first stage.

Differential Revision: https://reviews.llvm.org/D54461

llvm-svn: 347025
2018-11-16 04:46:48 +00:00
Petr Hosek 5f5c773765 [compiler-rt] Use exact spelling when building for default target
When building for default target only, use exact target spelling
when deriving the name for the per-target runtime directory. This
is necessary for AArch32 where the CMake build by default rewrites
the architecture which leads to unexpected results.

Differential Revision: https://reviews.llvm.org/D54612

llvm-svn: 347022
2018-11-16 04:14:23 +00:00
Petr Hosek 1ee2987abc [CMake] Use the correct spelling for armv7 in Fuchsia's toolchain
We need to explicitly specify the architecture version.

Differential Revision: https://reviews.llvm.org/D54613

llvm-svn: 347021
2018-11-16 04:09:47 +00:00
Zachary Turner 9fbf93508c Don't use uniform initialization syntax.
llvm-svn: 347020
2018-11-16 03:16:27 +00:00
Zi Xuan Wu 64d85a29ed [Clang][Sema]Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error
There are 2 function variations with vector type parameter. When we call them with argument of different vector type we would prefer to 
choose the variation with implicit argument conversion of compatible vector type instead of incompatible vector type. For example,

typedef float __v4sf __attribute__((__vector_size__(16)));
void f(vector float);
void f(vector signed int);

int main {
   __v4sf a;
   f(a);
}

Here, we'd like to choose f(vector float) but not report an ambiguous call error.

Differential revision: https://reviews.llvm.org/D53417

llvm-svn: 347019
2018-11-16 03:00:00 +00:00
Zachary Turner 6284aee9f8 [NativePDB] Rewrite the PdbSymUid to use our own custom namespacing scheme.
Originally we created our 64-bit UID scheme by using the first byte as
sort of a "tag" to represent what kind of symbol this was, and we
re-used the PDB_SymType enumeration for this.  For native pdb support,
this is not really the right abstraction layer, because what we really
want is something that tells us *how* to find the symbol.  This means,
specifically, is in the globals stream / public stream / module stream /
TPI stream / etc, and for whichever one it is in, where is it within
that stream?

A good example of why the old namespacing scheme was insufficient is
that it is more or less impossible to create a uid for a field list
member of a class/struction/union/enum that tells you how to locate
the original record.

With this new scheme, the first byte is no longer a PDB_SymType enum
but a new enum created specifically to identify where in the PDB
this record lives.  This gives us much better flexibility in
what kinds of symbols the uids can identify.

llvm-svn: 347018
2018-11-16 02:42:32 +00:00
Volodymyr Sapsai ab73426c68 [VFS] Update unittest to fix Windows buildbot.
Buildbot http://lab.llvm.org:8011/builders/clang-x64-windows-msvc is failing
because it doesn't like paths in VFS, make them more Windows-friendly.

Follow up to r347009.

llvm-svn: 347016
2018-11-16 02:20:33 +00:00
Craig Topper c93ae2b0a2 Revert r347014 "[X86] Add some test cases for vector multiplies on vectors shorter than 128 bits with -x86-experimental-vector-widening-legalization."
Apparently I failed to update this after turnign sign extend to any extend.

llvm-svn: 347015
2018-11-16 01:57:55 +00:00
Craig Topper 36920b44f7 [X86] Add some test cases for vector multiplies on vectors shorter than 128 bits with -x86-experimental-vector-widening-legalization.
llvm-svn: 347014
2018-11-16 01:52:32 +00:00
Artem Belevich d9e21fff62 Added missing whitespace in the link.
llvm-svn: 347013
2018-11-16 01:23:12 +00:00
Volodymyr Sapsai 7c5c3b1e0e [VFS] Implement `RedirectingFileSystem::getRealPath`.
It fixes the case when Objective-C framework is added as a subframework
through a symlink. When parent framework infers a module map and fails
to detect a symlink, it would add a subframework as a submodule. And
when we parse module map for the subframework, we would encounter an
error like

> error: umbrella for module 'WithSubframework.Foo' already covers this directory

By implementing `getRealPath` "an egregious but useful hack" in
`ModuleMap::inferFrameworkModule` works as expected.

LLVM commit is r347009.

rdar://problem/45821279

Reviewers: bruno, benlangmuir, erik.pilkington

Reviewed By: bruno

Subscribers: hiraditya, dexonsmith, JDevlieghere, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D54245

llvm-svn: 347012
2018-11-16 01:18:04 +00:00
Craig Topper 5802b82b40 [X86] Use ANY_EXTEND instead of SIGN_EXTEND in the AVX2 and later path for legalizing vXi8 multiply.
We aren't going to use the upper bits of the multiply result that the extend would effect. So we don't need a specific type of extend.

This makes some reduction test cases shorter because we were previously trying to sign_extend a truncate which we can't eliminate.

llvm-svn: 347011
2018-11-16 01:16:59 +00:00
Craig Topper 1acafd863f [X86] Update a couple comments to remove a mention of a sign extending that no longer happens. NFC
llvm-svn: 347010
2018-11-16 01:16:51 +00:00
Volodymyr Sapsai 7610033f56 [VFS] Implement `RedirectingFileSystem::getRealPath`.
It fixes the case when Objective-C framework is added as a subframework
through a symlink. When parent framework infers a module map and fails
to detect a symlink, it would add a subframework as a submodule. And
when we parse module map for the subframework, we would encounter an
error like

> error: umbrella for module 'WithSubframework.Foo' already covers this directory

By implementing `getRealPath` "an egregious but useful hack" in
`ModuleMap::inferFrameworkModule` works as expected.

rdar://problem/45821279

Reviewers: bruno, benlangmuir, erik.pilkington

Reviewed By: bruno

Subscribers: hiraditya, dexonsmith, JDevlieghere, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D54245

llvm-svn: 347009
2018-11-16 01:15:54 +00:00
Ron Lieberman cac749ac88 [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST
Add a pass to fixup various vector ISel issues.
Currently we handle converting GLOBAL_{LOAD|STORE}_*
and GLOBAL_Atomic_* instructions into their _SADDR variants.
This involves feeding the sreg into the saddr field of the new instruction.

llvm-svn: 347008
2018-11-16 01:13:34 +00:00
Artem Belevich 5d14b72d5c [CUDA] updated CompileCudaWithLLVM.rst
Differential Revision: https://reviews.llvm.org/D54608

llvm-svn: 347007
2018-11-16 01:02:43 +00:00
Kristof Umann 9d6c4402c6 [analyzer] ConversionChecker: handle floating point
Extend the alpha.core.Conversion checker to handle implicit converions
where a too large integer value is converted to a floating point type. Each
floating point type has a range where it can exactly represent all integers; we
emit a warning when the integer value is above this range. Although it is
possible to exactly represent some integers which are outside of this range
(those that are divisible by a large enough power of 2); we still report cast
involving those, because their usage may lead to bugs. (For example, if 1<<24
is stored in a float variable x, then x==x+1 holds.)

Patch by: Donát Nagy!

Differential Revision: https://reviews.llvm.org/D52730

llvm-svn: 347006
2018-11-16 01:00:55 +00:00
Heejin Ahn ad9d68c2b4 [WebAssembly] Change type of wake count to unsigned int
Summary:
We discussed this at the Nov 12th CG meeting, and decided to use the
unsigned semantics for the wake count.
Corresponding spec change:
https://github.com/WebAssembly/threads/pull/110

Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, sunfish, jfb, cfe-commits

Differential Revision: https://reviews.llvm.org/D54572

llvm-svn: 347005
2018-11-16 00:48:58 +00:00
Tom Stellard fb7d1a92e6 Re-apply r346985: [ADT] Drop llvm::Optional clang-specific optimization for trivially copyable types
Remove a test case that was added with the optimization we are now
removing.

llvm-svn: 347004
2018-11-16 00:47:24 +00:00