Commit Graph

416677 Commits

Author SHA1 Message Date
Akira Hatanaka d112cc2756 [NFC][Clang][OpaquePtr] Remove the call to Address::deprecated in
CreatePointerBitCastOrAddrSpaceCast

Differential Revision: https://reviews.llvm.org/D120757
2022-03-02 08:58:00 -08:00
Valentin Clement db48f7b2f7
[flang] Lower IO open and close statements
This patch adds the lowering of open and close statements

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D120821

Co-authored-by: Jean Perier <jperier@nvidia.com>
2022-03-02 17:57:08 +01:00
Marek Kurdej 13351fdf8c [clang-format] Recognize "if consteval".
Fixes https://github.com/llvm/llvm-project/issues/54140.

Reviewed By: MyDeveloperDay, JohelEGP

Differential Revision: https://reviews.llvm.org/D120806
2022-03-02 17:46:45 +01:00
Daniel McIntosh d636b76eca [CodeGen] Use AdjustStackOffset for Callee Saved Registers in PEI::calculateFrameObjectOffsets
Also, changes how the CSR loop is indexed, which should avoid bugs like the one fixed by rG4a57bb5a3b74bdad9b0518009a7d7ac7ca2ac650

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D120668
2022-03-02 11:41:12 -05:00
Nikita Popov 98cfcae4e9 Revert "[RISCV] Add cost modelling for masked memory op"
This reverts commit 76f243b53b.

The newly added test fails.
2022-03-02 17:32:10 +01:00
Simon Pilgrim 3c568ee659 [X86] Add XOP coverage for vector-popcnt tests 2022-03-02 16:25:26 +00:00
Florian Hahn 8777cb66a8
[VPlan] Remove reliance on underlying instr for ScalarIVSteps (NFCI).
Instead of relying on underlying instructions, this patch updates
VPScalarIVStepsRecipe to only store the required type information.

This removes access to unrelated information, as well as avoiding issues
with the same underlying instruction being shared by multiple recipes.

This change should only change the debug output and not cause any
codegen changes, hence NFCI.
2022-03-02 16:23:19 +00:00
Jay Foad 5ddfedc956 [AMDGPU] Fix deleting of move-immediate instructions after folding
SIInstrInfo::FoldImmediate tried to delete move-immediate instructions
after folding them into their only use. This did not work because it was
checking hasOneNonDBGUse after doing the fold, at which point there
should be no uses. This seems to have no effect on codegen, it just
means less stuff for DCE to clean up later.

Differential Revision: https://reviews.llvm.org/D120815
2022-03-02 16:11:16 +00:00
Simon Pilgrim 7848bf16fe [ObjectYAML] WasmWriter::writeSectionContent - use llvm::enumerate to fix 'side effect in assert' warning 2022-03-02 16:09:09 +00:00
Simon Pilgrim ca94f28d15 [clang] ExprEngine::VisitCXXNewExpr - remove superfluous nullptr tests
FD has already been dereferenced
2022-03-02 15:59:10 +00:00
Nikita Popov 6fde043951 [MachineSink] Disable if there are any irreducible cycles
This is an alternative to D120330, which disables MachineSink for
functions with irreducible cycles entirely. This avoids both the
correctness problem, and ensures we don't perform non-profitable
sinks into cycles. At the same time, it may also disable
profitable sinks in the same function. This can be made more
precise by using MachineCycleInfo in the future.

Fixes https://github.com/llvm/llvm-project/issues/53990.

Differential Revision: https://reviews.llvm.org/D120800
2022-03-02 16:57:29 +01:00
Alex Zinenko eb27da7dec [mlir] Ignore index data layout in translation to LLVM
It can be present, but is irrelevant for the translation.
2022-03-02 16:56:21 +01:00
Nikita Popov 61580d0949 Reapply [InstCombine] Remove one-use limitation from X-Y==0 fold
This is a recommit without changes. I originally reverted this
due to a significant code-size regression on tramp3d-v4, however
further investigation showed that in the tramp3d-v4 case this
change enables additional optimizations (in particular more
jump threading), which happens to reduce the size of a function
just enough to be eligible for inlining at hot callsites, which
results in the code size increase. As such, this was just bad
luck.

-----

This one-use limitation is artificial, we do not increase
instruction count if we perform the fold with multiple uses. The
motivating case is shown in @sub_eq_zero_select, where the one-use
limitation causes us to miss a subsequent select fold.

I believe the backend is pretty good about reusing flag-producing
subs for cmps with same operands, so I think doing this is fine.

Differential Revision: https://reviews.llvm.org/D120337
2022-03-02 16:43:33 +01:00
Simon Pilgrim 5cce97d61e [DAG] isSplatValue - improve ISD::VECTOR_SHUFFLE splat detection
Currently we only check for splat shuffles, this extends it to see if the source operand is a splat across the demanded elts based upon the shuffle mask
2022-03-02 15:32:24 +00:00
Arthur O'Dwyer 7624552ead [libc++] Explicitly reject URNG types with signed result_types.
Fixes #48965.

Differential Revision: https://reviews.llvm.org/D120630
2022-03-02 10:28:48 -05:00
spupyrev bcdc047731 speeding up ext-tsp for huge instances
Differential Revision: https://reviews.llvm.org/D120780
2022-03-02 07:17:48 -08:00
Alex Zinenko 59814a8c99 [mlir] more Bazel changes for 23aa5a7446 2022-03-02 16:16:14 +01:00
Chuanqi Xu 3eb2da76d7 [NFC] [C++20] [Modules] Simplify ActOnModuleImport by merging Path and Parition
Reviewed By: iains

Differential Revision: https://reviews.llvm.org/D120793
2022-03-02 23:06:36 +08:00
Momchil Velikov 63c9aca12a Revert "[AArch64] Async unwind - function epilogues"
This reverts commit 74319d6794.

It causes test failures that look like infinite loop in asan/hwasan
unwinding.
2022-03-02 15:01:57 +00:00
Florian Hahn 9e46866c0c
[LV] Remove dead EntryVal argument from buildScalarSteps (NFC).
The EntryVal argument is not needed after recent refactoring. Remove it.
2022-03-02 14:59:22 +00:00
Alex Tsao 76f243b53b [RISCV] Add cost modelling for masked memory op
The patch adds very basic cost model for masked memory op on scalable vector.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D117884
2022-03-02 22:48:41 +08:00
Pavel Labath e8784289c0 Revert "Remove a top-level "using namespace" from TargetTransformInfoImpl.h"
Causing failures on many bots.

This reverts commit 31efecfde9.
2022-03-02 15:47:41 +01:00
David Green 02de975259 [AArch64] Add some tests for the cost of extending an extract. NFC 2022-03-02 14:47:32 +00:00
Groverkss bb9013555f [MLIR][Presburger] Move functionality from IntegerPolyhedron to IntegerRelation
This patch moves all functionality from IntegerPolyhedron to IntegerRelation.
IntegerPolyhedron is now implemented as a relation with no domain. All existing
functionality is extended to work on relations.

This patch does not affect external users like FlatAffineConstraints as they
can still continue to use IntegerPolyhedron abstraction.

This patch is part of a series of patches to support relations in Presburger
library.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D120652
2022-03-02 20:10:44 +05:30
Pavel Labath 31efecfde9 Remove a top-level "using namespace" from TargetTransformInfoImpl.h
Move it into the implementation of the function that needs it.

Avoids polluting the namespace of all files including the header.
2022-03-02 15:38:20 +01:00
Pavel Labath 11511e9357 Remove "using namespace llvm" from ReleaseModeModelRunner.h
A using directive in a header pollutes the namespace of all files which
include that header. It seems this snuck in in D115764 by moving some
code from a cpp file.
2022-03-02 15:29:12 +01:00
Pavel Labath d2edca6276 [lldb/Platform] Prepare decouple instance and plugin names
This patch changes the return value of Platform::GetName() to a
StringRef, and uses the opportunity (compile errors) to change some
callsites to use GetPluginName() instead. The two methods still remain
hardwired to return the same thing, but this will change once the ideas
in
<https://discourse.llvm.org/t/multiple-platforms-with-the-same-name/59594>
are implemented.

Differential Revision: https://reviews.llvm.org/D119146
2022-03-02 14:57:01 +01:00
Alex Zinenko ea998709eb [mlir] Add partial support for translating data layout
Add support for translating data layout specifications for integer and float
types between MLIR and LLVM IR. This is a first step towards removing the
string-based LLVM dialect data layout attribute on modules. The latter is still
available and will remain so until the first-class MLIR modeling can fully
replace it.

Depends On D120739

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D120740
2022-03-02 14:56:50 +01:00
Alex Zinenko f64170aa1d [mlir] Data layout for integer and float types
Add support for integer and float types into the data layout subsystem with
default logic similar to LLVM IR. Given the flexibility of the sybsystem, the
logic can be easily overwritten by operations if necessary. This provides the
connection necessary, e.g., for the GPU target where alignment requirements for
integers and floats differ from those provided by default (although still
compatible with the LLVM IR model). Previously, it was impossible to use
non-default alignment requirements for integer and float types, which could
lead to incorrect address and size calculations when targeting GPUs.

Depends On D120737

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D120739
2022-03-02 14:56:49 +01:00
Alex Zinenko 554839ecdf [mlir] support f80 and f128 in parseOptionalType
This seems to have been forgotten when the types were introduced.

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D120737
2022-03-02 14:56:47 +01:00
Simon Pilgrim ab2cbb8466 [X86] LowerShiftByScalarVariable - remove 32-bit vXi64 bitcast shift amount handling
This was handled generically (and better) by D120553
2022-03-02 13:52:14 +00:00
Florian Hahn 6dc456a375
[LV] Remove redundant check line from recurrence test.
The removed line matches the previous line, modulo the check prefix.
There is no way to disable sinking instructions as required due to
first-order recurrence and removing the line should be safe.
2022-03-02 13:48:46 +00:00
Saiyedul Islam 1e78d07dc9
[clang-offload-bundler] Fix typo in a test case
Intermediate file of one of the test was getting overwritten due
to name clash.
2022-03-02 13:33:56 +00:00
Nikita Popov 5555252b52 [InstCombine] Add additional test for phi to switch cond fold (NFC)
This test exposes a bug in the edge dominance implementation.
2022-03-02 14:33:15 +01:00
Momchil Velikov 74319d6794 [AArch64] Async unwind - function epilogues
Counterpart of https://reviews.llvm.org/D111411 this change makes the
unwind information instruction precise in function epilogues.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D112330
2022-03-02 13:15:11 +00:00
Simon Moll 9ebaec461a [VE] (masked) load|store v256.32|64 isel
Add `vvp_load|store` nodes. Lower to `vld`, `vst` where possible. Use
`vgt` for masked loads for now.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D120413
2022-03-02 13:31:29 +01:00
Manas 3ca1098557 [clang][scan-build] Change mode of installation for scan-build.1
Currently, manpage for scan-build is installed as a program, with
permission of 755. This patch makes installation of scan-build.1 as
file, with 644 permission.

Patch by Manas.

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D120646
2022-03-02 13:12:08 +01:00
Kiran Chandramohan dc48849fcc [Flang] NFC: Rearrange conversion patterns in Codegen.cpp
Minor rearrangment in the order of conversion patterns to identify
differences.

Reviewed By: clementval, schweitz

Differential Revision: https://reviews.llvm.org/D120721
2022-03-02 11:55:45 +00:00
Nikita Popov 5cf06d10f8 Revert "[InstCombine] Support switch in phi to cond fold"
This reverts commit 0817ce86b5.

Seeing some ppc64le stage2 failures, reverting to investigate.
2022-03-02 12:49:47 +01:00
Pavel Samolysov 2397f67166 [Object] Skip section offset checking for /<XFGHASHMAP>/
Starting from Windows SDK for Windows 11 (10.0.22000.x), all the system
libraries (.lib files) contain a section with the '/<XFGHASHMAP>/' name.
This looks like the libraries are built with control flow guard enabled:
https://docs.microsoft.com/en-us/cpp/build/reference/guard-enable-control-flow-guard?view=msvc-170

To let the LLVM tools (llvm-ar, llvm-lib) work with these libraries,
this patch just skips the section offset check for sections with the
'/<XFGHASHMAP>/' name.

Closes: llvm/llvm-project#53814

Signed-off-by: Pavel Samolysov <pavel.samolysov@intel.com>

Reviewed By: jhenderson, thieta

Differential Revision: https://reviews.llvm.org/D120645
2022-03-02 13:29:35 +02:00
Simon Pilgrim df0a2b4f30 [DAG] SelectionDAG::isSplatValue - add initial BITCAST handling
This patch adds support for recognising vector splats by peeking through bitcasts to vectors with smaller element types - if all the offset subelements are splats then the bitcasted vector is a splat as well.

We don't have great coverage for isSplatValue so I've made this pretty specific to the use case I'm trying to fix - regressions in some vXi64 vector shift by splat cases that 32-bit x86 doesn't recognise because the shift amount buildvector has been type legalised to v2Xi32.

We can add further support (floats, bitcast from larger element types, undef elements) when we have actual test coverage.

Differential Revision: https://reviews.llvm.org/D120553
2022-03-02 11:25:51 +00:00
Nikita Popov 0817ce86b5 [InstCombine] Support switch in phi to cond fold
For conditional branches, we know the value is i1 0 or i1 1 along
the outgoing edges. For switches we can apply exactly the same
optimization, just with the known values determined by the switch
cases.
2022-03-02 12:16:32 +01:00
Jay Foad 8bed52c9eb [AMDGPU] Make more use of madmk/fmamk instructions
In convertToThreeAddress handle VOP2 mac/fmac instructions with a
literal src0 operand, since these are prime candidates for
converting to madmk/fmamk.

Previously this would only happen if src0 (or src1) was a register
defined by a move-immediate instruction, but in many cases these
operands have already been folded because SIFoldOperands runs
before TwoAddressInstructionPass.

Differential Revision: https://reviews.llvm.org/D120736
2022-03-02 10:22:10 +00:00
Dawid Jurczak d813116c9d [NFC][Lexer] Remove getLangOpts function from Lexer
Given that there is only one external user of Lexer::getLangOpts
we can remove getter entirely without much pain.

Differential Revision: https://reviews.llvm.org/D120404
2022-03-02 11:17:05 +01:00
Florian Hahn 83fd2071f0
[LV] Modernize test matching hardcoded induction phi name. 2022-03-02 10:12:38 +00:00
Nikita Popov 85491fb6e4 [InstCombine] Add tests for phi to cond with switch (NFC)
Currently we only handle br but not switch in this fold.
2022-03-02 11:06:15 +01:00
Haojian Wu 05d7e9f68e [pseudo] fix some comment nits, NFC. 2022-03-02 10:19:17 +01:00
Simon Moll d05ddb86f6 [VP] vp.sitofp cast intrinsic and docs
Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D119922
2022-03-02 10:16:19 +01:00
Simon Moll febf548129 [VP] Fix vp.fptosi LangRef example
Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D120068
2022-03-02 10:15:32 +01:00
Haojian Wu 7f99e1870f [pseudo] Add a print-grammar option in the tool
This is helpful for debugging purposes.

Differential Revision: https://reviews.llvm.org/D120724
2022-03-02 10:05:49 +01:00