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12474 Commits

Author SHA1 Message Date
Jim Grosbach fed78ccfb5 Add instruction encoding for DMB/DSB 
llvm-svn: 91053
 2009-12-10 18:35:32 +00:00
Jim Grosbach 53e8854443 Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics. 
llvm-svn: 91003
 2009-12-10 00:11:09 +00:00
Evan Cheng 493b882f80 Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g. 
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>

iff ptr is 16-byte aligned (or can be made into 16-byte aligned).

llvm-svn: 90984
 2009-12-09 21:00:30 +00:00
Evan Cheng d938faff4b Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code. 
llvm-svn: 90925
 2009-12-09 01:53:58 +00:00
Evan Cheng f5938d5d27 Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes. 
llvm-svn: 90922
 2009-12-09 01:36:00 +00:00
Evan Cheng 0c2544fd6b - Support inline asm 'w' constraint for 128-bit vector types. 
- Also support the 'q' NEON registers asm code.

llvm-svn: 90894
 2009-12-08 23:06:22 +00:00
Anton Korobeynikov dd2b2f8cba Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas! 
llvm-svn: 90819
 2009-12-08 01:03:04 +00:00
Dan Gohman 9528ccdd77 Don't enable the post-RA scheduler on x86 except at -O3. In its 
current form, it is too expensive in compile time.

llvm-svn: 90781
 2009-12-07 19:04:31 +00:00
Anton Korobeynikov 24a6316aaa Some pretty-printing 
llvm-svn: 90742
 2009-12-07 02:28:41 +00:00
Anton Korobeynikov ff4ab51400 Add lowering of returnaddr and frameaddr intrinsics. Shamelessly stolen from x86 :) 
llvm-svn: 90740
 2009-12-07 02:28:10 +00:00
Anton Korobeynikov b4be8ce537 Initial codegen support for MSP430 ISRs 
llvm-svn: 90739
 2009-12-07 02:27:53 +00:00
Anton Korobeynikov 28d3c733aa Add ability to select hw multiplier mode and select appropriate libcalls. 
llvm-svn: 90737
 2009-12-07 02:27:08 +00:00
Anton Korobeynikov 75dfed4fa5 Dynamic stack realignment use of sp register as source/dest register 
in "bic sp, sp, #15" leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4

llvm-svn: 90724
 2009-12-06 22:39:50 +00:00
Bill Wendling 29d6390249 Calling InvalidateEntry during the refinement was breaking the bootstrap. 
llvm-svn: 90656
 2009-12-05 07:59:04 +00:00
Bill Wendling fa3f115ec4 Final cleanups: 
- Privatize a typedef.
- Call the InvalidateEntry when refining a type.

llvm-svn: 90655
 2009-12-05 07:46:49 +00:00
Bill Wendling 4968774280 Inline methods which are called only once. 
llvm-svn: 90640
 2009-12-05 01:46:01 +00:00
Bill Wendling da95e13750 Refactor some code. No functionality change. 
llvm-svn: 90639
 2009-12-05 01:43:33 +00:00
Dan Gohman 047a767d74 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of 
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634
 2009-12-05 00:44:40 +00:00
David Greene 86bafa29a3 Remove an unneeded include. 
llvm-svn: 90625
 2009-12-04 23:55:07 +00:00
David Greene 0508e435c3 Have hasLoad/StoreFrom/ToStackSlot return the relevant MachineMemOperand. 
llvm-svn: 90608
 2009-12-04 22:38:46 +00:00
Bill Wendling 4ea0d2b8ee Some code cleanup. No functionality change. 
llvm-svn: 90588
 2009-12-04 21:03:02 +00:00
Jim Grosbach 5f9f721e95 remove out of date FIXME. 
llvm-svn: 90490
 2009-12-03 21:55:01 +00:00
Chris Lattner f05330a5c8 expand note. 
llvm-svn: 90429
 2009-12-03 07:43:46 +00:00
Chris Lattner d1e4ee3c2b add a note 
llvm-svn: 90428
 2009-12-03 07:41:54 +00:00
Chris Lattner c831fac043 fix a build problem with VC++, PR5664, patch by Alp Toker! 
llvm-svn: 90419
 2009-12-03 06:58:32 +00:00
Bob Wilson 0bbd3077ce Recognize canonical forms of vector shuffles where the same vector is used for 
both source operands.  In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand.  Radar 7434842.

llvm-svn: 90417
 2009-12-03 06:40:55 +00:00
Bill Wendling aba7d48764 Revert r90371. It was causing build failures. 
llvm-svn: 90383
 2009-12-03 01:54:07 +00:00
Bill Wendling 693969eb35 Further improvements: refactoring code that does the same thing into one 
function, converting "dyn_cast" to "cast", asserting the correct things, and
other general cleanups.

llvm-svn: 90371
 2009-12-03 01:15:46 +00:00
Chris Lattner 765ac33a1a yay for case insensitive file systems (?) 
llvm-svn: 90370
 2009-12-03 01:10:05 +00:00
Chris Lattner 73570673de remove some dead std::ostream using code. 
llvm-svn: 90366
 2009-12-03 00:55:04 +00:00
Chris Lattner a48f44d9ee improve portability to avoid conflicting with std::next in c++'0x. 
Patch by Howard Hinnant!

llvm-svn: 90365
 2009-12-03 00:50:42 +00:00
Bill Wendling 1ed59c63e3 This initial code is meant to convert TargetData to use an AbstractTypesUser so 
that it doesn't have dangling pointers when abstract types are resolved. This
modifies it somewhat to address comments: making the "StructLayoutMap" an
anonymous structure, calling "removeAbstractTypeUser" when appropriate, and
adding asserts where helpful.

llvm-svn: 90362
 2009-12-03 00:17:12 +00:00
Jim Grosbach 2c3a6c6589 Factor the stack alignment calculations out into a target independent pass. 
No functionality change.

llvm-svn: 90336
 2009-12-02 19:30:24 +00:00
Jim Grosbach 36d4dec28a Thumb1 exception handling setjmp 
llvm-svn: 90246
 2009-12-01 18:10:36 +00:00
Johnny Chen 86fc920742 For VLDM/VSTM (Advanced SIMD), set encoding bits Inst{11-8} to 0b1011. 
llvm-svn: 90243
 2009-12-01 17:37:06 +00:00
Johnny Chen ee536b0ea4 For VMOV (immediate), make some of the encoding bits (cmode and op) unspecified. 
For VMOVv*i[16,32], op bit is don't care, and some cmode bits vary depending on
the immediate values.

Ref: Table A7-15 Modified immediate values for Advanced SIMD instructions.
llvm-svn: 90173
 2009-12-01 00:02:02 +00:00
Dan Gohman 3ee8bc9b35 Minor whitespace fixes. 
llvm-svn: 90166
 2009-11-30 23:33:53 +00:00
Dan Gohman 6f51309021 Fix a minor inconsistency. 
llvm-svn: 90165
 2009-11-30 23:33:37 +00:00
Bob Wilson 505ddaa4dc Remove isProfitableToDuplicateIndirectBranch target hook. It is profitable 
for all the processors where I have tried it, and even when it might not help
performance, the cost is quite low.  The opportunities for duplicating
indirect branches are limited by other factors so code size does not change
much due to tail duplicating indirect branches aggressively.

llvm-svn: 90144
 2009-11-30 18:35:03 +00:00
Bob Wilson c168a52627 Fix some more ARM unified syntax warnings. 
llvm-svn: 90141
 2009-11-30 17:47:19 +00:00
Mon P Wang 32f8bb9ed4 Added support to allow clients to custom widen. For X86, custom widen vectors for 
divide/remainder since these operations can trap by unroll them and adding undefs
for the resulting vector.

llvm-svn: 90108
 2009-11-30 02:42:02 +00:00
Chris Lattner 58ccf88c36 update and consolidate the load pre notes. 
llvm-svn: 90050
 2009-11-29 02:19:52 +00:00
Chris Lattner 83a4a9868f add a deadargelim note. 
llvm-svn: 90009
 2009-11-27 17:12:30 +00:00
Chris Lattner ca9e0e83b3 This testcase is actually only partially redundant, and requires 
the FIXME I added yesterday to be implemented.

llvm-svn: 90008
 2009-11-27 16:53:57 +00:00
Chris Lattner cc6d29286c this (and probably several others) are now done. 
llvm-svn: 89982
 2009-11-27 00:35:04 +00:00
Chris Lattner 9bd2136ca3 Teach memdep to phi translate bitcasts. This allows us to compile 
the example in GCC PR16799 to:

LBB1_2:                                                     ## %bb1
	movl	%eax, %eax
	subq	%rax, %rdi
	movq	%rdi, (%rcx)
	movl	(%rdi), %eax
	testl	%eax, %eax
	je	LBB1_2

instead of:

LBB1_2:                                                     ## %bb1
	movl	(%rdi), %ecx
	subq	%rcx, %rdi
	movq	%rdi, (%rax)
	cmpl	$0, (%rdi)
	je	LBB1_2

llvm-svn: 89978
 2009-11-26 23:41:07 +00:00
Chris Lattner 29bc8a91d3 Teach basicaa that x|c == x+c when the c bits of x are clear. This 
allows us to compile the example in readme.txt into:

LBB1_1:                                                     ## %bb
	movl	4(%rdx,%rax), %ecx
	movl	%ecx, %esi
	imull	(%rdx,%rax), %esi
	imull	%esi, %ecx
	movl	%esi, 8(%rdx,%rax)
	imull	%ecx, %esi
	movl	%ecx, 12(%rdx,%rax)
	movl	%esi, 16(%rdx,%rax)
	imull	%ecx, %esi
	movl	%esi, 20(%rdx,%rax)
	addq	$16, %rax
	cmpq	$4000, %rax
	jne	LBB1_1

instead of:

LBB1_1: 
	movl	(%rdx,%rax), %ecx
	imull	4(%rdx,%rax), %ecx
	movl	%ecx, 8(%rdx,%rax)
	imull	4(%rdx,%rax), %ecx
	movl	%ecx, 12(%rdx,%rax)
	imull	8(%rdx,%rax), %ecx
	movl	%ecx, 16(%rdx,%rax)
	imull	12(%rdx,%rax), %ecx
	movl	%ecx, 20(%rdx,%rax)
	addq	$16, %rax
	cmpq	$4000, %rax
	jne	LBB1_1

GCC (4.2) doesn't seem to be able to eliminate the loads in this 
testcase either, it generates:

L2:
	movl	(%rdx), %eax
	imull	4(%rdx), %eax
	movl	%eax, 8(%rdx)
	imull	4(%rdx), %eax
	movl	%eax, 12(%rdx)
	imull	8(%rdx), %eax
	movl	%eax, 16(%rdx)
	imull	12(%rdx), %eax
	movl	%eax, 20(%rdx)
	addl	$4, %ecx
	addq	$16, %rdx
	cmpl	$1002, %ecx
	jne	L2

llvm-svn: 89952
 2009-11-26 16:26:43 +00:00
Chris Lattner 12dacdd359 teach basicaa that A[i] != A[i+1]. 
llvm-svn: 89951
 2009-11-26 16:18:10 +00:00
Chris Lattner 8e09ad6f3c update some notes slightly 
llvm-svn: 89913
 2009-11-26 01:51:18 +00:00
Viktor Kutuzov 8981b3abe5 Rollback changes r89516: Added two SubtargetFeatures::AddFeatures methods, which accept a comma-separated string or already parsed command line parameters as input, and some code re-factoring to use these new methods. 
llvm-svn: 89893
 2009-11-25 22:44:18 +00:00