Commit Graph

339739 Commits

Author SHA1 Message Date
Craig Topper caee96031d [Transforms][RISCV] Remove a "using namespace llvm" from an include file. Fix a place that became dependent on it.
This include file was created in October and has a "using namespace llvm". This seems to get exposed to other include files and finally onto cpp files. While this somewhat okay for llvm itself, its bad for other projects that use llvm as a library and includes a header file that picks this up. This was found by ISPC which has some class names at gloal scope with the same names as LLVM.

It looks like RISCV accidentally became dependent on this. I fixed it by reordering some includes in the RISCV code, but maybe we want to change the TableGenEmitter to put "namespace llvm {" in the generated file instead? But we probably want to do the simplest thing first so we can merge it to 10.0.

Differential Revision: https://reviews.llvm.org/D72895
2020-01-16 20:50:41 -08:00
Jonas Devlieghere d3d7666678 [lldb/CMake] Remove duplicate entry 2020-01-16 20:08:55 -08:00
Lang Hames 0d3d584f82 [docs][ORC] Update the "utilities" section, tidy intro and fix typo.
This patch updates the formatting and language of the Features section of the
ORCv2 design document. It also fixes a TBD by adding discussion of the
absoluteSymbols, symbolAliases, and reexports utilities.

Typos found during editing were also fixed.
2020-01-16 20:08:39 -08:00
Jonas Devlieghere 25cf941275 [lldb/CMake] Set LLVM_HOST_TRIPLE from TARGET_TRIPLE in standalone builds.
LLVMConfig doesn't export LLVM_HOST_TRIPLE, but it sets the
TARGET_TRIPLE based on this variable. So use that again for the compiler
invocations in the shell tests.
2020-01-16 20:06:25 -08:00
Cyndy Ishida 24fca5cd71 [lldb] add to gdb to lldb doc
Summary: * enabling and disabling a breakpoint were missing.

Reviewers: JDevlieghere

Reviewed By: JDevlieghere

Subscribers: merge_guards_bot, jingham, dexonsmith, ributzka, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D72898
2020-01-16 19:56:45 -08:00
Richard Smith 01a6cd471f Don't dump IR output from this test to stdout. 2020-01-16 19:19:45 -08:00
Matt Arsenault 117d4f1900 AMDGPU: Add register classes to MUBUF load patterns 2020-01-16 22:00:44 -05:00
Marcello Maggioni 051d330314 Avoid creating an immutable map in the Automaton class.
Summary:
In the DFAPacketizer we copy the Transitions array
into a map in order to later access the transitions
based on a "Current State/Action" pair as a key.
This map lives in the Automaton object used by the DFAPacketizer.
It is never changed during the life of the object after
having been created during the creation of the Automaton
itself.

This map creation can make the creation of a DFAPacketizer
quite expensive if the target contains a considerable
amount of transition states.

Considering that TableGen already generates a
sorted list of transitions by State/Action pairs
we could just use that directly in our Automaton
and search entries with std::lower_bound instead of copying
it in a map and paying the execution time and memory cost.

Reviewers: jmolloy, ThomasRaoux

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72682
2020-01-16 18:44:20 -08:00
Lei Zhang 961174f878 [mlir][spirv] Fix SPV_MM_Vulkan extension reqirements
SPV_MM_Vulkan can be enabled by the SPV_KHR_vulkan_memory_model extension.

Differential Revision: https://reviews.llvm.org/D72764
2020-01-16 21:32:01 -05:00
Lei Zhang ccedb918bb [mlir][spirv] Use symbolize functions in enum attribute predicates
By default, for an enum attribute, we will generate a list of equality
comparisons for all supported cases inside it's predicate. This list
can be fairly large for certain SPIR-V enum attributes. Instead, we
already have such a list generated by EnumsGen in the symbolize
functions. Leverage that to simplify the generated C++ code.

Differential Revision: https://reviews.llvm.org/D72763
2020-01-16 21:32:01 -05:00
Lei Zhang 6a97013590 [mlir][spirv] Add implied capabilities and availability for capabilities
Certain SPIR-V capabilities are only available in certain SPIR-V versions
or extensions. Also a SPIR-V capability may implicitly declares other
capabilities.

This commit updates gen_spirv_dialect.py to support generating such
information into SPIRVBase.td. It requires us to topologically sort
all capabilities because now a capability can refer to another one.

This commits also registers a few extensions because their symbols are
used by capability availability.

Note that this commit hasn't updated SPIRVConversionTarget to take
into consideration such relationship yet. That will be done in a
following-up commit.

Differential Revision: https://reviews.llvm.org/D72760
2020-01-16 21:32:01 -05:00
Steven Wan ad83bed241 [NFC][PowerPC] Remove unnecessary link components.
Remove unused link components for PowerPC target unittest according
to post commit comments. This is a redo for a previous commit
"fc4e43ad618b" that removed a few components that are necessary
when libraries are to be built shared (i.e., BUILD_SHARED_LIBS=ON).
2020-01-16 21:22:51 -05:00
Richard Smith b78e8e0d79 Add extra test file forgotten in 45d7080. 2020-01-16 18:13:49 -08:00
Zakk Chen cef838e65f Revert "[RISCV] Support ABI checking with per function target-features"
This reverts commit 7bc58a779a.
It breaks EXPENSIVE_CHECKS on Windows
2020-01-16 18:01:07 -08:00
Steven Wan 6c26d8968a Add back more link components.
Add all previous link components back to unblock bots for the moment.
In the meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to
find out the minimal list of components needed.
2020-01-16 20:19:25 -05:00
Volodymyr Sapsai 83f4c3af02 [modules] Do not cache invalid state for modules that we attempted to load.
Partially reverts 0a2be46cfd as it turned
out to cause redundant module rebuilds in multi-process incremental builds.
When a module was getting out of date, all compilation processes started at the
same time were marking it as `ToBuild`. So each process was building the same
module instead of checking if it was built by someone else and using that
result. In addition to the work duplication, contention on the same .pcm file
wasn't making builds faster.

Note that for a single-process build this change would cause redundant module
reads and validations. But reading a module is faster than building it and
multi-process builds are more common than single-process. So I'm willing to
make such a trade-off.

rdar://problem/54395127

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D72860
2020-01-16 17:12:41 -08:00
Adrian Prantl f55ab6f90b Fix a buffer-size bug when the first DW_OP_piece is undefined
and document the shortcomings of LLDB's partially defined DW_OP_piece
handling.

This would manifest as "DW_OP_piece for offset foo but top of stack is
of size bar".

rdar://problem/46262998

Differential Revision: https://reviews.llvm.org/D72880
2020-01-16 16:47:59 -08:00
Adrian Prantl 7b0d58e339 Add testing for DW_OP_piece and fix a bug with small Scalar values.
By switching to Scalars that are backed by explicitly-sized APInts we
can avoid a bug that increases the buffer reserved for a small piece
to the next-largest host integer type.

This manifests as "DW_OP_piece for offset foo but top of stack is of size bar".

Differential Revision: https://reviews.llvm.org/D72879
2020-01-16 16:47:36 -08:00
Jonas Devlieghere 2671df9bd6 [lldb/Debugger] Rename ExecuteIOHandlers to RunIOHandlers (NFC)
This improves consistency among the related methods.
2020-01-16 16:45:47 -08:00
Max Sherman 8ef57f3e3f [xray] add --no-demangle cli opt for llvm-xray extract to output mangled names
This adds an additional cli flag for the llvm-xray extract tool.  This
is useful if you're more interested in consuming the mangled symbol
name, instead of the default now which is demangled.

Differential Revision: https://reviews.llvm.org/D72804
2020-01-16 16:37:00 -08:00
Davide Italiano 30a8865142 [FastISel] Lower `llvm.dbg.value(undef, ...` correctly.
Summary:
Instead of just dropping them.

<rdar://problem/58657146>

Reviewers: aprantl, vsk, ab, paquette, echristo

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72877
2020-01-16 16:22:20 -08:00
Steven Wan 1b1022b42a Add back other PowerPC link components.
Add the link components back to unblock bots for the moment. In the
meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to find
out the minimal list of components needed.
2020-01-16 19:14:39 -05:00
Eric Christopher 40ac4221c3 Move static function to inline function - this fixes a conceivable
ODR violation and a clang-tidy warning about an unused function
in a number of translation units.
2020-01-16 16:12:46 -08:00
Nico Weber 1645f5e496 [gn build] replace llvm_allow_tardy_revision with llvm_append_vc_rev
Previously, the gn build would create VCSRevision.h / VCSVersion.h
files with some LLD_REVISION / LLVM_REVISION / CLANG_REVISION but
by default wouldn't add a dependency on .git/logs/HEAD so that
the step doesn't rerun after every branch switch or every pull.

That's bad for deterministic builds, and having --version print
some arbitrarily old revision isn't great either.

Instead, move to the model that the cmake build (now) uses fairly
consistently: If llvm_append_vc_rev is set, include the revision,
else don't.

Since the GN build is focused on developers, set llvm_append_vc_rev
to false instead of true by default (different from the cmake build),
so that things don't rebuild after every branch switch and every
pull.

While here, also remove some pre-monorepo code.

Differential Revision: https://reviews.llvm.org/D72859
2020-01-16 19:05:07 -05:00
Nico Weber fb5fafb23c Make LLVM_APPEND_VC_REV=OFF affect clang, lld, and lldb as well.
When LLVM_APPEND_VC_REV=OFF is set, the current git hash is no
longer embedded into binaries (mostly for --version output).
Without it, most binaries need to relink after every single
commit, even if they didn't change otherwise (due to, say,
a documentation-only commit).

LLVM_APPEND_VC_REV is ON by default, so this doesn't change the
default behavior of anything.

With this, all clients of GenerateVersionFromVCS.cmake honor
LLVM_APPEND_VC_REV.

Differential Revision: https://reviews.llvm.org/D72855
2020-01-16 19:04:08 -05:00
Geoffrey Martin-Noble 933b421256 [mlir] Add missing dependency on LinalgUtils
Differential Revision: https://reviews.llvm.org/D72821
2020-01-16 23:41:26 +00:00
David Blaikie 65eb74e94b PointerLikeTypeTraits: Standardize NumLowBitsAvailable on static constexpr rather than anonymous enum
This is (more?) usable by GDB pretty printers and seems nicer to write.

There's one tricky caveat that in C++14 (LLVM's codebase today) the
static constexpr member declaration is not a definition - so odr use of
this constant requires an out of line definition, which won't be
provided (that'd make all these trait classes more annoyidng/expensive
to maintain). But the use of this constant in the library implementation
is/should always be in a non-odr context - only two unit tests needed to
be touched to cope with this/avoid odr using these constants.

Based on/expanded from D72590 by Christian Sigg.
2020-01-16 15:30:50 -08:00
Eric Christopher de022a8824 [NFC] Fold isHugeExpression into hasHugeExpression and update callers
accordingly.
2020-01-16 15:28:54 -08:00
Jessica Paquette b82d18e1e8 [AArch64][GlobalISel] Change G_FCONSTANTs feeding into stores into G_CONSTANTS
Given the following situation:

x = G_FCONSTANT (something that can't be materialized)
G_STORE x, some_addr

We know that x must be materialized as at least a single mov. However, at the
time of selection, the G_STORE will have been regbankselected to a FPR store.

So, as a result, you'll get an unnecessary fmov into the G_STORE.

Storing a constant value in a GPR and a constant value in a FPR are the same.
So, whenever you see a G_FCONSTANT that feeds into only G_STORES, so might as
well make it a G_CONSTANT.

This adds a target-specific combine which changes G_FCONSTANTs feeding into
G_STOREs into G_CONSTANTs.

Differential Revision: https://reviews.llvm.org/D72814
2020-01-16 15:18:44 -08:00
Alexey Bataev 25b542c61f [OPENMP]Do not emit RTTI descriptor for NVPTX devices.
Need to disable emission of RTTI descriptors for NVPTX devices to be
able to use dynamic classes without unresolved symbols at link stage.
2020-01-16 18:12:50 -05:00
Matt Arsenault 9b549f26fa AMDGPU: Update clang test 2020-01-16 18:10:29 -05:00
Jan Korous 42b3c38903 [clangd][test] Disable a particular testcase in FindExplicitReferencesTest when LLVM_ENABLE_EXPENSIVE_CHECKS
The test is failing on our CI bots.
Seems like the order of results for one target is undefined.

(post-commit review)
Differential Revision: https://reviews.llvm.org/D72883
2020-01-16 15:07:08 -08:00
Alex Zinenko a4a42160c4 [mlir] support translation of multidimensional vectors to LLVM IR
Summary:
MLIR unlike LLVM IR supports multidimensional vector types. Such types are
lowered to nested LLVM IR arrays wrapping an LLVM IR vector for the innermost
dimension of the MLIR vector. MLIR supports constants of such types using
ElementsAttr for values. Introduce support for converting ElementsAttr into
LLVM IR Constant Aggregates recursively. This enables translation of
multidimensional vector constants from MLIR to LLVM IR.

Differential Revision: https://reviews.llvm.org/D72846
2020-01-17 00:05:37 +01:00
Kazuaki Ishizaki 73f371c31d [mlir] NFC: Fix trivial typos
Summary: Fix trivial typos

Differential Revision: https://reviews.llvm.org/D72672
2020-01-16 23:58:58 +01:00
Sam Clegg 51b521c07a [lld][WebAssembly] Use a more meaningful name for stub functions
When we generate these stub functions on signature mismatches give
them a more meaningful name so that when people see this in stack
traces is gives a clue as the what is going on.

See: https://github.com/emscripten-core/emscripten/issues/10226

Differential Revision: https://reviews.llvm.org/D72881
2020-01-16 14:55:37 -08:00
Petr Hosek 9050d0fb59 [libcxx] Temporarily switch back to pthread backend for Fuchsia
We switched to C11 thread API on Fuchsia in ab9aefe, but further
testing showed that Fuchsia's C11 mutex implementation needs a few
improvements for this to be usable, so we temporarily switch back
to the pthread implementation until those issues are addressed.

Differential Revision: https://reviews.llvm.org/D72862
2020-01-16 14:53:08 -08:00
Vedant Kumar 6c4d377334 lldb: xfail TestCrossDSOTailCalls.py and TestCrossObjectTailCalls.py on arm/aarch64
This effectively reverts commit
8d2f252bb8, which went a bit too far and
disabled these on all non-Darwin systems.
2020-01-16 14:48:51 -08:00
Derek Schuff 80906d9d16 Revert "[WebAssembly] Track frame registers through VReg and local allocation"
This reverts commit 3a05c3969c.
It breaks under expensive-checks and on Windows
2020-01-16 14:38:00 -08:00
Matt Arsenault 3ef8cdf666 AMDGPU: Do permlane16 vdst_in discard optimization in InstCombine
There's more potential value to discarding the source value earlier,
since we always know the value of the fi/bc bits.
2020-01-16 17:27:53 -05:00
Matt Arsenault 91e758b732 AMDGPU: Move permlane discard vdst_in optimization
This case can be handled as a regular selection pattern, so move it
out of the weird post-isel folding code which doesn't have an exactly
equivalent place in GlobalISel.

I think it doesn't make much sense to do this optimization here
though, and it would be more useful in instcombine. There's not really
any new information that will be gained during lowering since these
inputs were known from the beginning.
2020-01-16 17:27:53 -05:00
Sam Clegg fa4112fffc [llvm-nm] Use `StringRef` over `const std::string &` params
Differential Revision: https://reviews.llvm.org/D72718
2020-01-16 14:02:58 -08:00
Krzysztof Parzyszek 202446c639 Add BuiltinsHexagonDep.def to clang module map 2020-01-16 15:54:24 -06:00
Derek Schuff 3a05c3969c [WebAssembly] Track frame registers through VReg and local allocation
This change has 2 components:

Target-independent: add a method getDwarfFrameBase to TargetFrameLowering. It
describes how the Dwarf frame base will be encoded.  That can be a register (the
default), the CFA (which replaces NVPTX-specific logic in DwarfCompileUnit), or
a DW_OP_WASM_location descriptr.

WebAssembly: Allow WebAssemblyFunctionInfo::getFrameRegister to return the
correct virtual register instead of FP32/SP32 after WebAssemblyReplacePhysRegs
has run.  Make WebAssemblyExplicitLocals store the local it allocates for the
frame register. Use this local information to implement getDwarfFrameBase

The result is that the DW_AT_frame_base attribute is correctly encoded for each
subprogram, and each param and local variable has a correct DW_AT_location that
uses DW_OP_fbreg to refer to the frame base.

Differential Revision: https://reviews.llvm.org/D71681
2020-01-16 13:51:17 -08:00
Sanjay Patel 52b44902d0 [IR] fix crash in Constant::isElementWiseEqual() with FP types
We lifted this code from InstCombine for general usage in:
rL369842
...but it's not safe as-is. There are no existing users that can
trigger this bug, but I discovered it via crashing several
regression tests when trying to use it for select folding in
InstSimplify.

ICmp requires (vector) integer types, so give up on anything that's
not integer or FP (pointers and ?) then bitcast the constants
before trying the match. That matches the definition of "equal or
undef" that I was looking for. If someone wants an FP-aware version
of equality (deal with NaN, -0.0), that could be a different mode
or different function.

Differential Revision: https://reviews.llvm.org/D72784
2020-01-16 16:49:16 -05:00
Alexey Bataev 8b32192948 [OPENMP]Avoid string concat where possible and use standard name
generation function, NFC.
2020-01-16 16:39:45 -05:00
LLVM GN Syncbot cbc63fbdc4 [gn build] Port d5c6b8407c 2020-01-16 21:35:08 +00:00
Logan Smith d5c6b8407c Factor out renaming logic from readability-identifier-naming
Before this patch, readability-identifier-naming contained a significant amount
of logic for (a) checking the style of identifiers, followed by (b) renaming/
applying fix-its. This patch factors out (b) into a separate base class so that
it can be reused by other checks that want to do renaming. This also cleans up
readability-identifier-naming significantly, since now it only needs to be
concerned with the interesting details of (a).
2020-01-16 16:34:56 -05:00
Peter Collingbourne c299d1981d scudo: Add initial memory tagging support.
When the hardware and operating system support the ARM Memory Tagging
Extension, tag primary allocation granules with a random tag. The granules
either side of the allocation are tagged with tag 0, which is normally
excluded from the set of tags that may be selected randomly. Memory is
also retagged with a random tag when it is freed, and we opportunistically
reuse the new tag when the block is reused to reduce overhead. This causes
linear buffer overflows to be caught deterministically and non-linear buffer
overflows and use-after-free to be caught probabilistically.

This feature is currently only enabled for the Android allocator
and depends on an experimental Linux kernel branch available here:
https://github.com/pcc/linux/tree/android-experimental-mte

All code that depends on the kernel branch is hidden behind a macro,
ANDROID_EXPERIMENTAL_MTE. This is the same macro that is used by the Android
platform and may only be defined in non-production configurations. When the
userspace interface is finalized the code will be updated to use the stable
interface and all #ifdef ANDROID_EXPERIMENTAL_MTE will be removed.

Differential Revision: https://reviews.llvm.org/D70762
2020-01-16 13:27:49 -08:00
StevenWanYu fc4e43ad61 [NFC] Remove unnecessary link components.
Remove unused link components in unittest according to post commit
comments.
2020-01-16 16:08:07 -05:00
Michael Liao 40514a7d7a [clangd] Add workaround for GCC5 host compilers. NFC. 2020-01-16 16:05:22 -05:00