Commit Graph

275030 Commits

Author SHA1 Message Date
Florian Hahn d0208b4b1c Recommit r315288: [SCCP] Propagate integer range info for parameters in IPSCCP.
This version of the patch includes a fix addressing a stage2 LTO buildbot
failure and addressed some additional nits.

Original commit message:
This updates the SCCP solver to use of the ValueElement lattice for
parameters, which provides integer range information. The range
information is used to remove unneeded icmp instructions.

For the following function, f() can be optimized to ret i32 2 with
this change

    source_filename = "sccp.c"
    target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
    target triple = "x86_64-unknown-linux-gnu"

    ; Function Attrs: norecurse nounwind readnone uwtable
    define i32 @main() local_unnamed_addr #0 {
    entry:
      %call = tail call fastcc i32 @f(i32 1)
      %call1 = tail call fastcc i32 @f(i32 47)
      %add3 = add nsw i32 %call, %call1
      ret i32 %add3
    }

    ; Function Attrs: noinline norecurse nounwind readnone uwtable
    define internal fastcc i32 @f(i32 %x) unnamed_addr #1 {
    entry:
      %c1 = icmp sle i32 %x, 100

      %cmp = icmp sgt i32 %x, 300
      %. = select i1 %cmp, i32 1, i32 2
      ret i32 %.
    }

    attributes #1 = { noinline }

Reviewers: davide, sanjoy, efriedma, dberlin

Reviewed By: davide, dberlin

Subscribers: mcrosier, gberry, mssimpso, dberlin, llvm-commits

Differential Revision: https://reviews.llvm.org/D36656

llvm-svn: 316891
2017-10-30 10:07:42 +00:00
Jina Nahias 70280f9a0d [X86][AVX512] Adding a pattern for broadcastm intrinsic.
Differential Revision: https://reviews.llvm.org/D38312

Change-Id: I6551fb13879e098aed74de410e29815cf37d9ab5
llvm-svn: 316890
2017-10-30 09:59:52 +00:00
Max Kazantsev 390fc57771 [IRCE][NFC] Store Length as SCEV in RangeCheck instead of Value
llvm-svn: 316889
2017-10-30 09:35:16 +00:00
Florian Hahn d18443edad Revert r316887 to fix buildbot failures.
llvm-svn: 316888
2017-10-30 09:21:50 +00:00
Florian Hahn 925d3e4a98 Recommit r315288: [SCCP] Propagate integer range info for parameters in IPSCCP.
This version of the patch includes a fix addressing a stage2 LTO buildbot
failure and addressed some additional nits.

Original commit message:
This updates the SCCP solver to use of the ValueElement lattice for
parameters, which provides integer range information. The range
information is used to remove unneeded icmp instructions.

For the following function, f() can be optimized to ret i32 2 with
this change

    source_filename = "sccp.c"
    target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
    target triple = "x86_64-unknown-linux-gnu"

    ; Function Attrs: norecurse nounwind readnone uwtable
    define i32 @main() local_unnamed_addr #0 {
    entry:
      %call = tail call fastcc i32 @f(i32 1)
      %call1 = tail call fastcc i32 @f(i32 47)
      %add3 = add nsw i32 %call, %call1
      ret i32 %add3
    }

    ; Function Attrs: noinline norecurse nounwind readnone uwtable
    define internal fastcc i32 @f(i32 %x) unnamed_addr #1 {
    entry:
      %c1 = icmp sle i32 %x, 100

      %cmp = icmp sgt i32 %x, 300
      %. = select i1 %cmp, i32 1, i32 2
      ret i32 %.
    }

    attributes #1 = { noinline }

Reviewers: davide, sanjoy, efriedma, dberlin

Reviewed By: davide, dberlin

Subscribers: mcrosier, gberry, mssimpso, dberlin, llvm-commits

Differential Revision: https://reviews.llvm.org/D36656

llvm-svn: 316887
2017-10-30 09:04:18 +00:00
Gabor Horvath bde3be43d7 Add missing expected-no-diagnostics comment to test.
llvm-svn: 316886
2017-10-30 09:01:48 +00:00
Gabor Horvath bb81bfb69c [analyzer] Handle ObjC messages conservatively in CallDescription
Differential Revision: https://reviews.llvm.org/D37470

llvm-svn: 316885
2017-10-30 08:47:13 +00:00
Max Kazantsev 1d7c0439b9 [GVN][NFC] Mark instruction for deletion instead of immediate erasing in LoadPRE
It is done to uniformly handle instructions removal.

Differential Revision: https://reviews.llvm.org/D39369

llvm-svn: 316884
2017-10-30 04:48:34 +00:00
Craig Topper 85bcc297c3 [X86] Rearrange code in X86InstrInfo.cpp to put all the foldMemoryOperandImpl methods together without partial/undef register handling in the middle. NFC
I have a future patch that wants to make use of the one of the partial functions in one of the earlier memory folding methods and the current ordering prevents that.

llvm-svn: 316883
2017-10-30 04:39:18 +00:00
Craig Topper c848355335 [X86] Simplify code by removing an unnecessary temporary variable. NFC
llvm-svn: 316882
2017-10-30 03:35:44 +00:00
Craig Topper 730414b0ca [X86] Move some EVEX->VEX code to a helper function to prepare for a future patch. NFC
llvm-svn: 316881
2017-10-30 03:35:43 +00:00
Rui Ueyama 27f95a9ac3 Remove unnecessary code.
Discarded section's Repl always points to itself, so returning
Sec is not different from returning Sec->Repl.

llvm-svn: 316880
2017-10-29 23:41:16 +00:00
Rui Ueyama ea1398eeb3 Move "Assigned" bit from SectionBase to InputSectionBase.
This bit is to manage whether an input section has already been assigned
to some output section by linker scripts or not. So it logically belongs
to InputSectionBase. SectionBase is a common base class for input and
output sections, so that wasn't the right place to define the bit.

llvm-svn: 316879
2017-10-29 23:32:23 +00:00
Rui Ueyama 63edd9f831 Remove an obscure comment.
llvm-svn: 316878
2017-10-29 22:38:00 +00:00
Peter Collingbourne e662436114 ELF: Correctly set edata if there are no .bss sections.
edata needs to be set to the end of the last mapped initialized
section. We were previously mishandling the case where there were no
non-mapped sections by setting it to the end of the last section in
the output file.

Differential Revision: https://reviews.llvm.org/D39399

llvm-svn: 316877
2017-10-29 22:31:48 +00:00
Rui Ueyama da4d26dfa3 Initialize members not by assignment but by the member initializer list.
llvm-svn: 316876
2017-10-29 22:26:52 +00:00
Simon Pilgrim 601ae238b7 [SelectionDAG] Add SEXT/AND/XOR/Or demanded elts support to ComputeNumSignBits
llvm-svn: 316875
2017-10-29 22:03:37 +00:00
Marshall Clow ccbb496b56 Initial triage
llvm-svn: 316874
2017-10-29 21:57:58 +00:00
Marshall Clow 4a9ee9caaa Update status of 2950
llvm-svn: 316873
2017-10-29 21:43:30 +00:00
Philip Pfaffe 53c803871e [Acc] Do not statically dispatch into IslNodeBuilder's createFor
Summary:
When GPUNodeBuilder creates loops inside the kernel, it dispatches to
IslNodeBuilder. This however is surprisingly dangerous, since it accesses the
AST Node's user through the wrong type. This patch fixes this problem by
overriding createFor correctly.

This fixes PR35010.

Reviewers: grosser, bollu, Meinersbur

Reviewed By: Meinersbur

Subscribers: Meinersbur, nemanjai, pollydev, llvm-commits, kbarton

Differential Revision: https://reviews.llvm.org/D39364

llvm-svn: 316872
2017-10-29 21:36:34 +00:00
Simon Pilgrim aa65159b0a [X86][SSE] Split ComputeNumSignBits SEXT/AND/XOR/OR demandedelts test
Max depth was being exceeded which could prevent some combines working

llvm-svn: 316871
2017-10-29 21:35:28 +00:00
Philip Pfaffe 9b1d1e6ae7 Fix two testcases. NFC intended.
Add missing %loadPolly directive to support out of tree builds. One of
the changes is somewhat bigger, because the directive turns on LLVM
names, and the testcase deosn't use those.

llvm-svn: 316870
2017-10-29 21:00:48 +00:00
Sanjay Patel adf38911d8 [(new) Pass Manager] instantiate SimplifyCFG with the same options as the old PM
The old PM sets the options of what used to be known as "latesimplifycfg" on the 
instantiation after the vectorizers have run, so that's what we'redoing here.

FWIW, there's a later SimplifyCFGPass instantiation in both PMs where we do not 
set the "late" options. I'm not sure if that's intentional or not.

Differential Revision: https://reviews.llvm.org/D39407

llvm-svn: 316869
2017-10-29 20:49:31 +00:00
Simon Pilgrim 61921f779f [X86][SSE] ComputeNumSignBits tests showing missing SEXT/AND/XOR/OR demandedelts support
llvm-svn: 316868
2017-10-29 20:49:27 +00:00
Marshall Clow 4e18fe9ac8 Issues to be voted on in ABQ
llvm-svn: 316867
2017-10-29 19:02:00 +00:00
Simon Pilgrim 7613a7b564 [SelectionDAG] Add SRA/SHL demanded elts support to ComputeNumSignBits
Introduce a isConstOrDemandedConstSplat helper function that can recognise a constant splat build vector for at least the demanded elts we care about.

llvm-svn: 316866
2017-10-29 18:19:37 +00:00
Simon Pilgrim b56fb4a2bb [X86][SSE] ComputeNumSignBits tests showing missing SHL/SRA demandedelts support
llvm-svn: 316865
2017-10-29 18:01:31 +00:00
Craig Topper 41d363fea1 [X86] Add a slow-incdec command line to atomic-eflags-reuse.ll
I believe the test_sub_1_cmp_1_setcc_ugt test case is being miscompiled in the fast inc/dec case.

llvm-svn: 316864
2017-10-29 17:15:09 +00:00
Rui Ueyama b6f4e722b1 Fix ubsan error that shift amount 64 is too large.
llvm-svn: 316863
2017-10-29 16:49:42 +00:00
Rui Ueyama ac6472535b Remove a redundant temporary variable.
llvm-svn: 316862
2017-10-29 16:46:39 +00:00
Craig Topper 495a1bc893 [X86] Remove combine that turns X86ISD::LSUB into X86ISD::LADD. Update patterns that depended on this.
If the carry flag is being used, this transformation isn't safe.

This does prevent some test cases from using DEC now, but I'll try to look into that separately.

Fixes PR35068.

llvm-svn: 316860
2017-10-29 06:51:04 +00:00
Craig Topper 7a60e29185 [X86] Fix typo in comment. NFC
llvm-svn: 316859
2017-10-29 06:51:02 +00:00
Saleem Abdulrasool 8ba8b02879 Driver: default to `unsigned int` `wchar_t` for ARM
AAPCS and AAPCS64 mandate that `wchar_t` with `-fno-short-wchar` is an
`unsigned int` rather than a `signed int`.  Ensure that the driver does
not flip the signedness of `wchar_t` for those targets.

Add additional tests to ensure that this does not regress.

llvm-svn: 316858
2017-10-29 06:01:14 +00:00
Craig Topper 912f3b8e4b [X86] Use the extended vector register classes in fast isel with AVX512F/VL.
llvm-svn: 316857
2017-10-29 05:14:26 +00:00
Craig Topper 5f2289a13c [X86] Add AVX512 support to X86FastISel::X86SelectFPExt and X86FastISel::X86SelectFPTrunc.
llvm-svn: 316856
2017-10-29 02:50:31 +00:00
Craig Topper 8373336a22 [X86] Use update_llc_test_checks.py to regenerate fast-isel-int-float-conversion.ll
llvm-svn: 316855
2017-10-29 02:25:48 +00:00
Craig Topper 7d1ed9ec83 [X86] Use update_llc_test_checks.py to regenerate fast-isel-fptrunc-fpext.ll
llvm-svn: 316854
2017-10-29 02:18:43 +00:00
Craig Topper 1e30d783dd [X86] Add AVX512 support to X86FastISel::X86MaterializeFP
llvm-svn: 316853
2017-10-29 02:18:41 +00:00
Peter Szecsi 07964fbdcb [analyzer] MisusedMovedObjectChecker: More precise warning message
Added new enum in order to differentiate the warning messages on "misusing" into
3 categories: function calls, moving an object, copying an object. (At the
moment the checker gives the same message in case of copying and moving.)

Additional test cases added as well.

Differential Revision: https://reviews.llvm.org/D38674

llvm-svn: 316852
2017-10-28 23:24:00 +00:00
Craig Topper 0692ca4bd2 [X86] Remove invalid code from LowerVSELECT.
This code attempted to say that v8i16/v16i16 VSELECT is legal if BWI and VLX are enabled, but the only way we could reach this point is if the condition was not a vXi1 type. Which means it really wasn't legal.

We don't have any tests that exercise this code. So I'm hoping it wasn't really reachable.

llvm-svn: 316851
2017-10-28 23:10:13 +00:00
Peter Szecsi 65f8f83a74 [analyzer] MisusedMovedObjectChecker: Fix false positive on state-resetting, handling method calls on base-class sub-objects
An earlier solution from Artem r315301 solves the reset problem, however, the
reports should be handled the same way in case of method calls. We should not
just report the base class of the object where the method was defined but the
whole object.

Fixed false positive which came from not removing the subobjects in case of a
state-resetting function. (Just replaced the State->remove(...) call to
removeFromState(..) which was defined exactly for that purpose.)

Some minor typos fixed in this patch as well which did not worth a whole new
patch in my opinion, so included them here.

Differential Revision: https://reviews.llvm.org/D31538

llvm-svn: 316850
2017-10-28 23:09:37 +00:00
Rui Ueyama da42135cef Fix ubsan error.
This patch fixes ubsan's "shift exponent 64 is too large for 32-bit type
'int'" error.

llvm-svn: 316849
2017-10-28 22:18:29 +00:00
Rui Ueyama bd730e3ca7 Reduce sizeof(Symbol) from 104 bytes to 88 bytes.
Finding aliases for shared symbols doesn't need st_shndx because
we can just compare st_value.

llvm-svn: 316848
2017-10-28 22:18:17 +00:00
Simon Pilgrim b37a24e82f [SelectionDAG] Add support for INSERT_SUBVECTOR to computeKnownBits
llvm-svn: 316847
2017-10-28 22:10:40 +00:00
Rui Ueyama 4a22edabec Do not handle DefinedCommon symbols in the MapFile writer.
Because of r314495 which converts DefinedCommon symbols to DefinedRegular
symbols, common symbols are no longer reachable to the MapFile writer.
So the code to handle common symbols is now dead.

llvm-svn: 316846
2017-10-28 21:11:38 +00:00
Simon Pilgrim 294f88dfa0 [X86][SSE] Combine 128-bit target shuffles to PACKSS/PACKUS.
llvm-svn: 316845
2017-10-28 20:51:27 +00:00
Simon Pilgrim bd3852aa5e [X86][SSE] Split off matchVectorShuffleWithPACK. NFCI.
Split matchVectorShuffleWithPACK from lowerVectorShuffleWithPACK so that we can reuse it for target shuffle combines

llvm-svn: 316844
2017-10-28 20:27:22 +00:00
Martin Storsjo d9e8909261 Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY
This restores the previous behaviour of the Registers_* classes
after SVN r316745.

Differential Revision: https://reviews.llvm.org/D39382

llvm-svn: 316843
2017-10-28 20:19:49 +00:00
Rui Ueyama 1392e84caf Rename V -> Ver for readability.
llvm-svn: 316842
2017-10-28 20:16:11 +00:00
Rui Ueyama 7f9694a42d Pass symbol attributes instead of ElfSym to Shared symbol ctor.
This change allows us to use less templates for Shared symbol and
the functions that deals with shared symbols.

llvm-svn: 316841
2017-10-28 20:15:56 +00:00