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13 Commits

Author SHA1 Message Date
Geoff Berry f8bf2ec0a8 [MachineOperand][Target] MachineOperand::isRenamable semantics changes 
Summary:
Add a target option AllowRegisterRenaming that is used to opt in to
post-register-allocation renaming of registers.  This is set to 0 by
default, which causes the hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq
fields of all opcodes to be set to 1, causing
MachineOperand::isRenamable to always return false.

Set the AllowRegisterRenaming flag to 1 for all in-tree targets that
have lit tests that were effected by enabling COPY forwarding in
MachineCopyPropagation (AArch64, AMDGPU, ARM, Hexagon, Mips, PowerPC,
RISCV, Sparc, SystemZ and X86).

Add some more comments describing the semantics of the
MachineOperand::isRenamable function and how it is set and maintained.

Change isRenamable to check the operand's opcode
hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq bit directly instead of
relying on it being consistently reflected in the IsRenamable bit
setting.

Clear the IsRenamable bit when changing an operand's register value.

Remove target code that was clearing the IsRenamable bit when changing
registers/opcodes now that this is done conservatively by default.

Change setting of hasExtraSrcRegAllocReq in AMDGPU target to be done in
one place covering all opcodes that have constant pipe read limit
restrictions.

Reviewers: qcolombet, MatzeB

Subscribers: aemerson, arsenm, jyknight, mcrosier, sdardis, nhaehnle, javed.absar, tpr, arichardson, kristof.beyls, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, niosHD, escha, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D43042

llvm-svn: 325931
 2018-02-23 18:25:08 +00:00
Krzysztof Parzyszek 119856430e [RDF] Clear the renamable flag when copy propagating reserved registers 
llvm-svn: 323831
 2018-01-30 23:19:44 +00:00
David Blaikie b3bde2ea50 Fix a bunch more layering of CodeGen headers that are in Target 
All these headers already depend on CodeGen headers so moving them into
CodeGen fixes the layering (since CodeGen depends on Target, not the
other way around).

llvm-svn: 318490
 2017-11-17 01:07:10 +00:00
Eugene Zelenko 52889219ef [Hexagon] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 
llvm-svn: 309746
 2017-08-01 21:20:10 +00:00
Krzysztof Parzyszek 7c69a3b490 [RDF] Use faster version of findBlock 
llvm-svn: 300704
 2017-04-19 15:11:23 +00:00
Krzysztof Parzyszek 0e7b1f83b7 [RDF] Remove the map of reaching defs from copy propagation 
Use Liveness::getNearestAliasedRef to find the reaching def instead.

llvm-svn: 297526
 2017-03-10 22:44:24 +00:00
Krzysztof Parzyszek 84cd4ea301 [RDF] Differentiate between defining and clobbering nodes 
Defining nodes should not alias with one another, while clobbering
nodes can. When pushing defs on stacks, push clobbers first, link
non-clobbering defs, then push the defs.

The data flow in a statement is now: uses -> clobbers -> defs.

llvm-svn: 295356
 2017-02-16 18:53:04 +00:00
Krzysztof Parzyszek 445bd12621 [RDF] Switch RegisterRef to be a pair (Register, LaneMask) 
Use PackedRegisterRef to store the register information in the graph nodes.

This commit also removes support for virtual registers. It has never been
tested or used. It will be possible to add it back if there is a need.

llvm-svn: 284255
 2016-10-14 17:57:55 +00:00
Krzysztof Parzyszek a77fe4eef3 [RDF] Replace RegisterAliasInfo with target-independent code using lane masks 
llvm-svn: 283122
 2016-10-03 17:14:48 +00:00
Benjamin Kramer 922efd7a67 [hexagon] Move BlockRanges and RDF stuff into the llvm namespace. 
No functional change intended.

llvm-svn: 270980
 2016-05-27 10:06:40 +00:00
Krzysztof Parzyszek efd72857a3 [RDF] Handle undefined registers in RDF copy propagation 
When updating the graph, make sure that new uses without reaching defs
are handled correctly.

llvm-svn: 267891
 2016-04-28 15:09:19 +00:00
Krzysztof Parzyszek adc64b7df0 [RDF] Improvements to copy propagation 
- Allow any instruction to define equality between registers.
- Keep the DFG updated.

llvm-svn: 258075
 2016-01-18 20:43:57 +00:00
Krzysztof Parzyszek c09d630e50 RDF: Copy propagation 
This is a very limited implementation of DFG-based copy propagation.
It only handles actual COPY instructions (does not handle other equivalents
such as add-immediate with a 0 operand).
The major limitation is that it does not update the DFG: that will be the
change required to make it more robust (hopefully coming up soon).

llvm-svn: 257490
 2016-01-12 17:23:48 +00:00