Commit Graph

170990 Commits

Author SHA1 Message Date
Daniel Sanders cefddb2ca6 Revert r205194 - [mips] Removed R_MIPS_GOT. It's identical to R_MIPS_GOT16.
There's a couple additional bits I missed.

llvm-svn: 205195
2014-03-31 14:34:36 +00:00
Daniel Sanders a104300dbe [mips] Removed R_MIPS_GOT. It's identical to R_MIPS_GOT16.
llvm-svn: 205194
2014-03-31 14:30:05 +00:00
Daniel Jasper 240dfda352 clang-format: Solve issues found and fixed by clang-tidy.
llvm-svn: 205193
2014-03-31 14:23:49 +00:00
Evgeniy Stepanov 3c95744de8 [msan] Remove an extra top frame from track-origins=2 reports.
llvm-svn: 205192
2014-03-31 14:18:55 +00:00
Rafael Espindola 2378d4c0ce Capitalize the D in parseDirectiveGpDWord.
DWord seems to be the canonical way to camel case dword in llvm.

Thanks to Daniel Sander for noticing.

llvm-svn: 205191
2014-03-31 14:15:07 +00:00
Dmitri Gribenko 1c1f487654 Remove unused private typedef
llvm-svn: 205190
2014-03-31 14:14:13 +00:00
NAKAMURA Takumi 8e5f80d2cf clang/tools/driver/Makefile: Quick fix corresponding to r205181.
llvm-svn: 205189
2014-03-31 14:11:11 +00:00
Tom Stellard 30f59417cf R600/SI: Implement SIInstrInfo::isTriviallyRematerializable()
llvm-svn: 205188
2014-03-31 14:01:56 +00:00
Tom Stellard 7ea3d6d420 R600/SI: Lower i64 SELECT by bitcasting to a vector type
This allows allows us to replace ISD::EXTRACT_ELEMENT, which is lowered
using shifts, with ISD::EXTRACT_VECTOR_ELT, which is a no-op.

llvm-svn: 205187
2014-03-31 14:01:55 +00:00
Tom Stellard 7277b008ee R600/SI: Return the correct index for VGPRs in getHWRegIndex()
The register index is stored in the low 8-bits of the encoding.

llvm-svn: 205186
2014-03-31 14:01:52 +00:00
Zoran Jovanovic 9b05a31f76 Fixed issue with microMIPS JAL instruction.
Differential Revision: http://llvm-reviews.chandlerc.com/D3200

llvm-svn: 205185
2014-03-31 14:00:10 +00:00
Evgeniy Stepanov ff127bff89 [sanitizer] Test that we can compile C++ code on the target platform.
llvm-svn: 205184
2014-03-31 13:50:13 +00:00
Alexey Samsonov 78a8435fd6 [CMake] Rename add_compiler_rt_static_runtime to add_compiler_rt_runtime.
Soon there will be an option to build compiler-rt parts as shared libraries
on Linux. Extracted from http://llvm-reviews.chandlerc.com/D3042
by Yuri Gribov.

llvm-svn: 205183
2014-03-31 13:45:36 +00:00
NAKAMURA Takumi 66f560903f llvm/test/MC/Mips/mips64r2/valid-xfail.s: This REQUIRES asserts. Seems it doesn't fail with -Asserts.
llvm-svn: 205182
2014-03-31 13:30:02 +00:00
Aaron Ballman 2fbf99429a Reapplying r204952 a second time.
Clean up the __has_attribute implementation without modifying its behavior. 

Replaces the tablegen-driven AttrSpellings.inc, which lived in the lexing layer with AttrHasAttributeImpl.inc, which lives in the basic layer. Updates the preprocessor to call through to this new functionality which can take additional information into account (such as scopes and syntaxes).

Expose the ability for parts of the compiler to ask whether an attribute is supported for a given spelling (including scope), syntax, triple and language options.

llvm-svn: 205181
2014-03-31 13:14:44 +00:00
Daniel Sanders 8aa19c1392 [mips] Added a full set of instruction test cases for all ISA's (but not ASE's).
Summary:
Where those ISA's are not currently supported, the test is run with the smallest
superset of that ISA.

Some instructions are valid but don't pass yet. These have been placed in the
valid-xfail.s's which will XPASS if _any_ instruction starts working.

The valid.s's do not verify the encoding yet. There are also no tests checking that instructions from neighbouring ISA's are not accepted.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3214

llvm-svn: 205180
2014-03-31 12:13:12 +00:00
Hal Finkel 02807595fb Look at shuffles of build_vectors in DAGCombiner::visitEXTRACT_VECTOR_ELT
When the loop vectorizer vectorizes code that uses the loop induction variable,
we often end up with IR like this:

  %b1 = insertelement <2 x i32> undef, i32 %v, i32 0
  %b2 = shufflevector <2 x i32> %b1, <2 x i32> undef, <2 x i32> zeroinitializer
  %i = add <2 x i32> %b2, <i32 2, i32 3>

If the add in this example is not legal (as is the case on PPC with VSX), it
will be scalarized, and we'll end up with a number of extract_vector_elt nodes
with the vector shuffle as the input operand, and that vector shuffle is fed by
one or more build_vector nodes. By the time that vector operations are
expanded, visitEXTRACT_VECTOR_ELT will not create new extract_vector_elt by
looking through the vector shuffle (to make sure that no illegal operations are
created), and so the extract_vector_elt -> vector shuffle -> build_vector is
never simplified to an operand of the build vector.

By looking at build_vectors through a shuffle we fix this particular situation,
preventing a vector from being built, only to be deconstructed again (for the
scalarized add) -- an expensive proposition when this all needs to be done via
the stack. We probably want a more comprehensive fix here where we look back
recursively through any shuffles to any build_vectors or scalar_to_vectors,
etc. but that can come later.

llvm-svn: 205179
2014-03-31 11:43:19 +00:00
Timur Iskhodzhanov 9ae7d3bd5f Slightly improve the readability of MicrosoftVTableContext::computeVTablePaths(). No functionality changes.
llvm-svn: 205178
2014-03-31 11:01:51 +00:00
Daniel Sanders daf7c022c9 [mips] Check emitted code for llvm.bswap.i32 on MIPS16/MIPS64 and llvm.bswap.i64 on MIPS16.
While reviewing r204163, I noticed that the MIPS16 test only checked for a .ent
directive and didn't actually check the code emitted. Fixed this and added a
check for llvm.bswap.i32 on MIPS64 at the same time.

llvm-svn: 205177
2014-03-31 11:00:04 +00:00
Alexander Potapenko 0315b52444 [TSan] Follow-up for r205175: typo fix in the test.
llvm-svn: 205176
2014-03-31 10:51:13 +00:00
Alexander Potapenko 0426176940 [TSan] Replace several Printf() calls with Report() to ease debugging.
llvm-svn: 205175
2014-03-31 10:46:07 +00:00
Tim Northover 241856e5f8 ARM64: fix a couple of signed/unsigned comparison warnings.
llvm-svn: 205174
2014-03-31 10:21:36 +00:00
Daniel Sanders 9cf3d3b764 [yaml2obj] Add support for ELF e_flags.
Summary:
The FileHeader mapping now accepts an optional Flags sequence that accepts
the EF_<arch>_<flag> constants. When not given, Flags defaults to zero.

Reviewers: atanasyan

Reviewed By: atanasyan

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D3213

llvm-svn: 205173
2014-03-31 09:44:05 +00:00
Alexey Volkov ae43aae96a Added _rdtsc intrinsics by Robert Khasanov
Differential Revision: http://llvm-reviews.chandlerc.com/D3212

llvm-svn: 205172
2014-03-31 08:08:46 +00:00
Alexey Samsonov 23aaf2a182 Try to fix MSan bootstrap bot: make ARM64Disassembler::getInstruction() always initialize Size argument.
llvm-svn: 205171
2014-03-31 07:59:33 +00:00
Yaron Keren 070a752d7e Correct OS conditionals following r204977 and r204978.
Previously, MinGW OS was Triple::MinGW and Cygwin was Triple::Cygwin
and now it is Triple::Win32 with Environment being GNU or Cygwin.
So,

  TheTriple.getOS() == Triple::Win32 
  
is replaced by

  TheTriple.isWindowsMSVCEnvironment()

and

  (TheTriple.getOS() == Triple::MinGW32 || TheTriple.getOS() == Triple::Cygwin)
  
is replaced by

  TheTriple.isOSCygMing()

llvm-svn: 205170
2014-03-31 07:59:14 +00:00
Dmitri Gribenko f461da5306 Remove unused variable
llvm-svn: 205169
2014-03-31 07:52:35 +00:00
Kostya Serebryany 683d55f50e [sanitizer] speed up the bitvector-based deadlock detector by ~15% (iterate over the currently held locks using the array, not the bitvector. Bitvector is not the best data structure to iterate over)
llvm-svn: 205168
2014-03-31 07:23:50 +00:00
Tim Northover 6166ec21be ARM64: remove currently trivial switch statement
llvm-svn: 205167
2014-03-31 07:20:13 +00:00
Craig Topper ec82847a64 [C++11] Mark more classes in the X86 target as 'final'.
llvm-svn: 205166
2014-03-31 06:53:13 +00:00
Craig Topper 26eec09d84 Mark a couple of the X86 target classes as final. Allows the compiler to de-virtualize some internal calls.
llvm-svn: 205165
2014-03-31 06:22:15 +00:00
Alexey Bataev d48bcd8a46 [OPENMP] Implemented 'copyin' clause
llvm-svn: 205164
2014-03-31 03:36:38 +00:00
Shankar Easwaran 79cfed55fc [core] support .gnu.linkonce sections
.gnu.linkonce sections are similar to section groups. They were supported before
section groups existed and provided a way to resolve COMDAT sections using a
different design. There are few implementations that use .gnu.linkonce sections
to store simple floating point constants which doesnot require complex section
group support but need a way to store only one copy of the floating point
constant. .gnu.linkonce based symbol resolution achieves that.

llvm-svn: 205163
2014-03-31 03:16:37 +00:00
NAKAMURA Takumi 82ec13e3d5 ARM64CollectLOH.cpp: Tweak \param. [-Wdocumentation]
llvm-svn: 205162
2014-03-31 01:10:26 +00:00
Chandler Carruth d28515af31 [ARM64] Fix materialization of an fp128 zero immediate. There currently
is not a pattern to lower this with clever instructions that zero the
register, so restrict the zero immediate legality special case to f64
and f32 (the only two sizes which fmov seems to directly support). Fixes
backend errors when building code such as libxml.

llvm-svn: 205161
2014-03-31 00:02:10 +00:00
Nico Weber 9ee5f9190b Add documentation for the pcs attribute, based on r129534's commit message.
llvm-svn: 205160
2014-03-30 19:45:58 +00:00
Adam Nemet 6dafe97271 [X86] Adjust cost of FP_TO_UINT v8f32->v8i32
There is no direct AVX instruction to convert to unsigned.  I have some ideas
how we may be able to do this with three vector instructions but the current
backend just bails on this to get it scalarized.

See the comment why we need to adjust the cost returned by BasicTTI.

The test is a bit roundabout (and checks assembly rather than bit code) because
I'd like it to work even if at some point we could vectorize this conversion.

Fixes <rdar://problem/16371920>

llvm-svn: 205159
2014-03-30 18:07:13 +00:00
Tim Northover 65f582f432 RTTI: refactor the uniqueness question into CGCXXABI.
This also brings the code into closer conformance with usual LLVM
coding style and other surrounding conventions.

llvm-svn: 205158
2014-03-30 17:32:48 +00:00
Stepan Dyatkovskiy 8baf17fc5f PR18929:
According to ARM assembler language hash symbol is optional before immediates.
For example, see here for more details:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473j/dom1359731154529.html

llvm-svn: 205157
2014-03-30 17:09:54 +00:00
David Majnemer 981c306e4a MS ABI: Correct typo in mangleStringLiteral
No functionality change.

llvm-svn: 205156
2014-03-30 16:38:02 +00:00
David Majnemer 8265decf46 MS ABI: Simplify mangleTemplateArgs
No functionality change.

llvm-svn: 205154
2014-03-30 16:30:54 +00:00
Hal Finkel 90adf0fe06 Make use of previously generated stores in SelectionDAGLegalize::ExpandExtractFromVectorThroughStack
When expanding EXTRACT_VECTOR_ELT and EXTRACT_SUBVECTOR using
SelectionDAGLegalize::ExpandExtractFromVectorThroughStack, we store the entire
vector and then load the piece we want. This is fine in isolation, but
generating a new store (and corresponding stack slot) for each extraction ends
up producing code of poor quality. When we scalarize a vector operation (using
SelectionDAG::UnrollVectorOp for example) we generate one EXTRACT_VECTOR_ELT
for each element in the vector. This used to generate one stored copy of the
vector for each element in the vector. Now we search the uses of the vector for
a suitable store before generating a new one, which results in much more
efficient scalarization code.

llvm-svn: 205153
2014-03-30 15:10:18 +00:00
NAKAMURA Takumi c1e8aa06aa clang/test/Preprocessor/headermap-rel2.c: Recognize dos path.
llvm-svn: 205152
2014-03-30 15:09:08 +00:00
Tim Northover 4b9a505a5e Use defined(__APPLE__) rather than __APPLE__
llvm-svn: 205150
2014-03-30 14:59:12 +00:00
Chandler Carruth 705cd965e3 Force a header file input to the headermap test to have different
contents than the header file by the same name under the system header
search root. Surprisingly, this is required to get the test to pass on
some systems.

So, it turns out that there exist filesystems in the world which unique
the inode of all files based on their contents. This results in two
files with the same contents at different paths suddenly having the same
inode. This doesn't actually cause any problems in practice as the
contents are the same, and the path used to access the files are the
same. However, it can cause tests like this one to be more brittle
because the file manager ends up de-duplicating the file entries by
inode. We don't have any other really easy ways to observe the behavior
shift because the whole point is that the #include written in the source
code doesn't contain the information -- instead it is contained in the
header map.

If folks have other solutions they would prefer, I'm more than happy to
work on them, but this seems a reasonable way to ensure that the test in
question exercises the code it wants to exercise.

llvm-svn: 205149
2014-03-30 14:04:32 +00:00
NAKAMURA Takumi 411d35e25e llvm/test/MC/ELF/nocompression.s: Loosen an expression to match "llvm-mc.EXE".
llvm-svn: 205148
2014-03-30 14:04:00 +00:00
Chandler Carruth 1ae5a684a7 [ARM64] Use %clang_cc1 consistently in the new arm64 codegen tests.
Really, all tests outside of the Driver tree should use %clang_cc1, but
these are new and easy to fix, and many of them use buitlin headers
which don't work as well without using %clang_cc1.

llvm-svn: 205147
2014-03-30 13:40:57 +00:00
Hal Finkel 5c0d1454d6 [PowerPC] Handle VSX v2i64 SIGN_EXTEND_INREG
sitofp from v2i32 to v2f64 ends up generating a SIGN_EXTEND_INREG v2i64 node
(and similarly for v2i16 and v2i8). Even though there are no sign-extension (or
algebraic shifts) for v2i64 types, we can handle v2i32 sign extensions by
converting two and from v2i64. The small trick necessary here is to shift the
i32 elements into the right lanes before the i32 -> f64 step. This is because
of the big Endian nature of the system, we need the i32 portion in the high
word of the i64 elements.

For v2i16 and v2i8 we can do the same, but we first use the default Altivec
shift-based expansion from v2i16 or v2i8 to v2i32 (by casting to v4i32) and
then apply the above procedure.

llvm-svn: 205146
2014-03-30 13:22:59 +00:00
Hal Finkel ecdb454aa7 [PowerPC] Make -pg generate calls to _mcount not mcount
At least on REL6 (Linux/glibc 2.12), the proper symbol for generating gprof
data is _mcount, not mcount. Prior to this change, compiling with -pg would
generate linking errors (because of unresolved references to mcount), after
this change -pg seems at least minimally functional.

llvm-svn: 205144
2014-03-30 13:00:06 +00:00
Chandler Carruth 9df0fd4018 [Allocator] Lift the slab size and size threshold into template
parameters rather than runtime parameters.

There is only one user of these parameters and they are compile time for
that user. Making these compile time seems to better reflect their
intended usage as well.

llvm-svn: 205143
2014-03-30 12:07:07 +00:00