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150921 Commits

Author SHA1 Message Date
Evgeniy Stepanov cead69d4a3 [sanitizer] Handle SIOCGIFCONF ioctl. 
llvm-svn: 183529
 2013-06-07 15:49:38 +00:00
Vincent Lejeune 931bb768fd R600: Remove an extra break in R600OptimizeVectorRegisters.cpp 
llvm-svn: 183528
 2013-06-07 15:44:53 +00:00
Alexey Samsonov 4fdf8d66a9 [ASan] fix test case to use absolute paths 
llvm-svn: 183527
 2013-06-07 15:44:21 +00:00
Alexey Samsonov 35c987dc11 [llvm-symbolizer] rewrite r183213 in a more clear way 
llvm-svn: 183526
 2013-06-07 15:25:27 +00:00
Benjamin Kramer 9675a0dbec BitVector: Do the right thing in all() when Size is a multiple of BITWORD_SIZE. 
llvm-svn: 183525
 2013-06-07 15:14:31 +00:00
Alexander Potapenko 6af3fce55e [ASan] An early return from InitializeAsanInterceptors() on Mac has been considered unobvious. 
Remove it and replace ASAN_INTERCEPT_FUNC with a no-op if SANITIZER_MAC==1.

llvm-svn: 183524
 2013-06-07 15:10:02 +00:00
Evgeniy Stepanov c24e13e7bb [sanitizer] Fix Android build. 
llvm-svn: 183523
 2013-06-07 14:56:54 +00:00
Howard Hinnant e7b6d544f0 Test case for r183481. 
llvm-svn: 183522
 2013-06-07 14:24:18 +00:00
Benjamin Kramer 2566e0498c Optimize BitVector::all(). 
llvm-svn: 183521
 2013-06-07 14:14:38 +00:00
Evgeniy Stepanov 74dcb1a8de [sanitizer] Fix windows build. 
llvm-svn: 183518
 2013-06-07 13:19:33 +00:00
Evgeniy Stepanov 0b1f41b6f4 [sanitizer] ioctl interceptor. 
ASan: disabled by default
MSan: enabled by default
TSan: disabled
llvm-svn: 183517
 2013-06-07 13:00:47 +00:00
Manuel Klimek 8122830a67 Adds a test that verifies angle bracket locations. 
Regression test to make sure TemplateSpecializationTypeLocs have the
correct locations for angle brackets.

llvm-svn: 183514
 2013-06-07 11:27:57 +00:00
Manuel Klimek e29ec9680a Reverts r183466: "Perform dynamic alignment computations..." 
This introduces bugs in TemplateSpecializationTypeLoc's angle bracket
locations.

Regression test follows in a subsequent commit.

llvm-svn: 183513
 2013-06-07 11:27:53 +00:00
Benjamin Kramer f0ec199448 Fold variable that's only used in assert into the assert. 
Avoids unused variable warnings in Release builds.

llvm-svn: 183512
 2013-06-07 11:23:35 +00:00
Bill Wendling ee30e83ca8 Add a script to help us create source tar balls for the release. 
llvm-svn: 183509
 2013-06-07 11:15:30 +00:00
Bill Wendling e82e1ff8e6 Use proper exit code. 
llvm-svn: 183508
 2013-06-07 11:14:37 +00:00
Alexey Samsonov 575c599554 Drop support for 32-bit PowerPC in sanitizer tools. 
llvm-svn: 183499
 2013-06-07 09:44:43 +00:00
Alexey Samsonov 889e3ab83c [ASan] create separate configs for running ASan lit tests in both 32- and 64-bit mode. Clean up RUN-lines in tests. 
llvm-svn: 183498
 2013-06-07 09:38:55 +00:00
Duncan Sands e0a607e376 Correct wrong register in this example, pointed out by Baoshan Pang. 
llvm-svn: 183495
 2013-06-07 08:30:55 +00:00
Bill Wendling 5e7656bf0c Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

No functionality change intended.

llvm-svn: 183494
 2013-06-07 07:55:53 +00:00
Bill Wendling ead89ef63e Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

llvm-svn: 183493
 2013-06-07 07:04:14 +00:00
Bill Wendling f535821364 Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

llvm-svn: 183492
 2013-06-07 06:30:15 +00:00
Bill Wendling 90bee83c38 Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

llvm-svn: 183491
 2013-06-07 06:26:43 +00:00
Bill Wendling 4a7a408eaa Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

llvm-svn: 183490
 2013-06-07 06:19:56 +00:00
Michael Gottesman 9e7261c874 [objc-arc] Ensure that the cfg path count does not overflow when we multiply TopDownPathCount/BottomUpPathCount. 
rdar://12480535

llvm-svn: 183489
 2013-06-07 06:16:49 +00:00
Bill Wendling f95178e679 Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

llvm-svn: 183488
 2013-06-07 05:54:19 +00:00
Faisal Vali c0a80bdf7f Reverting test commit 
llvm-svn: 183487
 2013-06-07 05:33:21 +00:00
Faisal Vali 9733366fba test commit 
llvm-svn: 183486
 2013-06-07 05:19:33 +00:00
Bill Wendling 496dc33b9f Don't cache the instruction info and register info objects. 
These objects are internal to the TargetMachine object and may change.

llvm-svn: 183485
 2013-06-07 05:00:11 +00:00
Manman Ren 60711600da DIBuilder: No functionality change. 
Use the correct DIType when creating vector types.

llvm-svn: 183484
 2013-06-07 03:13:46 +00:00
Richard Smith c3d2ebb60f PR16243: Use CXXThisOverride during template instantiation, and fix up the 
places which weren't setting it up properly. This allows us to get the right
cv-qualifiers for 'this' when it appears outside a method body in a class
template.

llvm-svn: 183483
 2013-06-07 02:33:37 +00:00
Enrico Granata a1acb49188 Tweaking Daniel Malea's fixes to Makefile.rules to ensure that we correctly pass -stdlib=libstdc++ to clang when compiling as well as when linking 
Not doing this was causing link errors as clang was looking for libc++ symbols while linking against libstdc++

llvm-svn: 183482
 2013-06-07 01:58:52 +00:00
Howard Hinnant 30444adc70 Minor bug fix for allowing an extension of const-qualified types in containers. 
llvm-svn: 183481
 2013-06-07 01:56:37 +00:00
Enrico Granata 1a8aa4c04e Tweaks to the std::list (libstdc++ test case) 
llvm-svn: 183480
 2013-06-07 01:53:59 +00:00
Eli Friedman c9817fdf16 When we're synthesizing copy/move-assignment, we can't form a reference to an 
invalid field; make sure we don't try.  Fixes <rdar://problem/14084171>.

llvm-svn: 183479
 2013-06-07 01:48:56 +00:00
Rui Ueyama 8d6151fd29 [PECOFF][Writer] Implement the writer that can emit text section. 
lld can now output a valid Windows executable with a text section that does nothing
but just returns immediately. It's not able to handle relocations, symbol tables,
data sections, etc, so it still can't do anything practical, though.

Reviewers: Bigcheese

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D892

llvm-svn: 183478
 2013-06-07 01:31:51 +00:00
Arnold Schwaighofer c5893da32d ARM sched model: Use the right resources for DIV 
llvm-svn: 183477
 2013-06-07 01:16:15 +00:00
Jim Ingham e96ade8bf6 Make the "SearchFilterByModuleListAndCU" work correctly for searches at the CompUnit 
level.  Fixes a bug in "break set --source-pattern-regexp" when a shared library is
specified.  

Also cleaned up the help text for --source-pattern-regexp so it is a little clearer.

<rdar://problem/14084261>

llvm-svn: 183476
 2013-06-07 01:13:00 +00:00
Adrian Prantl 817bbb3a81 documentation: remove confusing reference to properties. 
llvm-svn: 183475
 2013-06-07 01:10:48 +00:00
Adrian Prantl b8fad1a37c ObjC Debug Info: Emit the names of accessors whenever they diverge from 
the default names, not just when the isImplicit flag is set.

rdar://problem/14035789

llvm-svn: 183474
 2013-06-07 01:10:45 +00:00
Adrian Prantl c4de1ef38c Improve documentation. 
llvm-svn: 183473
 2013-06-07 01:10:41 +00:00
Arnold Schwaighofer 5f0a2ce542 ARM sched model: Add VFP div instruction on Swift 
Reapply 183271.

llvm-svn: 183472
 2013-06-07 01:10:36 +00:00
Fariborz Jahanian 44d23b85d9 blocks: fixes an ast bug when block pointer variable 
is evaluated in a condition expression and then
dereferenced to envoke the block. This is
pr15663 and I applied a slight variation of the
patch with a test case. (patch is from
Arthur O'Dwyer). Also // rdar://14085217

llvm-svn: 183471
 2013-06-07 00:48:14 +00:00
Greg Clayton 649f8b9b0b <rdar://problem/14086944> 
lldb doesn't autocomplete objective C class methods. The regular expression was looking for strings that started with the completion string that was passed in. For objective C class methods, this string starts with "+" which wasn't being escaped. Added many other escapes that were missing just in case.

llvm-svn: 183470
 2013-06-07 00:35:40 +00:00
Jim Ingham 679f6b7c2f Document the extended detach packet. 
llvm-svn: 183469
 2013-06-07 00:22:49 +00:00
Tim Northover 0ae9391824 Diagnose malformed x86 inline asm using 'y' constraint. 
X86's 'y' inline assembly constraint represents an MMX register, this change
prevents Clang from hitting an assertion when passed an incompatible type to
deal with.

llvm-svn: 183467
 2013-06-07 00:04:50 +00:00
Eli Friedman 0b3175a6fc Perform dynamic alignment computations so that the data in TypeLocs is 
correctly aligned.  Not performing such computations led to misaligned loads,
which crash on some platforms and are generally bad on other platforms.

The implementation of TypeLocBuilder::pushImpl is rather messy; code using
TypeLocBuilder accidentally assumes that partial TypeLocs are
laid out like a complete TypeLoc.  As a followup, I intend to work on
fixing the TypeLocBuilder API to avoid exposing partial TypeLocs; this should
substantially simplify the implemementation.

Fixes PR16144.

llvm-svn: 183466
 2013-06-07 00:04:31 +00:00
Arnold Schwaighofer f84a03a589 CodeGenSchedule: Use resize instead of copying a vector 
llvm-svn: 183465
 2013-06-07 00:04:30 +00:00
Arnold Schwaighofer a30936a33b ARM sched model: Add SIMD/VFP load/store instructions on Swift 
Reapply 183270 again (because three is a magic number).

This should now no longer seg fault after r183459.

llvm-svn: 183464
 2013-06-07 00:04:28 +00:00
Venkatraman Govindaraju dc82ac0dcc [Sparc]: Use cmp instruction instead of subcc to compare integers. 
llvm-svn: 183463
 2013-06-07 00:03:36 +00:00