Commit Graph

423400 Commits

Author SHA1 Message Date
Jan Korous ce583b14b2 [utils] Avoid hardcoding metadata ids in update_cc_test_checks
Specifically for: !tbaa, !tbaa.struct, !annotation, !srcloc, !nosanitize.

The goal is to avoid test brittleness caused by hardcoded values.

Differential Revision: https://reviews.llvm.org/D123273
2022-05-10 10:17:45 -07:00
Matthias Braun f0ea9c9cec CodeGenPrepare: Replace constant PHI arguments with switch condition value
We often see code like the following after running SCCP:

    switch (x) { case 42: phi(42, ...); }

This tends to produce bad code as we currently materialize the constant
phi-argument in the switch-block. This increases register pressure and
if the pattern repeats for `n` case statements, we end up generating `n`
constant values.

This changes CodeGenPrepare to catch this pattern and revert it back to:

    switch (x) { case 42: phi(x, ...); }

Differential Revision: https://reviews.llvm.org/D124552
2022-05-10 10:00:10 -07:00
Matthias Braun cd19af74c0 Avoid 8 and 16bit switch conditions on x86
This adds a `TargetLoweringBase::getSwitchConditionType` callback to
give targets a chance to control the type used in
`CodeGenPrepare::optimizeSwitchInst`.

Implement callback for X86 to avoid i8 and i16 types where possible as
they often incur extra zero-extensions.

This is NFC for non-X86 targets.

Differential Revision: https://reviews.llvm.org/D124894
2022-05-10 10:00:10 -07:00
Matthias Braun 75e50f70c6 Use update_llc_test_checks for the switch.ll test; add new test
- Change `switch.ll` test to a style suitable for
  `tools/update_llc_test_checks.py`.
- Precommit test for upcoming changes:
  - Add `switch_i8` to `test/CodeGen/X86/switch.ll`.
  - Add `test/CodeGen/X86/switch-phi-const.ll`.

Differential Revision: https://reviews.llvm.org/D124893
2022-05-10 10:00:10 -07:00
Kadir Cetinkaya 3137ca80b9
[clangd] Support for standard inlayHint protocol
- Make clangd's internal representation more aligned with the standard.
  We keep range and extra inlayhint kinds around, but don't serialize
  them on standard version.
- Have custom serialization for extension (ugly, but going to go away).
- Support both versions until clangd-17.
- Don't advertise extension if client has support for standard
  implementation.
- Log a warning at startup about extension being deprecated, if client
  doesn't have support.

Differential Revision: https://reviews.llvm.org/D125228
2022-05-10 18:59:15 +02:00
Mike Rice 1a02519bc5 [OpenMP] Add mangling support for linear modifiers (ref,uval,val)
Add mangling for linear parameters specified with ref, uval, and val
for 'omp declare simd' vector functions.

Add missing stride for linear this parameters.

Differential Revision: https://reviews.llvm.org/D125269
2022-05-10 09:56:55 -07:00
Tsukasa OI 7fe0630fcb [RISCV] 'K'-extension ordering
This commit adds 'K' to supported extension list (before 'J').
It makes "Zk*" extensions correctly placed before "Zv*" extensions.

Multi-letter "Z*" extensions are first ordered with the most closely
related alphabetical extension category ("IMAF...").  This is represented
in LLVM as `AllStdExts' variable in `llvm/lib/Support/RISCVISAInfo.cpp'.

However, it did not have 'k' making "Zk*" extensions not correctly ordered.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D124340
2022-05-11 00:52:00 +08:00
Krzysztof Drewniak 814b605095 [mlir][AMDGPU] Add AMDGPU conversion patterns to ConvertGPUToROCDL
This ensures that attributes such as the index bitwidth propagate
correctly to the AMDGPUToROCDL patterns.

Differential Revision: https://reviews.llvm.org/D125320
2022-05-10 16:49:11 +00:00
Konstantin Varlamov 8200e1253f [libc++][ranges] Implement `views::drop`.
The view itself has been implemented previously -- this patch only adds
the ability to pipe it.

Also finishes the implementation of [P1739](https://wg21.link/p1739) and
[LWG3407](https://wg21.link/lwg3407).

Differential Revision: https://reviews.llvm.org/D125156
2022-05-10 09:31:05 -07:00
David Green 442c351b2b Revert "[AArch64] Generate AND in place of CSEL for predicated CTTZ"
This reverts commit 7dcd0ea683 due to
issues reported postcommit with the correctness of truncated cttzs.
2022-05-10 17:17:03 +01:00
Craig Topper 4b36d9bde7 [CVP] Preserve exact name when converting sext->zext and ashr->lshr.
Previously we took the old name and always appended a numberic suffix.
Since we're doing a 1:1 replacement, it's clearer to keep the original
name exactly.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D125281
2022-05-10 09:13:59 -07:00
Craig Topper 7b362ddda9 [SCCP] Preserve Name when converting SExt->ZExt.
This makes the output IR more readable since we're doing a one to
one replacement.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D125280
2022-05-10 09:13:59 -07:00
Peter Klausler 940871dd28 [flang] Enforce limit on rank + corank
Fortran 2018 requires that a compiler allow objects whose rank + corank
is 15, and that's our maximum; detect and diagnose violations.

Differential Revision: https://reviews.llvm.org/D125153
2022-05-10 08:53:08 -07:00
Nikita Popov c813516ef8 [InstCombine] Add additional freeze tests (NFC) 2022-05-10 17:43:48 +02:00
Ivan Kosarev 88f04bdbd8 [AMDGPU][GFX10] Support base+soffset+offset SMEM loads.
Also makes a step towards resolving
https://github.com/llvm/llvm-project/issues/38652

Reviewed By: foad, dp

Differential Revision: https://reviews.llvm.org/D125117
2022-05-10 16:17:14 +01:00
Aaron Ballman ca75ac5f04 Diagnose unreachable generic selection associations
The controlling expression of a _Generic selection expression undergoes
lvalue conversion, array conversion, and function conversion before
picking the association. This means that array types, function types,
and qualified types are all unreachable code if they're used as an
association. I've been caught by this twice in the past few months and
I figure that if a WG14 member can't seem to remember this rule, users
are also likely to struggle with it. So this adds an on-by-default
unreachable code diagnostic for generic selection expression
associations.

Note, we don't have to worry about function types as those are already
a constraint violation which generates an error.

Differential Revision: https://reviews.llvm.org/D125259
2022-05-10 11:15:56 -04:00
Peter Klausler 71728360ad [flang] Fold real-valued MODULO() and MOD()
Evaluate real-valued references to the intrinsic functions MODULO
and MOD at compilation time without recourse to an external math
library.

Differential Revision: https://reviews.llvm.org/D125151
2022-05-10 08:15:29 -07:00
Louis Dionne 671afac89d [libc++abi][NFC] Fix typo in comment 2022-05-10 11:15:16 -04:00
Ashay Rane 53ff0daa7e
[mlir] Fail early if AnalysisState::getBuffer() returns failure
This patch updates calls to AnalysisState::getBuffer() so that we return
early with a failure if the call does not succeed.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D125251
2022-05-10 08:08:38 -07:00
Daniel Bertalan 93a8225da1 [CodeGen] Use ABI alignment for C++ new expressions
In case of placement new, if we do not know the alignment of the
operand, we can't assume it has the preferred alignment. It might be
e.g. a pointer to a struct member which follows ABI alignment rules.

This makes UBSAN no longer report "constructor call on misaligned
address" when constructing a double into a struct field of type double
on i686. The psABI specifies an alignment of 4 bytes, but the preferred
alignment used by Clang is 8 bytes.

We now use ABI alignment for allocating new as well, as the preferred
alignment should be used for over-aligning e.g. local variables, which
isn't relevant for ABI code dealing with operator new. AFAICT there
wouldn't be problems either way though.

Fixes #54845.

Differential Revision: https://reviews.llvm.org/D124736
2022-05-10 16:02:23 +01:00
Krzysztof Drewniak f1f05a91ca [MLIR][AMDGPU] Add AMDGPU dialect, wrappers around raw buffer intrinsics
By analogy with the NVGPU dialect, introduce an AMDGPU dialect for
AMD-specific intrinsic wrappers.

The dialect initially includes wrappers around the raw buffer intrinsics.

On AMD GPUs, a memref can be converted to a "buffer descriptor" that
allows more precise control of memory access, such as by allowing for
out of bounds loads/stores to be replaced by 0/ignored without adding
additional conditional logic, which is important for performance.

The repository currently contains a limited conversion from
transfer_read/transfer_write to Mubuf intrinsics, which are an older,
deprecated intrinsic for the same functionality.

The new amdgpu.raw_buffer_* ops allow these operations to be used
explicitly and for including metadata such as whether the target
chipset is an RDNA chip or not (which impacts the interpretation of
some bits in the buffer descriptor), while still maintaining an
MLIR-like interface.

(This change also exposes the floating-point atomic add intrinsic.)

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D122765
2022-05-10 14:59:58 +00:00
Sam McCall 00a3c9f2a4 [Frontend] Flip default of CreateInvocationOptions::ProbePrecompiled to false
This is generally a better default for tools other than the compiler, which
shouldn't assume a PCH file on disk is something they can consume.

Preserve the old behavior in places associated with libclang/c-index-test
(including ASTUnit) as there are tests relying on it and most important
consumers are out-of-tree. It's unclear whether the tests are specifically
trying to test this functionality, and what the downstream implications of
removing it are. Hopefully someone more familiar can clean this up in future.

Differential Revision: https://reviews.llvm.org/D125149
2022-05-10 16:58:13 +02:00
Peter Klausler 9e50168be4 [flang] Fold real-valued DIM()
Fold references to the intrinsic function DIM with constant real
arguments.  And clean up folding of comparisons with NaNs to address
a problem noticed in testing -- NaNs should successfully compare
unequal to all values, including themselves, instead of failing all
comparisons.

Differential Revision: https://reviews.llvm.org/D125146
2022-05-10 07:45:41 -07:00
Chris Lattner ad3b358180 [MLIR Parser] Improve QoI for "expected token" errors
A typical problem with missing a token is that the missing
token is at the end of a line.  The problem with this is that
the error message gets reported on the start of the following
line (which is where the next / invalid token is) which can
be confusing.

Handle this by noticing this case and backing up to the end of
the previous line.

Differential Revision: https://reviews.llvm.org/D125295
2022-05-10 15:44:17 +01:00
Amy Kwan 0c1000cbd6 [NFC][PowerPC] Add 32-bit AIX RUN lines to test cases.
This patch adds 32-bit AIX RUN lines to several test cases, along with the
addition of one new test case, to prepare for future codegen changes involving
the PPCISD::SCALAR_TO_VECTOR_PERMUTED node on 32-bit mode.
2022-05-10 09:20:10 -05:00
Nicolai Hähnle 6c2a01ce3a AMDGPU/SDAG: Refine the fold to v_mad_[iu]64_[iu]32
Only fold for uniform values on pre-GFX9 chips. GFX9+ allow us
to keep the calculation entirely on the SALU.

For subtargets where integer multiplication isn't full-rate, avoid
folding if the multiply has too many uses.

Finally, we expand 64x32 and 64x64 multiplies here as well, if they
feed into an addition. This results in better code generation than
the generic expansion for such multiplies because we end up using
the accumulator of the MAD instructions.

Differential Revision: https://reviews.llvm.org/D123835
2022-05-10 09:15:51 -05:00
Dawid Jurczak 009f6ce0ef [GVNSink] Make GVNSink resistant against self referencing instructions (PR36954)
Before this change GVNSink pass suffers from stack overflow while processing self referenced instruction in unreachable basic block.
According [1] and [2] it's reasonable to make pass resistant against self referencing instructions.
To fix issue we skip sinking analysis when we reach instruction coming from unreachable block.

[1] https://groups.google.com/g/llvm-dev/c/843Tig9IzwA
[2] https://lists.llvm.org/pipermail/llvm-dev/2015-February/082629.html

Differential Revision: https://reviews.llvm.org/D113897
2022-05-10 16:06:12 +02:00
Louis Dionne ead7a5fc04 [libc++abi] Reword uncaught exception termination message
When we terminate due to an exception being uncaught, libc++abi prints
a message saying "terminating with uncaught exception [...]". This patch
changes that to say "terminating due to uncaught exception [...]" instead,
which is a bit clearer. Indeed, I've seen some people being confused and
thinking that libc++abi was the component throwing the exception.

Differential Revision: https://reviews.llvm.org/D125245
2022-05-10 09:58:40 -04:00
Nikita Popov 0eafef1171 [SCEVExpander] Remove handling for mixed int/pointer min/max (NFCI)
Mixed int/pointer min/max are no longer possible.
2022-05-10 15:11:39 +02:00
Alexey Bataev c40f4f2880 [SLP][NFC]Add a test for improved shuffles in buildvector sequences,
NFC.
2022-05-10 05:51:44 -07:00
Nikita Popov 3898759538 [IndVarSimplify] Regenerate test checks (NFC) 2022-05-10 14:51:09 +02:00
Nicolai Hähnle 38bb46523f GlobalISel: Trivial documentation and comment fixes
Differential Revision: https://reviews.llvm.org/D124808
2022-05-10 07:48:56 -05:00
Rosie Sumpter 131e6636f2 [Sema][SVE2] Move/simplify Sema testing for SVE2 ACLE builtins
Currently for SVE2 ACLE builtins, single tests are used to verify both
clang code generation (when the feature is available) and semantic
error/warning messages (when the feature is unavailable). This
patch moves the semantic testing for the target feature flag into
dedicated Sema tests.

Differential Revision: https://reviews.llvm.org/D124850
2022-05-10 13:24:17 +01:00
Rosie Sumpter f635e63709 [Sema][SVE] Move/simplify Sema testing for SVE ACLE builtins
Currently for SVE ACLE builtins, single tests are used to verify both
clang code generation (when the feature is available) and semantic
error/warning messages (when the feature is unavailable). This
patch moves the semantic testing into dedicated Sema tests.

Differential Revision: https://reviews.llvm.org/D124924
2022-05-10 13:17:51 +01:00
Haojian Wu be895d5768 [pseudo] Add benchmarks for pseudoparser.
Running on SemaDecl.cpp with the cxx.bnf grammar:

```
--------------------------------------------------------------
Benchmark                    Time             CPU   Iterations
--------------------------------------------------------------
runParseBNFGrammar      649389 ns       649365 ns         1013
runBuildLR            34591903 ns     34591380 ns           20
runPreprocessTokens   11418744 ns     11418703 ns           61 bytes_per_second=63.8971M/s
runGLRParse          282996863 ns    282988726 ns            2 bytes_per_second=2.57827M/s
runParseOverall      294969719 ns    294951870 ns            2 bytes_per_second=2.4737M/s
```

Differential Revision: https://reviews.llvm.org/D125226
2022-05-10 14:13:46 +02:00
Adrian Kuegel 64c8574209 [mlir] Remove unused using declaration (NFC) 2022-05-10 12:58:01 +02:00
Fraser Cormack 0b2e7a7c72 [RISCV][NFC] Remove else after continue 2022-05-10 11:15:50 +01:00
Nikita Popov ff20ee32d8 [LoopVectorize] Remove incorrect nuw flag from test (NFC)
nuw does not make sense for reverse iteration.
2022-05-10 12:17:09 +02:00
Nikita Popov c077510bb1 [InstSimplify] Handle unknown function context in pointer icmp fold (PR54615)
This issue reproduces in the context of LoopDeletion, because the
bitcast does not get simplified away there. For a plain -inst-simplify
run the bitcast would get folded away first.

Fixes https://github.com/llvm/llvm-project/issues/54615.
2022-05-10 11:48:43 +02:00
Chuanqi Xu 02d6845234 [NFC] [Coroutines] Remove EnableReuseStorageInFrame option
The EnableReuseStorageInFrame option is designed for testing only.
But it is better to use *_PASS_WITH_PARAMS macro to keep consistent with
other passes.
2022-05-10 17:28:43 +08:00
Nikita Popov d222bab672 [InstCombine] Handle GEP scalar/vector base mismatch (PR55363)
30a12f3f63 switched the type check
to use the GEP result type rather than the GEP operand type.
However, the GEP result types may match even if the operand types
don't, in case GEPs with scalar/vector base and vector index
are compared.

Fixes https://github.com/llvm/llvm-project/issues/55363.
2022-05-10 11:26:43 +02:00
Lian Wang f14a1f26ad Revert "[RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation"
This patch make CodeGen/test/AArch64/vecreduce-add-legalization.ll fail.

This reverts commit 17a8a1bb71.
2022-05-10 09:25:25 +00:00
Gabor Marton 21feafaeb8 [analyzer] Attempt to fix test infeasible-crash.c 2022-05-10 11:18:35 +02:00
Lian Wang 17a8a1bb71 [RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125206
2022-05-10 08:52:48 +00:00
Lian Wang 3b3ff24037 [RISCV] Add more tests for vector reduce mask operations
Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D125216
2022-05-10 08:25:13 +00:00
Nikita Popov ddfc84e634 [fuzzer] Reduce size of large.test
This halves the size of LargeTest, dropping time to compile this
file locally from 14s to 5.5s. Hopefully this will also fix the
persistent timeouts in pre-merge checks.

Differential Revision: https://reviews.llvm.org/D124237
2022-05-10 10:19:04 +02:00
Nikita Popov 03ab30686d [MLIR] Split off MLIRExecutionEngineUtils to fix libMLIR.so build (PR54242)
Building libMLIR.so currently fails with:

> /usr/bin/ld: /tmp/ccNzulEA.ltrans39.ltrans.o: in function `(anonymous namespace)::SerializeToHsacoPass::optimizeLlvm(llvm::Module&, llvm::TargetMachine&)':
> /builddir/build/BUILD/llvm-project-15.0.0.src/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp:328: undefined reference to `mlir::makeOptimizingTransformer(unsigned int, unsigned int, llvm::TargetMachine*)'

This is because MLIRGPUTransforms depends on MLIRExecutionEngine in
61bb2e4ea8/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp (L328),
but MLIRExecutionEngine is marked as excluded from libMLIR.so.

However, this code doesn't require the full execution engine: It
only performs middle-end optimization, and does not need any of
the JIT/codegen infrastructure. As such, split off a separate
library MLIRExecutionEngineUtils, which only contains that part
and is not excluded from libMLIR.so.

Fixes https://github.com/llvm/llvm-project/issues/54242.

Differential Revision: https://reviews.llvm.org/D125214
2022-05-10 10:17:52 +02:00
Gabor Marton 34ac048aef [analyzer] Replace adjacent assumeInBound calls to assumeInBoundDual
This is to minimize superfluous assume calls.

Depends on D124758

Differential Revision: https://reviews.llvm.org/D124761
2022-05-10 10:16:55 +02:00
Gabor Marton 1c1c1e25f9 [analyzer] Implement assume in terms of assumeDual
Summary:
By evaluating both children states, now we are capable of discovering
infeasible parent states. In this patch, `assume` is implemented in the terms
of `assumeDuali`. This might be suboptimal (e.g. where there are adjacent
assume(true) and assume(false) calls, next patches addresses that). This patch
fixes a real CRASH.
Fixes https://github.com/llvm/llvm-project/issues/54272

Differential Revision:
https://reviews.llvm.org/D124758
2022-05-10 10:16:55 +02:00
Gabor Marton c4fa05f5f7 [analyzer] Indicate if a parent state is infeasible
In some cases a parent State is already infeasible, but we recognize
this only if an additonal constraint is added. This patch is the first
of a series to address this issue. In this patch `assumeDual` is changed
to clone the parent State but with an `Infeasible` flag set, and this
infeasible-parent is returned both for the true and false case. Then
when we add a new transition in the exploded graph and the destination
is marked as infeasible, the node will be a sink node.

Related bug:
https://github.com/llvm/llvm-project/issues/50883
Actually, this patch does not solve that bug in the solver, rather with
this patch we can handle the general parent-infeasible cases.

Next step would be to change the State API and require all checkers to
use the `assume*Dual` API and deprecate the simple `assume` calls.

Hopefully, the next patch will introduce `assumeInBoundDual` and will
solve the CRASH we have here:
https://github.com/llvm/llvm-project/issues/54272

Differential Revision: https://reviews.llvm.org/D124674
2022-05-10 10:16:55 +02:00